xref: /linux/drivers/staging/iio/accel/adis16240.c (revision 52338415)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * ADIS16240 Programmable Impact Sensor and Recorder driver
4  *
5  * Copyright 2010 Analog Devices Inc.
6  */
7 
8 #include <linux/interrupt.h>
9 #include <linux/irq.h>
10 #include <linux/gpio.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/list.h>
18 #include <linux/module.h>
19 
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/iio/imu/adis.h>
24 
25 #define ADIS16240_STARTUP_DELAY	220 /* ms */
26 
27 /* Flash memory write count */
28 #define ADIS16240_FLASH_CNT      0x00
29 
30 /* Output, power supply */
31 #define ADIS16240_SUPPLY_OUT     0x02
32 
33 /* Output, x-axis accelerometer */
34 #define ADIS16240_XACCL_OUT      0x04
35 
36 /* Output, y-axis accelerometer */
37 #define ADIS16240_YACCL_OUT      0x06
38 
39 /* Output, z-axis accelerometer */
40 #define ADIS16240_ZACCL_OUT      0x08
41 
42 /* Output, auxiliary ADC input */
43 #define ADIS16240_AUX_ADC        0x0A
44 
45 /* Output, temperature */
46 #define ADIS16240_TEMP_OUT       0x0C
47 
48 /* Output, x-axis acceleration peak */
49 #define ADIS16240_XPEAK_OUT      0x0E
50 
51 /* Output, y-axis acceleration peak */
52 #define ADIS16240_YPEAK_OUT      0x10
53 
54 /* Output, z-axis acceleration peak */
55 #define ADIS16240_ZPEAK_OUT      0x12
56 
57 /* Output, sum-of-squares acceleration peak */
58 #define ADIS16240_XYZPEAK_OUT    0x14
59 
60 /* Output, Capture Buffer 1, X and Y acceleration */
61 #define ADIS16240_CAPT_BUF1      0x16
62 
63 /* Output, Capture Buffer 2, Z acceleration */
64 #define ADIS16240_CAPT_BUF2      0x18
65 
66 /* Diagnostic, error flags */
67 #define ADIS16240_DIAG_STAT      0x1A
68 
69 /* Diagnostic, event counter */
70 #define ADIS16240_EVNT_CNTR      0x1C
71 
72 /* Diagnostic, check sum value from firmware test */
73 #define ADIS16240_CHK_SUM        0x1E
74 
75 /* Calibration, x-axis acceleration offset adjustment */
76 #define ADIS16240_XACCL_OFF      0x20
77 
78 /* Calibration, y-axis acceleration offset adjustment */
79 #define ADIS16240_YACCL_OFF      0x22
80 
81 /* Calibration, z-axis acceleration offset adjustment */
82 #define ADIS16240_ZACCL_OFF      0x24
83 
84 /* Clock, hour and minute */
85 #define ADIS16240_CLK_TIME       0x2E
86 
87 /* Clock, month and day */
88 #define ADIS16240_CLK_DATE       0x30
89 
90 /* Clock, year */
91 #define ADIS16240_CLK_YEAR       0x32
92 
93 /* Wake-up setting, hour and minute */
94 #define ADIS16240_WAKE_TIME      0x34
95 
96 /* Wake-up setting, month and day */
97 #define ADIS16240_WAKE_DATE      0x36
98 
99 /* Alarm 1 amplitude threshold */
100 #define ADIS16240_ALM_MAG1       0x38
101 
102 /* Alarm 2 amplitude threshold */
103 #define ADIS16240_ALM_MAG2       0x3A
104 
105 /* Alarm control */
106 #define ADIS16240_ALM_CTRL       0x3C
107 
108 /* Capture, external trigger control */
109 #define ADIS16240_XTRIG_CTRL     0x3E
110 
111 /* Capture, address pointer */
112 #define ADIS16240_CAPT_PNTR      0x40
113 
114 /* Capture, configuration and control */
115 #define ADIS16240_CAPT_CTRL      0x42
116 
117 /* General-purpose digital input/output control */
118 #define ADIS16240_GPIO_CTRL      0x44
119 
120 /* Miscellaneous control */
121 #define ADIS16240_MSC_CTRL       0x46
122 
123 /* Internal sample period (rate) control */
124 #define ADIS16240_SMPL_PRD       0x48
125 
126 /* System command */
127 #define ADIS16240_GLOB_CMD       0x4A
128 
129 /* MSC_CTRL */
130 
131 /* Enables sum-of-squares output (XYZPEAK_OUT) */
132 #define ADIS16240_MSC_CTRL_XYZPEAK_OUT_EN	BIT(15)
133 
134 /* Enables peak tracking output (XPEAK_OUT, YPEAK_OUT, and ZPEAK_OUT) */
135 #define ADIS16240_MSC_CTRL_X_Y_ZPEAK_OUT_EN	BIT(14)
136 
137 /* Self-test enable: 1 = apply electrostatic force, 0 = disabled */
138 #define ADIS16240_MSC_CTRL_SELF_TEST_EN	        BIT(8)
139 
140 /* Data-ready enable: 1 = enabled, 0 = disabled */
141 #define ADIS16240_MSC_CTRL_DATA_RDY_EN	        BIT(2)
142 
143 /* Data-ready polarity: 1 = active high, 0 = active low */
144 #define ADIS16240_MSC_CTRL_ACTIVE_HIGH	        BIT(1)
145 
146 /* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
147 #define ADIS16240_MSC_CTRL_DATA_RDY_DIO2	BIT(0)
148 
149 /* DIAG_STAT */
150 
151 /* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
152 #define ADIS16240_DIAG_STAT_ALARM2      BIT(9)
153 
154 /* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
155 #define ADIS16240_DIAG_STAT_ALARM1      BIT(8)
156 
157 /* Capture buffer full: 1 = capture buffer is full */
158 #define ADIS16240_DIAG_STAT_CPT_BUF_FUL BIT(7)
159 
160 /* Flash test, checksum flag: 1 = mismatch, 0 = match */
161 #define ADIS16240_DIAG_STAT_CHKSUM      BIT(6)
162 
163 /* Power-on, self-test flag: 1 = failure, 0 = pass */
164 #define ADIS16240_DIAG_STAT_PWRON_FAIL_BIT  5
165 
166 /* Power-on self-test: 1 = in-progress, 0 = complete */
167 #define ADIS16240_DIAG_STAT_PWRON_BUSY  BIT(4)
168 
169 /* SPI communications failure */
170 #define ADIS16240_DIAG_STAT_SPI_FAIL_BIT	3
171 
172 /* Flash update failure */
173 #define ADIS16240_DIAG_STAT_FLASH_UPT_BIT	2
174 
175 /* Power supply above 3.625 V */
176 #define ADIS16240_DIAG_STAT_POWER_HIGH_BIT	1
177 
178  /* Power supply below 2.225 V */
179 #define ADIS16240_DIAG_STAT_POWER_LOW_BIT	0
180 
181 /* GLOB_CMD */
182 
183 #define ADIS16240_GLOB_CMD_RESUME	BIT(8)
184 #define ADIS16240_GLOB_CMD_SW_RESET	BIT(7)
185 #define ADIS16240_GLOB_CMD_STANDBY	BIT(2)
186 
187 #define ADIS16240_ERROR_ACTIVE          BIT(14)
188 
189 /* At the moment triggers are only used for ring buffer
190  * filling. This may change!
191  */
192 
193 enum adis16240_scan {
194 	ADIS16240_SCAN_ACC_X,
195 	ADIS16240_SCAN_ACC_Y,
196 	ADIS16240_SCAN_ACC_Z,
197 	ADIS16240_SCAN_SUPPLY,
198 	ADIS16240_SCAN_AUX_ADC,
199 	ADIS16240_SCAN_TEMP,
200 };
201 
202 static ssize_t adis16240_spi_read_signed(struct device *dev,
203 					 struct device_attribute *attr,
204 					 char *buf,
205 					 unsigned int bits)
206 {
207 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
208 	struct adis *st = iio_priv(indio_dev);
209 	int ret;
210 	s16 val = 0;
211 	unsigned int shift = 16 - bits;
212 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
213 
214 	ret = adis_read_reg_16(st,
215 			       this_attr->address, (u16 *)&val);
216 	if (ret)
217 		return ret;
218 
219 	if (val & ADIS16240_ERROR_ACTIVE)
220 		adis_check_status(st);
221 
222 	val = (s16)(val << shift) >> shift;
223 	return sprintf(buf, "%d\n", val);
224 }
225 
226 static ssize_t adis16240_read_12bit_signed(struct device *dev,
227 					   struct device_attribute *attr,
228 					   char *buf)
229 {
230 	return adis16240_spi_read_signed(dev, attr, buf, 12);
231 }
232 
233 static IIO_DEVICE_ATTR(in_accel_xyz_squared_peak_raw, 0444,
234 		       adis16240_read_12bit_signed, NULL,
235 		       ADIS16240_XYZPEAK_OUT);
236 
237 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("4096");
238 
239 static const u8 adis16240_addresses[][2] = {
240 	[ADIS16240_SCAN_ACC_X] = { ADIS16240_XACCL_OFF, ADIS16240_XPEAK_OUT },
241 	[ADIS16240_SCAN_ACC_Y] = { ADIS16240_YACCL_OFF, ADIS16240_YPEAK_OUT },
242 	[ADIS16240_SCAN_ACC_Z] = { ADIS16240_ZACCL_OFF, ADIS16240_ZPEAK_OUT },
243 };
244 
245 static int adis16240_read_raw(struct iio_dev *indio_dev,
246 			      struct iio_chan_spec const *chan,
247 			      int *val, int *val2,
248 			      long mask)
249 {
250 	struct adis *st = iio_priv(indio_dev);
251 	int ret;
252 	u8 addr;
253 	s16 val16;
254 
255 	switch (mask) {
256 	case IIO_CHAN_INFO_RAW:
257 		return adis_single_conversion(indio_dev, chan,
258 				ADIS16240_ERROR_ACTIVE, val);
259 	case IIO_CHAN_INFO_SCALE:
260 		switch (chan->type) {
261 		case IIO_VOLTAGE:
262 			if (chan->channel == 0) {
263 				*val = 4;
264 				*val2 = 880000; /* 4.88 mV */
265 				return IIO_VAL_INT_PLUS_MICRO;
266 			}
267 			return -EINVAL;
268 		case IIO_TEMP:
269 			*val = 244; /* 0.244 C */
270 			*val2 = 0;
271 			return IIO_VAL_INT_PLUS_MICRO;
272 		case IIO_ACCEL:
273 			*val = 0;
274 			*val2 = IIO_G_TO_M_S_2(51400); /* 51.4 mg */
275 			return IIO_VAL_INT_PLUS_MICRO;
276 		default:
277 			return -EINVAL;
278 		}
279 		break;
280 	case IIO_CHAN_INFO_PEAK_SCALE:
281 		*val = 0;
282 		*val2 = IIO_G_TO_M_S_2(51400); /* 51.4 mg */
283 		return IIO_VAL_INT_PLUS_MICRO;
284 	case IIO_CHAN_INFO_OFFSET:
285 		*val = 25000 / 244 - 0x133; /* 25 C = 0x133 */
286 		return IIO_VAL_INT;
287 	case IIO_CHAN_INFO_CALIBBIAS:
288 		addr = adis16240_addresses[chan->scan_index][0];
289 		ret = adis_read_reg_16(st, addr, &val16);
290 		if (ret)
291 			return ret;
292 		*val = sign_extend32(val16, 9);
293 		return IIO_VAL_INT;
294 	case IIO_CHAN_INFO_PEAK:
295 		addr = adis16240_addresses[chan->scan_index][1];
296 		ret = adis_read_reg_16(st, addr, &val16);
297 		if (ret)
298 			return ret;
299 		*val = sign_extend32(val16, 9);
300 		return IIO_VAL_INT;
301 	}
302 	return -EINVAL;
303 }
304 
305 static int adis16240_write_raw(struct iio_dev *indio_dev,
306 			       struct iio_chan_spec const *chan,
307 			       int val,
308 			       int val2,
309 			       long mask)
310 {
311 	struct adis *st = iio_priv(indio_dev);
312 	u8 addr;
313 
314 	switch (mask) {
315 	case IIO_CHAN_INFO_CALIBBIAS:
316 		addr = adis16240_addresses[chan->scan_index][0];
317 		return adis_write_reg_16(st, addr, val & GENMASK(9, 0));
318 	}
319 	return -EINVAL;
320 }
321 
322 static const struct iio_chan_spec adis16240_channels[] = {
323 	ADIS_SUPPLY_CHAN(ADIS16240_SUPPLY_OUT, ADIS16240_SCAN_SUPPLY, 0, 10),
324 	ADIS_AUX_ADC_CHAN(ADIS16240_AUX_ADC, ADIS16240_SCAN_AUX_ADC, 0, 10),
325 	ADIS_ACCEL_CHAN(X, ADIS16240_XACCL_OUT, ADIS16240_SCAN_ACC_X,
326 			BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK),
327 			0, 10),
328 	ADIS_ACCEL_CHAN(Y, ADIS16240_YACCL_OUT, ADIS16240_SCAN_ACC_Y,
329 			BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK),
330 			0, 10),
331 	ADIS_ACCEL_CHAN(Z, ADIS16240_ZACCL_OUT, ADIS16240_SCAN_ACC_Z,
332 			BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_PEAK),
333 			0, 10),
334 	ADIS_TEMP_CHAN(ADIS16240_TEMP_OUT, ADIS16240_SCAN_TEMP, 0, 10),
335 	IIO_CHAN_SOFT_TIMESTAMP(6)
336 };
337 
338 static struct attribute *adis16240_attributes[] = {
339 	&iio_dev_attr_in_accel_xyz_squared_peak_raw.dev_attr.attr,
340 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
341 	NULL
342 };
343 
344 static const struct attribute_group adis16240_attribute_group = {
345 	.attrs = adis16240_attributes,
346 };
347 
348 static const struct iio_info adis16240_info = {
349 	.attrs = &adis16240_attribute_group,
350 	.read_raw = adis16240_read_raw,
351 	.write_raw = adis16240_write_raw,
352 	.update_scan_mode = adis_update_scan_mode,
353 };
354 
355 static const char * const adis16240_status_error_msgs[] = {
356 	[ADIS16240_DIAG_STAT_PWRON_FAIL_BIT] = "Power on, self-test failed",
357 	[ADIS16240_DIAG_STAT_SPI_FAIL_BIT] = "SPI failure",
358 	[ADIS16240_DIAG_STAT_FLASH_UPT_BIT] = "Flash update failed",
359 	[ADIS16240_DIAG_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
360 	[ADIS16240_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.225V",
361 };
362 
363 static const struct adis_data adis16240_data = {
364 	.write_delay = 35,
365 	.read_delay = 35,
366 	.msc_ctrl_reg = ADIS16240_MSC_CTRL,
367 	.glob_cmd_reg = ADIS16240_GLOB_CMD,
368 	.diag_stat_reg = ADIS16240_DIAG_STAT,
369 
370 	.self_test_mask = ADIS16240_MSC_CTRL_SELF_TEST_EN,
371 	.self_test_no_autoclear = true,
372 	.startup_delay = ADIS16240_STARTUP_DELAY,
373 
374 	.status_error_msgs = adis16240_status_error_msgs,
375 	.status_error_mask = BIT(ADIS16240_DIAG_STAT_PWRON_FAIL_BIT) |
376 		BIT(ADIS16240_DIAG_STAT_SPI_FAIL_BIT) |
377 		BIT(ADIS16240_DIAG_STAT_FLASH_UPT_BIT) |
378 		BIT(ADIS16240_DIAG_STAT_POWER_HIGH_BIT) |
379 		BIT(ADIS16240_DIAG_STAT_POWER_LOW_BIT),
380 };
381 
382 static int adis16240_probe(struct spi_device *spi)
383 {
384 	int ret;
385 	struct adis *st;
386 	struct iio_dev *indio_dev;
387 
388 	/* setup the industrialio driver allocated elements */
389 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
390 	if (!indio_dev)
391 		return -ENOMEM;
392 	st = iio_priv(indio_dev);
393 	/* this is only used for removal purposes */
394 	spi_set_drvdata(spi, indio_dev);
395 
396 	indio_dev->name = spi->dev.driver->name;
397 	indio_dev->dev.parent = &spi->dev;
398 	indio_dev->info = &adis16240_info;
399 	indio_dev->channels = adis16240_channels;
400 	indio_dev->num_channels = ARRAY_SIZE(adis16240_channels);
401 	indio_dev->modes = INDIO_DIRECT_MODE;
402 
403 	ret = adis_init(st, indio_dev, spi, &adis16240_data);
404 	if (ret)
405 		return ret;
406 	ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
407 	if (ret)
408 		return ret;
409 
410 	/* Get the device into a sane initial state */
411 	ret = adis_initial_startup(st);
412 	if (ret)
413 		goto error_cleanup_buffer_trigger;
414 	ret = iio_device_register(indio_dev);
415 	if (ret)
416 		goto error_cleanup_buffer_trigger;
417 	return 0;
418 
419 error_cleanup_buffer_trigger:
420 	adis_cleanup_buffer_and_trigger(st, indio_dev);
421 	return ret;
422 }
423 
424 static int adis16240_remove(struct spi_device *spi)
425 {
426 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
427 	struct adis *st = iio_priv(indio_dev);
428 
429 	iio_device_unregister(indio_dev);
430 	adis_cleanup_buffer_and_trigger(st, indio_dev);
431 
432 	return 0;
433 }
434 
435 static const struct of_device_id adis16240_of_match[] = {
436 	{ .compatible = "adi,adis16240" },
437 	{ },
438 };
439 MODULE_DEVICE_TABLE(of, adis16240_of_match);
440 
441 static struct spi_driver adis16240_driver = {
442 	.driver = {
443 		.name = "adis16240",
444 		.of_match_table = adis16240_of_match,
445 	},
446 	.probe = adis16240_probe,
447 	.remove = adis16240_remove,
448 };
449 module_spi_driver(adis16240_driver);
450 
451 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
452 MODULE_DESCRIPTION("Analog Devices Programmable Impact Sensor and Recorder");
453 MODULE_LICENSE("GPL v2");
454 MODULE_ALIAS("spi:adis16240");
455