1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4  *
5  * Based on the r8180 driver, which is:
6  * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
7  *
8  * Contact Information: wlanfae <wlanfae@realtek.com>
9  */
10 #ifndef _RTL_CORE_H
11 #define _RTL_CORE_H
12 
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/ioport.h>
16 #include <linux/sched.h>
17 #include <linux/types.h>
18 #include <linux/interrupt.h>
19 #include <linux/slab.h>
20 #include <linux/netdevice.h>
21 #include <linux/pci.h>
22 #include <linux/etherdevice.h>
23 #include <linux/delay.h>
24 #include <linux/rtnetlink.h>
25 #include <linux/wireless.h>
26 #include <linux/timer.h>
27 #include <linux/proc_fs.h>
28 #include <linux/if_arp.h>
29 #include <linux/random.h>
30 #include <linux/io.h>
31 
32 /* Need this defined before including local include files */
33 #define DRV_NAME "rtl819xE"
34 
35 #include "../rtllib.h"
36 
37 #include "../dot11d.h"
38 
39 #include "r8192E_firmware.h"
40 #include "r8192E_hw.h"
41 
42 #include "r8190P_def.h"
43 #include "r8192E_dev.h"
44 
45 #include "rtl_eeprom.h"
46 #include "rtl_ps.h"
47 #include "rtl_pci.h"
48 #include "rtl_cam.h"
49 
50 #define DRV_COPYRIGHT		\
51 	"Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
52 #define DRV_AUTHOR  "<wlanfae@realtek.com>"
53 #define DRV_VERSION  "0014.0401.2010"
54 
55 #define TOTAL_CAM_ENTRY		32
56 #define CAM_CONTENT_COUNT	8
57 
58 #define HAL_HW_PCI_REVISION_ID_8192PCIE		0x01
59 #define HAL_HW_PCI_REVISION_ID_8192SE	0x10
60 
61 #define RTLLIB_WATCH_DOG_TIME		2000
62 
63 #define MAX_DEV_ADDR_SIZE		8  /*support till 64 bit bus width OS*/
64 #define MAX_FIRMWARE_INFORMATION_SIZE   32
65 #define MAX_802_11_HEADER_LENGTH	(40 + MAX_FIRMWARE_INFORMATION_SIZE)
66 #define ENCRYPTION_MAX_OVERHEAD		128
67 #define MAX_FRAGMENT_COUNT		8
68 #define MAX_TRANSMIT_BUFFER_SIZE	\
69 	(1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) *	\
70 	 MAX_FRAGMENT_COUNT)
71 
72 #define CMDPACKET_FRAG_SIZE (4 * (MAX_TRANSMIT_BUFFER_SIZE / 4) - 8)
73 
74 #define DEFAULT_FRAG_THRESHOLD	2342U
75 #define MIN_FRAG_THRESHOLD	256U
76 #define DEFAULT_BEACONINTERVAL	0x64U
77 
78 #define DEFAULT_RETRY_RTS	7
79 #define DEFAULT_RETRY_DATA	7
80 
81 #define	PHY_RSSI_SLID_WIN_MAX			100
82 
83 #define TX_BB_GAIN_TABLE_LEN			37
84 #define CCK_TX_BB_GAIN_TABLE_LEN		23
85 
86 #define CHANNEL_PLAN_LEN			10
87 #define S_CRC_LEN				4
88 
89 #define NIC_SEND_HANG_THRESHOLD_NORMAL		4
90 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE	8
91 
92 #define MAX_TX_QUEUE				9
93 
94 #define MAX_RX_COUNT				64
95 #define MAX_TX_QUEUE_COUNT			9
96 
97 extern int hwwep;
98 
99 enum nic_t {
100 	NIC_UNKNOWN     = 0,
101 	NIC_8192E       = 1,
102 	NIC_8190P       = 2,
103 	NIC_8192SE      = 4,
104 	NIC_8192CE	= 5,
105 	NIC_8192CU	= 6,
106 	NIC_8192DE	= 7,
107 	NIC_8192DU	= 8,
108 };
109 
110 enum rt_eeprom_type {
111 	EEPROM_93C46,
112 	EEPROM_93C56,
113 };
114 
115 enum dcmg_txcmd_op {
116 	TXCMD_TXRA_HISTORY_CTRL		= 0xFF900000,
117 	TXCMD_RESET_TX_PKT_BUFF		= 0xFF900001,
118 	TXCMD_RESET_RX_PKT_BUFF		= 0xFF900002,
119 	TXCMD_SET_TX_DURATION		= 0xFF900003,
120 	TXCMD_SET_RX_RSSI		= 0xFF900004,
121 	TXCMD_SET_TX_PWR_TRACKING	= 0xFF900005,
122 	TXCMD_XXXX_CTRL,
123 };
124 
125 enum rt_customer_id {
126 	RT_CID_DEFAULT	  = 0,
127 	RT_CID_TOSHIBA	  = 9,
128 	RT_CID_819X_NETCORE     = 10,
129 };
130 
131 enum reset_type {
132 	RESET_TYPE_NORESET = 0x00,
133 	RESET_TYPE_SILENT = 0x02
134 };
135 
136 struct rt_stats {
137 	unsigned long received_rate_histogram[4][32];
138 	unsigned long txbytesunicast;
139 	unsigned long rxbytesunicast;
140 	unsigned long txretrycount;
141 	u8	last_packet_rate;
142 	unsigned long slide_signal_strength[100];
143 	unsigned long slide_evm[100];
144 	unsigned long	slide_rssi_total;
145 	unsigned long slide_evm_total;
146 	long signal_strength;
147 	long last_signal_strength_inpercent;
148 	long	recv_signal_power;
149 	u8 rx_rssi_percentage[4];
150 	u8 rx_evm_percentage[2];
151 	u32 slide_beacon_pwdb[100];
152 	u32 slide_beacon_total;
153 	u32	CurrentShowTxate;
154 };
155 
156 struct init_gain {
157 	u8	xaagccore1;
158 	u8	xbagccore1;
159 	u8	xcagccore1;
160 	u8	xdagccore1;
161 	u8	cca;
162 
163 };
164 
165 struct tx_ring {
166 	u32 *desc;
167 	u8 nStuckCount;
168 	struct tx_ring *next;
169 } __packed;
170 
171 struct rtl8192_tx_ring {
172 	struct tx_desc *desc;
173 	dma_addr_t dma;
174 	unsigned int idx;
175 	unsigned int entries;
176 	struct sk_buff_head queue;
177 };
178 
179 struct r8192_priv {
180 	struct pci_dev *pdev;
181 	struct pci_dev *bridge_pdev;
182 
183 	bool		bfirst_after_down;
184 	bool		being_init_adapter;
185 
186 	int		irq;
187 	short	irq_enabled;
188 
189 	short	up;
190 	short	up_first_time;
191 	struct delayed_work		update_beacon_wq;
192 	struct delayed_work		watch_dog_wq;
193 	struct delayed_work		txpower_tracking_wq;
194 	struct delayed_work		rfpath_check_wq;
195 	struct delayed_work		gpio_change_rf_wq;
196 	struct rtllib_device			*rtllib;
197 
198 	struct work_struct				reset_wq;
199 
200 	enum rt_customer_id customer_id;
201 
202 	enum ht_channel_width current_chnl_bw;
203 	struct bb_reg_definition phy_reg_def[4];
204 	struct rate_adaptive rate_adaptive;
205 
206 	struct rt_firmware *fw_info;
207 	enum rtl819x_loopback loopback_mode;
208 
209 	struct timer_list			watch_dog_timer;
210 	struct timer_list			fsync_timer;
211 	struct timer_list			gpio_polling_timer;
212 
213 	spinlock_t				irq_th_lock;
214 	spinlock_t				tx_lock;
215 	spinlock_t				rf_ps_lock;
216 	spinlock_t				ps_lock;
217 
218 	struct sk_buff_head		skb_queue;
219 
220 	struct tasklet_struct		irq_rx_tasklet;
221 	struct tasklet_struct		irq_tx_tasklet;
222 	struct tasklet_struct		irq_prepare_beacon_tasklet;
223 
224 	struct mutex				wx_mutex;
225 	struct mutex				rf_mutex;
226 	struct mutex				mutex;
227 
228 	struct rt_stats stats;
229 	struct iw_statistics			wstats;
230 
231 	u8 (*rf_set_chan)(struct net_device *dev, u8 ch);
232 
233 	struct rx_desc *rx_ring;
234 	struct sk_buff	*rx_buf[MAX_RX_COUNT];
235 	dma_addr_t	rx_ring_dma;
236 	unsigned int	rx_idx;
237 	int		rxringcount;
238 	u16		rxbuffersize;
239 
240 	u64 last_rx_desc_tsf;
241 
242 	u32 receive_config;
243 	u8		retry_data;
244 	u8		retry_rts;
245 	u16		rts;
246 
247 	struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
248 	int		 txringcount;
249 	atomic_t	tx_pending[0x10];
250 
251 	u16 short_retry_limit;
252 	u16 long_retry_limit;
253 
254 	bool		hw_radio_off;
255 	bool		blinked_ingpio;
256 	u8		polling_timer_on;
257 
258 	/**********************************************************/
259 	struct work_struct qos_activate;
260 
261 	short	promisc;
262 
263 	short	chan;
264 
265 	u32 irq_mask[2];
266 
267 	u8 rf_mode;
268 	enum nic_t card_8192;
269 	u8 card_8192_version;
270 
271 	u8 ic_cut;
272 	char nick[IW_ESSID_MAX_SIZE + 1];
273 	u8 check_roaming_cnt;
274 
275 	u32 silent_reset_rx_slot_index;
276 	u32 silent_reset_rx_stuck_event[MAX_SILENT_RESET_RX_SLOT_NUM];
277 
278 	u16 basic_rate;
279 	u8 short_preamble;
280 	u8 dot11_current_preamble_mode;
281 	u8 slot_time;
282 
283 	bool autoload_fail_flag;
284 
285 	short	epromtype;
286 	u16 eeprom_vid;
287 	u16 eeprom_did;
288 	u8 eeprom_customer_id;
289 	u16 eeprom_chnl_plan;
290 
291 	u8 eeprom_tx_pwr_level_cck[14];
292 	u8 eeprom_tx_pwr_level_ofdm24g[14];
293 	u16 eeprom_ant_pwr_diff;
294 	u8 eeprom_thermal_meter;
295 	u8 eeprom_crystal_cap;
296 
297 	u8 eeprom_legacy_ht_tx_pwr_diff;
298 
299 	u8 crystal_cap;
300 	u8 thermal_meter[2];
301 
302 	u8 sw_chnl_in_progress;
303 	u8 sw_chnl_stage;
304 	u8 sw_chnl_step;
305 	u8 set_bw_mode_in_progress;
306 
307 	u8 n_cur_40mhz_prime_sc;
308 
309 	u32 rf_reg_0value[4];
310 	u8 num_total_rf_path;
311 	bool brfpath_rxenable[4];
312 
313 	bool tx_pwr_data_read_from_eeprom;
314 
315 	u16 chnl_plan;
316 	u8 hw_rf_off_action;
317 
318 	bool rf_change_in_progress;
319 	bool set_rf_pwr_state_in_progress;
320 
321 	u8 cck_pwr_enl;
322 	u16 tssi_13dBm;
323 	u32 pwr_track;
324 	u8 cck_present_attn_20m_def;
325 	u8 cck_present_attn_40m_def;
326 	s8 cck_present_attn_diff;
327 	s8 cck_present_attn;
328 	long undecorated_smoothed_pwdb;
329 
330 	u32 mcs_tx_pwr_level_org_offset[6];
331 	u8 tx_pwr_level_cck[14];
332 	u8 tx_pwr_level_ofdm_24g[14];
333 	u8 legacy_ht_tx_pwr_diff;
334 	u8 antenna_tx_pwr_diff[3];
335 
336 	bool		dynamic_tx_high_pwr;
337 	bool		dynamic_tx_low_pwr;
338 	bool		last_dtp_flag_high;
339 	bool		last_dtp_flag_low;
340 
341 	u8		rfa_txpowertrackingindex;
342 	u8		rfa_txpowertrackingindex_real;
343 	u8		rfa_txpowertracking_default;
344 	bool		btxpower_tracking;
345 	bool		bcck_in_ch14;
346 
347 	u8		txpower_count;
348 	bool		tx_pwr_tracking_init;
349 
350 	u8		ofdm_index[2];
351 	u8		cck_index;
352 
353 	u8		rec_cck_20m_idx;
354 	u8		rec_cck_40m_idx;
355 
356 	struct init_gain initgain_backup;
357 	u8		def_initial_gain[4];
358 	bool		bis_any_nonbepkts;
359 	bool		bcurrent_turbo_EDCA;
360 	bool		bis_cur_rdlstate;
361 
362 	u32		rate_record;
363 	u32		rate_count_diff_rec;
364 	u32		continue_diff_count;
365 	bool		bswitch_fsync;
366 	u8		framesync;
367 
368 	u16		tx_counter;
369 	u16		rx_ctr;
370 };
371 
372 extern const struct ethtool_ops rtl819x_ethtool_ops;
373 
374 u8 rtl92e_readb(struct net_device *dev, int x);
375 u32 rtl92e_readl(struct net_device *dev, int x);
376 u16 rtl92e_readw(struct net_device *dev, int x);
377 void rtl92e_writeb(struct net_device *dev, int x, u8 y);
378 void rtl92e_writew(struct net_device *dev, int x, u16 y);
379 void rtl92e_writel(struct net_device *dev, int x, u32 y);
380 
381 void force_pci_posting(struct net_device *dev);
382 
383 void rtl92e_rx_enable(struct net_device *dev);
384 void rtl92e_tx_enable(struct net_device *dev);
385 
386 void rtl92e_hw_sleep_wq(void *data);
387 void rtl92e_commit(struct net_device *dev);
388 
389 void rtl92e_check_rfctrl_gpio_timer(struct timer_list *t);
390 
391 void rtl92e_hw_wakeup_wq(void *data);
392 
393 void rtl92e_reset_desc_ring(struct net_device *dev);
394 void rtl92e_set_wireless_mode(struct net_device *dev, u8 wireless_mode);
395 void rtl92e_irq_enable(struct net_device *dev);
396 void rtl92e_config_rate(struct net_device *dev, u16 *rate_config);
397 void rtl92e_irq_disable(struct net_device *dev);
398 
399 void rtl92e_update_rx_pkt_timestamp(struct net_device *dev,
400 				    struct rtllib_rx_stats *stats);
401 long rtl92e_translate_to_dbm(struct r8192_priv *priv, u8 signal_strength_index);
402 void rtl92e_update_rx_statistics(struct r8192_priv *priv,
403 				 struct rtllib_rx_stats *pprevious_stats);
404 u8 rtl92e_evm_db_to_percent(s8 value);
405 u8 rtl92e_rx_db_to_percent(s8 antpower);
406 void rtl92e_copy_mpdu_stats(struct rtllib_rx_stats *psrc_stats,
407 			    struct rtllib_rx_stats *ptarget_stats);
408 bool rtl92e_enable_nic(struct net_device *dev);
409 
410 bool rtl92e_set_rf_state(struct net_device *dev,
411 			 enum rt_rf_power_state state_to_set,
412 			 RT_RF_CHANGE_SOURCE change_source);
413 #endif
414