1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved. 4 * 5 * Based on the r8180 driver, which is: 6 * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al. 7 * 8 * Contact Information: wlanfae <wlanfae@realtek.com> 9 */ 10 #ifndef _RTL_CORE_H 11 #define _RTL_CORE_H 12 13 #include <linux/module.h> 14 #include <linux/kernel.h> 15 #include <linux/ioport.h> 16 #include <linux/sched.h> 17 #include <linux/types.h> 18 #include <linux/interrupt.h> 19 #include <linux/slab.h> 20 #include <linux/netdevice.h> 21 #include <linux/pci.h> 22 #include <linux/etherdevice.h> 23 #include <linux/delay.h> 24 #include <linux/rtnetlink.h> 25 #include <linux/wireless.h> 26 #include <linux/timer.h> 27 #include <linux/proc_fs.h> 28 #include <linux/if_arp.h> 29 #include <linux/random.h> 30 #include <linux/io.h> 31 32 /* Need this defined before including local include files */ 33 #define DRV_NAME "rtl819xE" 34 35 #include "../rtllib.h" 36 37 #include "../dot11d.h" 38 39 #include "r8192E_firmware.h" 40 #include "r8192E_hw.h" 41 42 #include "r8190P_def.h" 43 #include "r8192E_dev.h" 44 45 #include "rtl_eeprom.h" 46 #include "rtl_ps.h" 47 #include "rtl_pci.h" 48 #include "rtl_cam.h" 49 50 #define DRV_COPYRIGHT \ 51 "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation" 52 #define DRV_AUTHOR "<wlanfae@realtek.com>" 53 #define DRV_VERSION "0014.0401.2010" 54 55 #define IS_HARDWARE_TYPE_8192SE(_priv) \ 56 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192SE) 57 58 #define RTL_PCI_DEVICE(vend, dev, cfg) \ 59 .vendor = (vend), .device = (dev), \ 60 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \ 61 .driver_data = (kernel_ulong_t)&(cfg) 62 63 #define TOTAL_CAM_ENTRY 32 64 #define CAM_CONTENT_COUNT 8 65 66 #define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 67 #define HAL_HW_PCI_REVISION_ID_8192SE 0x10 68 69 #define RTL819X_DEFAULT_RF_TYPE RF_1T2R 70 71 #define RTLLIB_WATCH_DOG_TIME 2000 72 73 #define MAX_DEV_ADDR_SIZE 8 /*support till 64 bit bus width OS*/ 74 #define MAX_FIRMWARE_INFORMATION_SIZE 32 75 #define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE) 76 #define ENCRYPTION_MAX_OVERHEAD 128 77 #define MAX_FRAGMENT_COUNT 8 78 #define MAX_TRANSMIT_BUFFER_SIZE \ 79 (1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) * \ 80 MAX_FRAGMENT_COUNT) 81 82 #define CMDPACKET_FRAG_SIZE (4 * (MAX_TRANSMIT_BUFFER_SIZE / 4) - 8) 83 84 #define DEFAULT_FRAG_THRESHOLD 2342U 85 #define MIN_FRAG_THRESHOLD 256U 86 #define DEFAULT_BEACONINTERVAL 0x64U 87 88 #define DEFAULT_RETRY_RTS 7 89 #define DEFAULT_RETRY_DATA 7 90 91 #define PHY_RSSI_SLID_WIN_MAX 100 92 93 #define TX_BB_GAIN_TABLE_LEN 37 94 #define CCK_TX_BB_GAIN_TABLE_LEN 23 95 96 #define CHANNEL_PLAN_LEN 10 97 #define S_CRC_LEN 4 98 99 #define NIC_SEND_HANG_THRESHOLD_NORMAL 4 100 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8 101 102 #define MAX_TX_QUEUE 9 103 104 #define MAX_RX_QUEUE 1 105 106 #define MAX_RX_COUNT 64 107 #define MAX_TX_QUEUE_COUNT 9 108 109 extern int hwwep; 110 111 enum nic_t { 112 NIC_UNKNOWN = 0, 113 NIC_8192E = 1, 114 NIC_8190P = 2, 115 NIC_8192SE = 4, 116 NIC_8192CE = 5, 117 NIC_8192CU = 6, 118 NIC_8192DE = 7, 119 NIC_8192DU = 8, 120 }; 121 122 enum rt_eeprom_type { 123 EEPROM_93C46, 124 EEPROM_93C56, 125 }; 126 127 enum dcmg_txcmd_op { 128 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000, 129 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001, 130 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002, 131 TXCMD_SET_TX_DURATION = 0xFF900003, 132 TXCMD_SET_RX_RSSI = 0xFF900004, 133 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005, 134 TXCMD_XXXX_CTRL, 135 }; 136 137 enum rt_rf_type_819xu { 138 RF_TYPE_MIN = 0, 139 RF_8225, 140 RF_8256, 141 RF_8258, 142 RF_6052 = 4, 143 RF_PSEUDO_11N = 5, 144 }; 145 146 enum rt_customer_id { 147 RT_CID_DEFAULT = 0, 148 RT_CID_819x_CAMEO = 6, 149 RT_CID_819x_RUNTOP = 7, 150 RT_CID_TOSHIBA = 9, 151 RT_CID_819X_NETCORE = 10, 152 RT_CID_Nettronix = 11, 153 RT_CID_DLINK = 12, 154 RT_CID_PRONET = 13, 155 }; 156 157 enum reset_type { 158 RESET_TYPE_NORESET = 0x00, 159 RESET_TYPE_NORMAL = 0x01, 160 RESET_TYPE_SILENT = 0x02 161 }; 162 163 struct rt_stats { 164 unsigned long received_rate_histogram[4][32]; 165 unsigned long txbytesunicast; 166 unsigned long rxbytesunicast; 167 unsigned long txretrycount; 168 u8 last_packet_rate; 169 unsigned long slide_signal_strength[100]; 170 unsigned long slide_evm[100]; 171 unsigned long slide_rssi_total; 172 unsigned long slide_evm_total; 173 long signal_strength; 174 long last_signal_strength_inpercent; 175 long recv_signal_power; 176 u8 rx_rssi_percentage[4]; 177 u8 rx_evm_percentage[2]; 178 u32 slide_beacon_pwdb[100]; 179 u32 slide_beacon_total; 180 u32 CurrentShowTxate; 181 }; 182 183 struct init_gain { 184 u8 xaagccore1; 185 u8 xbagccore1; 186 u8 xcagccore1; 187 u8 xdagccore1; 188 u8 cca; 189 190 }; 191 192 struct tx_ring { 193 u32 *desc; 194 u8 nStuckCount; 195 struct tx_ring *next; 196 } __packed; 197 198 struct rtl8192_tx_ring { 199 struct tx_desc *desc; 200 dma_addr_t dma; 201 unsigned int idx; 202 unsigned int entries; 203 struct sk_buff_head queue; 204 }; 205 206 struct rtl819x_ops { 207 enum nic_t nic_type; 208 void (*get_eeprom_size)(struct net_device *dev); 209 void (*init_adapter_variable)(struct net_device *dev); 210 void (*init_before_adapter_start)(struct net_device *dev); 211 bool (*initialize_adapter)(struct net_device *dev); 212 void (*link_change)(struct net_device *dev); 213 void (*tx_fill_descriptor)(struct net_device *dev, 214 struct tx_desc *tx_desc, 215 struct cb_desc *cb_desc, 216 struct sk_buff *skb); 217 void (*tx_fill_cmd_descriptor)(struct net_device *dev, 218 struct tx_desc_cmd *entry, 219 struct cb_desc *cb_desc, 220 struct sk_buff *skb); 221 bool (*rx_query_status_descriptor)(struct net_device *dev, 222 struct rtllib_rx_stats *stats, 223 struct rx_desc *pdesc, 224 struct sk_buff *skb); 225 bool (*rx_command_packet_handler)(struct net_device *dev, 226 struct sk_buff *skb, 227 struct rx_desc *pdesc); 228 void (*stop_adapter)(struct net_device *dev, bool reset); 229 void (*update_ratr_table)(struct net_device *dev); 230 void (*irq_enable)(struct net_device *dev); 231 void (*irq_disable)(struct net_device *dev); 232 void (*irq_clear)(struct net_device *dev); 233 void (*rx_enable)(struct net_device *dev); 234 void (*tx_enable)(struct net_device *dev); 235 void (*interrupt_recognized)(struct net_device *dev, 236 u32 *p_inta, u32 *p_intb); 237 bool (*tx_check_stuck_handler)(struct net_device *dev); 238 bool (*rx_check_stuck_handler)(struct net_device *dev); 239 }; 240 241 struct r8192_priv { 242 struct pci_dev *pdev; 243 struct pci_dev *bridge_pdev; 244 245 bool bfirst_after_down; 246 bool being_init_adapter; 247 248 int irq; 249 short irq_enabled; 250 251 short up; 252 short up_first_time; 253 struct delayed_work update_beacon_wq; 254 struct delayed_work watch_dog_wq; 255 struct delayed_work txpower_tracking_wq; 256 struct delayed_work rfpath_check_wq; 257 struct delayed_work gpio_change_rf_wq; 258 struct rtl819x_ops *ops; 259 struct rtllib_device *rtllib; 260 261 struct work_struct reset_wq; 262 263 enum rt_customer_id customer_id; 264 265 enum rt_rf_type_819xu rf_chip; 266 enum ht_channel_width current_chnl_bw; 267 struct bb_reg_definition phy_reg_def[4]; 268 struct rate_adaptive rate_adaptive; 269 270 struct rt_firmware *fw_info; 271 enum rtl819x_loopback loopback_mode; 272 273 struct timer_list watch_dog_timer; 274 struct timer_list fsync_timer; 275 struct timer_list gpio_polling_timer; 276 277 spinlock_t irq_th_lock; 278 spinlock_t tx_lock; 279 spinlock_t rf_ps_lock; 280 spinlock_t ps_lock; 281 282 struct sk_buff_head skb_queue; 283 284 struct tasklet_struct irq_rx_tasklet; 285 struct tasklet_struct irq_tx_tasklet; 286 struct tasklet_struct irq_prepare_beacon_tasklet; 287 288 struct mutex wx_mutex; 289 struct mutex rf_mutex; 290 struct mutex mutex; 291 292 struct rt_stats stats; 293 struct iw_statistics wstats; 294 295 short (*rf_set_sens)(struct net_device *dev, short sens); 296 u8 (*rf_set_chan)(struct net_device *dev, u8 ch); 297 298 struct rx_desc *rx_ring[MAX_RX_QUEUE]; 299 struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT]; 300 dma_addr_t rx_ring_dma[MAX_RX_QUEUE]; 301 unsigned int rx_idx[MAX_RX_QUEUE]; 302 int rxringcount; 303 u16 rxbuffersize; 304 305 u64 last_rx_desc_tsf; 306 307 u32 receive_config; 308 u8 retry_data; 309 u8 retry_rts; 310 u16 rts; 311 312 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT]; 313 int txringcount; 314 atomic_t tx_pending[0x10]; 315 316 u16 short_retry_limit; 317 u16 long_retry_limit; 318 319 bool hw_radio_off; 320 bool blinked_ingpio; 321 u8 polling_timer_on; 322 323 /**********************************************************/ 324 325 enum card_type { 326 PCI, MINIPCI, 327 CARDBUS, USB 328 } card_type; 329 330 struct work_struct qos_activate; 331 332 short promisc; 333 334 short chan; 335 short sens; 336 short max_sens; 337 bool ps_force; 338 339 u32 irq_mask[2]; 340 341 u8 rf_mode; 342 enum nic_t card_8192; 343 u8 card_8192_version; 344 345 u8 rf_type; 346 u8 ic_cut; 347 char nick[IW_ESSID_MAX_SIZE + 1]; 348 u8 check_roaming_cnt; 349 350 u32 silent_reset_rx_slot_index; 351 u32 silent_reset_rx_stuck_event[MAX_SILENT_RESET_RX_SLOT_NUM]; 352 353 u16 basic_rate; 354 u8 short_preamble; 355 u8 dot11_current_preamble_mode; 356 u8 slot_time; 357 358 bool autoload_fail_flag; 359 360 short epromtype; 361 u16 eeprom_vid; 362 u16 eeprom_did; 363 u8 eeprom_customer_id; 364 u16 eeprom_chnl_plan; 365 366 u8 eeprom_tx_pwr_level_cck[14]; 367 u8 eeprom_tx_pwr_level_ofdm24g[14]; 368 u16 eeprom_ant_pwr_diff; 369 u8 eeprom_thermal_meter; 370 u8 eeprom_crystal_cap; 371 372 u8 eeprom_legacy_ht_tx_pwr_diff; 373 374 u8 crystal_cap; 375 u8 thermal_meter[2]; 376 377 u8 sw_chnl_in_progress; 378 u8 sw_chnl_stage; 379 u8 sw_chnl_step; 380 u8 set_bw_mode_in_progress; 381 382 u8 n_cur_40mhz_prime_sc; 383 384 u32 rf_reg_0value[4]; 385 u8 num_total_rf_path; 386 bool brfpath_rxenable[4]; 387 388 bool tx_pwr_data_read_from_eeprom; 389 390 u16 reg_chnl_plan; 391 u16 chnl_plan; 392 u8 hw_rf_off_action; 393 394 bool rf_change_in_progress; 395 bool set_rf_pwr_state_in_progress; 396 bool bdisable_nic; 397 398 u8 cck_pwr_enl; 399 u16 tssi_13dBm; 400 u32 pwr_track; 401 u8 cck_present_attn_20m_def; 402 u8 cck_present_attn_40m_def; 403 s8 cck_present_attn_diff; 404 s8 cck_present_attn; 405 long undecorated_smoothed_pwdb; 406 407 u32 mcs_tx_pwr_level_org_offset[6]; 408 u8 tx_pwr_level_cck[14]; 409 u8 tx_pwr_level_ofdm_24g[14]; 410 u8 legacy_ht_tx_pwr_diff; 411 u8 antenna_tx_pwr_diff[3]; 412 413 bool dynamic_tx_high_pwr; 414 bool dynamic_tx_low_pwr; 415 bool last_dtp_flag_high; 416 bool last_dtp_flag_low; 417 418 u8 rfa_txpowertrackingindex; 419 u8 rfa_txpowertrackingindex_real; 420 u8 rfa_txpowertracking_default; 421 u8 rfc_txpowertrackingindex; 422 u8 rfc_txpowertrackingindex_real; 423 bool btxpower_tracking; 424 bool bcck_in_ch14; 425 426 u8 txpower_count; 427 bool tx_pwr_tracking_init; 428 429 u8 ofdm_index[2]; 430 u8 cck_index; 431 432 u8 rec_cck_20m_idx; 433 u8 rec_cck_40m_idx; 434 435 struct init_gain initgain_backup; 436 u8 def_initial_gain[4]; 437 bool bis_any_nonbepkts; 438 bool bcurrent_turbo_EDCA; 439 bool bis_cur_rdlstate; 440 441 bool bfsync_processing; 442 u32 rate_record; 443 u32 rate_count_diff_rec; 444 u32 continue_diff_count; 445 bool bswitch_fsync; 446 u8 framesync; 447 u8 frame_sync_monitor; 448 449 u32 reset_count; 450 451 enum reset_type rst_progress; 452 u16 tx_counter; 453 u16 rx_ctr; 454 bool reset_in_progress; 455 bool force_reset; 456 bool force_lps; 457 458 bool chan_forced; 459 }; 460 461 extern const struct ethtool_ops rtl819x_ethtool_ops; 462 463 u8 rtl92e_readb(struct net_device *dev, int x); 464 u32 rtl92e_readl(struct net_device *dev, int x); 465 u16 rtl92e_readw(struct net_device *dev, int x); 466 void rtl92e_writeb(struct net_device *dev, int x, u8 y); 467 void rtl92e_writew(struct net_device *dev, int x, u16 y); 468 void rtl92e_writel(struct net_device *dev, int x, u32 y); 469 470 void force_pci_posting(struct net_device *dev); 471 472 void rtl92e_rx_enable(struct net_device *dev); 473 void rtl92e_tx_enable(struct net_device *dev); 474 475 void rtl92e_hw_sleep_wq(void *data); 476 void rtl92e_commit(struct net_device *dev); 477 478 void rtl92e_check_rfctrl_gpio_timer(struct timer_list *t); 479 480 void rtl92e_hw_wakeup_wq(void *data); 481 482 void rtl92e_reset_desc_ring(struct net_device *dev); 483 void rtl92e_set_wireless_mode(struct net_device *dev, u8 wireless_mode); 484 void rtl92e_irq_enable(struct net_device *dev); 485 void rtl92e_config_rate(struct net_device *dev, u16 *rate_config); 486 void rtl92e_irq_disable(struct net_device *dev); 487 488 void rtl92e_update_rx_pkt_timestamp(struct net_device *dev, 489 struct rtllib_rx_stats *stats); 490 long rtl92e_translate_to_dbm(struct r8192_priv *priv, u8 signal_strength_index); 491 void rtl92e_update_rx_statistics(struct r8192_priv *priv, 492 struct rtllib_rx_stats *pprevious_stats); 493 u8 rtl92e_evm_db_to_percent(s8 value); 494 u8 rtl92e_rx_db_to_percent(s8 antpower); 495 void rtl92e_copy_mpdu_stats(struct rtllib_rx_stats *psrc_stats, 496 struct rtllib_rx_stats *ptarget_stats); 497 bool rtl92e_enable_nic(struct net_device *dev); 498 bool rtl92e_disable_nic(struct net_device *dev); 499 500 bool rtl92e_set_rf_state(struct net_device *dev, 501 enum rt_rf_power_state state_to_set, 502 RT_RF_CHANGE_SOURCE change_source); 503 #endif 504