1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4  *
5  * Based on the r8180 driver, which is:
6  * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
7  *
8  * Contact Information: wlanfae <wlanfae@realtek.com>
9  */
10 #ifndef _RTL_CORE_H
11 #define _RTL_CORE_H
12 
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/ioport.h>
16 #include <linux/sched.h>
17 #include <linux/types.h>
18 #include <linux/interrupt.h>
19 #include <linux/slab.h>
20 #include <linux/netdevice.h>
21 #include <linux/pci.h>
22 #include <linux/etherdevice.h>
23 #include <linux/delay.h>
24 #include <linux/rtnetlink.h>
25 #include <linux/wireless.h>
26 #include <linux/timer.h>
27 #include <linux/proc_fs.h>
28 #include <linux/if_arp.h>
29 #include <linux/random.h>
30 #include <linux/io.h>
31 
32 /* Need this defined before including local include files */
33 #define DRV_NAME "rtl819xE"
34 
35 #include "../rtllib.h"
36 
37 #include "../dot11d.h"
38 
39 #include "r8192E_firmware.h"
40 #include "r8192E_hw.h"
41 
42 #include "r8190P_def.h"
43 #include "r8192E_dev.h"
44 
45 #include "rtl_eeprom.h"
46 #include "rtl_ps.h"
47 #include "rtl_pci.h"
48 #include "rtl_cam.h"
49 
50 #define DRV_COPYRIGHT		\
51 	"Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
52 #define DRV_AUTHOR  "<wlanfae@realtek.com>"
53 #define DRV_VERSION  "0014.0401.2010"
54 
55 #define TOTAL_CAM_ENTRY		32
56 #define CAM_CONTENT_COUNT	8
57 
58 #define HAL_HW_PCI_REVISION_ID_8192PCIE		0x01
59 #define HAL_HW_PCI_REVISION_ID_8192SE	0x10
60 
61 #define RTLLIB_WATCH_DOG_TIME		2000
62 
63 #define MAX_DEV_ADDR_SIZE		8  /*support till 64 bit bus width OS*/
64 #define MAX_FIRMWARE_INFORMATION_SIZE   32
65 #define MAX_802_11_HEADER_LENGTH	(40 + MAX_FIRMWARE_INFORMATION_SIZE)
66 #define ENCRYPTION_MAX_OVERHEAD		128
67 #define MAX_FRAGMENT_COUNT		8
68 #define MAX_TRANSMIT_BUFFER_SIZE	\
69 	(1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) *	\
70 	 MAX_FRAGMENT_COUNT)
71 
72 #define CMDPACKET_FRAG_SIZE (4 * (MAX_TRANSMIT_BUFFER_SIZE / 4) - 8)
73 
74 #define DEFAULT_FRAG_THRESHOLD	2342U
75 #define MIN_FRAG_THRESHOLD	256U
76 #define DEFAULT_BEACONINTERVAL	0x64U
77 
78 #define DEFAULT_RETRY_RTS	7
79 #define DEFAULT_RETRY_DATA	7
80 
81 #define	PHY_RSSI_SLID_WIN_MAX			100
82 
83 #define TX_BB_GAIN_TABLE_LEN			37
84 #define CCK_TX_BB_GAIN_TABLE_LEN		23
85 
86 #define CHANNEL_PLAN_LEN			10
87 #define S_CRC_LEN				4
88 
89 #define NIC_SEND_HANG_THRESHOLD_NORMAL		4
90 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE	8
91 
92 #define MAX_TX_QUEUE				9
93 
94 #define MAX_RX_QUEUE				1
95 
96 #define MAX_RX_COUNT				64
97 #define MAX_TX_QUEUE_COUNT			9
98 
99 extern int hwwep;
100 
101 enum nic_t {
102 	NIC_UNKNOWN     = 0,
103 	NIC_8192E       = 1,
104 	NIC_8190P       = 2,
105 	NIC_8192SE      = 4,
106 	NIC_8192CE	= 5,
107 	NIC_8192CU	= 6,
108 	NIC_8192DE	= 7,
109 	NIC_8192DU	= 8,
110 };
111 
112 enum rt_eeprom_type {
113 	EEPROM_93C46,
114 	EEPROM_93C56,
115 };
116 
117 enum dcmg_txcmd_op {
118 	TXCMD_TXRA_HISTORY_CTRL		= 0xFF900000,
119 	TXCMD_RESET_TX_PKT_BUFF		= 0xFF900001,
120 	TXCMD_RESET_RX_PKT_BUFF		= 0xFF900002,
121 	TXCMD_SET_TX_DURATION		= 0xFF900003,
122 	TXCMD_SET_RX_RSSI		= 0xFF900004,
123 	TXCMD_SET_TX_PWR_TRACKING	= 0xFF900005,
124 	TXCMD_XXXX_CTRL,
125 };
126 
127 enum rt_customer_id {
128 	RT_CID_DEFAULT	  = 0,
129 	RT_CID_TOSHIBA	  = 9,
130 	RT_CID_819X_NETCORE     = 10,
131 };
132 
133 enum reset_type {
134 	RESET_TYPE_NORESET = 0x00,
135 	RESET_TYPE_NORMAL = 0x01,
136 	RESET_TYPE_SILENT = 0x02
137 };
138 
139 struct rt_stats {
140 	unsigned long received_rate_histogram[4][32];
141 	unsigned long txbytesunicast;
142 	unsigned long rxbytesunicast;
143 	unsigned long txretrycount;
144 	u8	last_packet_rate;
145 	unsigned long slide_signal_strength[100];
146 	unsigned long slide_evm[100];
147 	unsigned long	slide_rssi_total;
148 	unsigned long slide_evm_total;
149 	long signal_strength;
150 	long last_signal_strength_inpercent;
151 	long	recv_signal_power;
152 	u8 rx_rssi_percentage[4];
153 	u8 rx_evm_percentage[2];
154 	u32 slide_beacon_pwdb[100];
155 	u32 slide_beacon_total;
156 	u32	CurrentShowTxate;
157 };
158 
159 struct init_gain {
160 	u8	xaagccore1;
161 	u8	xbagccore1;
162 	u8	xcagccore1;
163 	u8	xdagccore1;
164 	u8	cca;
165 
166 };
167 
168 struct tx_ring {
169 	u32 *desc;
170 	u8 nStuckCount;
171 	struct tx_ring *next;
172 } __packed;
173 
174 struct rtl8192_tx_ring {
175 	struct tx_desc *desc;
176 	dma_addr_t dma;
177 	unsigned int idx;
178 	unsigned int entries;
179 	struct sk_buff_head queue;
180 };
181 
182 struct r8192_priv {
183 	struct pci_dev *pdev;
184 	struct pci_dev *bridge_pdev;
185 
186 	bool		bfirst_after_down;
187 	bool		being_init_adapter;
188 
189 	int		irq;
190 	short	irq_enabled;
191 
192 	short	up;
193 	short	up_first_time;
194 	struct delayed_work		update_beacon_wq;
195 	struct delayed_work		watch_dog_wq;
196 	struct delayed_work		txpower_tracking_wq;
197 	struct delayed_work		rfpath_check_wq;
198 	struct delayed_work		gpio_change_rf_wq;
199 	struct rtllib_device			*rtllib;
200 
201 	struct work_struct				reset_wq;
202 
203 	enum rt_customer_id customer_id;
204 
205 	enum ht_channel_width current_chnl_bw;
206 	struct bb_reg_definition phy_reg_def[4];
207 	struct rate_adaptive rate_adaptive;
208 
209 	struct rt_firmware *fw_info;
210 	enum rtl819x_loopback loopback_mode;
211 
212 	struct timer_list			watch_dog_timer;
213 	struct timer_list			fsync_timer;
214 	struct timer_list			gpio_polling_timer;
215 
216 	spinlock_t				irq_th_lock;
217 	spinlock_t				tx_lock;
218 	spinlock_t				rf_ps_lock;
219 	spinlock_t				ps_lock;
220 
221 	struct sk_buff_head		skb_queue;
222 
223 	struct tasklet_struct		irq_rx_tasklet;
224 	struct tasklet_struct		irq_tx_tasklet;
225 	struct tasklet_struct		irq_prepare_beacon_tasklet;
226 
227 	struct mutex				wx_mutex;
228 	struct mutex				rf_mutex;
229 	struct mutex				mutex;
230 
231 	struct rt_stats stats;
232 	struct iw_statistics			wstats;
233 
234 	u8 (*rf_set_chan)(struct net_device *dev, u8 ch);
235 
236 	struct rx_desc *rx_ring[MAX_RX_QUEUE];
237 	struct sk_buff	*rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
238 	dma_addr_t	rx_ring_dma[MAX_RX_QUEUE];
239 	unsigned int	rx_idx[MAX_RX_QUEUE];
240 	int		rxringcount;
241 	u16		rxbuffersize;
242 
243 	u64 last_rx_desc_tsf;
244 
245 	u32 receive_config;
246 	u8		retry_data;
247 	u8		retry_rts;
248 	u16		rts;
249 
250 	struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
251 	int		 txringcount;
252 	atomic_t	tx_pending[0x10];
253 
254 	u16 short_retry_limit;
255 	u16 long_retry_limit;
256 
257 	bool		hw_radio_off;
258 	bool		blinked_ingpio;
259 	u8		polling_timer_on;
260 
261 	/**********************************************************/
262 	struct work_struct qos_activate;
263 
264 	short	promisc;
265 
266 	short	chan;
267 	bool ps_force;
268 
269 	u32 irq_mask[2];
270 
271 	u8 rf_mode;
272 	enum nic_t card_8192;
273 	u8 card_8192_version;
274 
275 	u8 ic_cut;
276 	char nick[IW_ESSID_MAX_SIZE + 1];
277 	u8 check_roaming_cnt;
278 
279 	u32 silent_reset_rx_slot_index;
280 	u32 silent_reset_rx_stuck_event[MAX_SILENT_RESET_RX_SLOT_NUM];
281 
282 	u16 basic_rate;
283 	u8 short_preamble;
284 	u8 dot11_current_preamble_mode;
285 	u8 slot_time;
286 
287 	bool autoload_fail_flag;
288 
289 	short	epromtype;
290 	u16 eeprom_vid;
291 	u16 eeprom_did;
292 	u8 eeprom_customer_id;
293 	u16 eeprom_chnl_plan;
294 
295 	u8 eeprom_tx_pwr_level_cck[14];
296 	u8 eeprom_tx_pwr_level_ofdm24g[14];
297 	u16 eeprom_ant_pwr_diff;
298 	u8 eeprom_thermal_meter;
299 	u8 eeprom_crystal_cap;
300 
301 	u8 eeprom_legacy_ht_tx_pwr_diff;
302 
303 	u8 crystal_cap;
304 	u8 thermal_meter[2];
305 
306 	u8 sw_chnl_in_progress;
307 	u8 sw_chnl_stage;
308 	u8 sw_chnl_step;
309 	u8 set_bw_mode_in_progress;
310 
311 	u8 n_cur_40mhz_prime_sc;
312 
313 	u32 rf_reg_0value[4];
314 	u8 num_total_rf_path;
315 	bool brfpath_rxenable[4];
316 
317 	bool tx_pwr_data_read_from_eeprom;
318 
319 	u16 chnl_plan;
320 	u8 hw_rf_off_action;
321 
322 	bool rf_change_in_progress;
323 	bool set_rf_pwr_state_in_progress;
324 
325 	u8 cck_pwr_enl;
326 	u16 tssi_13dBm;
327 	u32 pwr_track;
328 	u8 cck_present_attn_20m_def;
329 	u8 cck_present_attn_40m_def;
330 	s8 cck_present_attn_diff;
331 	s8 cck_present_attn;
332 	long undecorated_smoothed_pwdb;
333 
334 	u32 mcs_tx_pwr_level_org_offset[6];
335 	u8 tx_pwr_level_cck[14];
336 	u8 tx_pwr_level_ofdm_24g[14];
337 	u8 legacy_ht_tx_pwr_diff;
338 	u8 antenna_tx_pwr_diff[3];
339 
340 	bool		dynamic_tx_high_pwr;
341 	bool		dynamic_tx_low_pwr;
342 	bool		last_dtp_flag_high;
343 	bool		last_dtp_flag_low;
344 
345 	u8		rfa_txpowertrackingindex;
346 	u8		rfa_txpowertrackingindex_real;
347 	u8		rfa_txpowertracking_default;
348 	u8		rfc_txpowertrackingindex;
349 	bool		btxpower_tracking;
350 	bool		bcck_in_ch14;
351 
352 	u8		txpower_count;
353 	bool		tx_pwr_tracking_init;
354 
355 	u8		ofdm_index[2];
356 	u8		cck_index;
357 
358 	u8		rec_cck_20m_idx;
359 	u8		rec_cck_40m_idx;
360 
361 	struct init_gain initgain_backup;
362 	u8		def_initial_gain[4];
363 	bool		bis_any_nonbepkts;
364 	bool		bcurrent_turbo_EDCA;
365 	bool		bis_cur_rdlstate;
366 
367 	u32		rate_record;
368 	u32		rate_count_diff_rec;
369 	u32		continue_diff_count;
370 	bool		bswitch_fsync;
371 	u8		framesync;
372 	u32		reset_count;
373 
374 	enum reset_type rst_progress;
375 	u16		tx_counter;
376 	u16		rx_ctr;
377 	bool		reset_in_progress;
378 	bool		force_reset;
379 	bool		force_lps;
380 };
381 
382 extern const struct ethtool_ops rtl819x_ethtool_ops;
383 
384 u8 rtl92e_readb(struct net_device *dev, int x);
385 u32 rtl92e_readl(struct net_device *dev, int x);
386 u16 rtl92e_readw(struct net_device *dev, int x);
387 void rtl92e_writeb(struct net_device *dev, int x, u8 y);
388 void rtl92e_writew(struct net_device *dev, int x, u16 y);
389 void rtl92e_writel(struct net_device *dev, int x, u32 y);
390 
391 void force_pci_posting(struct net_device *dev);
392 
393 void rtl92e_rx_enable(struct net_device *dev);
394 void rtl92e_tx_enable(struct net_device *dev);
395 
396 void rtl92e_hw_sleep_wq(void *data);
397 void rtl92e_commit(struct net_device *dev);
398 
399 void rtl92e_check_rfctrl_gpio_timer(struct timer_list *t);
400 
401 void rtl92e_hw_wakeup_wq(void *data);
402 
403 void rtl92e_reset_desc_ring(struct net_device *dev);
404 void rtl92e_set_wireless_mode(struct net_device *dev, u8 wireless_mode);
405 void rtl92e_irq_enable(struct net_device *dev);
406 void rtl92e_config_rate(struct net_device *dev, u16 *rate_config);
407 void rtl92e_irq_disable(struct net_device *dev);
408 
409 void rtl92e_update_rx_pkt_timestamp(struct net_device *dev,
410 				    struct rtllib_rx_stats *stats);
411 long rtl92e_translate_to_dbm(struct r8192_priv *priv, u8 signal_strength_index);
412 void rtl92e_update_rx_statistics(struct r8192_priv *priv,
413 				 struct rtllib_rx_stats *pprevious_stats);
414 u8 rtl92e_evm_db_to_percent(s8 value);
415 u8 rtl92e_rx_db_to_percent(s8 antpower);
416 void rtl92e_copy_mpdu_stats(struct rtllib_rx_stats *psrc_stats,
417 			    struct rtllib_rx_stats *ptarget_stats);
418 bool rtl92e_enable_nic(struct net_device *dev);
419 
420 bool rtl92e_set_rf_state(struct net_device *dev,
421 			 enum rt_rf_power_state state_to_set,
422 			 RT_RF_CHANGE_SOURCE change_source);
423 #endif
424