1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved. 4 * 5 * Contact Information: wlanfae <wlanfae@realtek.com> 6 */ 7 #ifndef __R8192UDM_H__ 8 #define __R8192UDM_H__ 9 10 11 /*--------------------------Define Parameters-------------------------------*/ 12 #define OFDM_Table_Length 19 13 #define CCK_Table_length 12 14 15 #define DM_DIG_THRESH_HIGH 40 16 #define DM_DIG_THRESH_LOW 35 17 18 #define DM_DIG_HIGH_PWR_THRESH_HIGH 75 19 #define DM_DIG_HIGH_PWR_THRESH_LOW 70 20 21 #define BW_AUTO_SWITCH_HIGH_LOW 25 22 #define BW_AUTO_SWITCH_LOW_HIGH 30 23 24 #define DM_DIG_BACKOFF 12 25 #define DM_DIG_MAX 0x36 26 #define DM_DIG_MIN 0x1c 27 #define DM_DIG_MIN_Netcore 0x12 28 29 #define RxPathSelection_SS_TH_low 30 30 #define RxPathSelection_diff_TH 18 31 32 #define RateAdaptiveTH_High 50 33 #define RateAdaptiveTH_Low_20M 30 34 #define RateAdaptiveTH_Low_40M 10 35 #define VeryLowRSSI 15 36 37 #define WAIotTHVal 25 38 39 #define E_FOR_TX_POWER_TRACK 300 40 #define TX_POWER_NEAR_FIELD_THRESH_HIGH 68 41 #define TX_POWER_NEAR_FIELD_THRESH_LOW 62 42 #define TX_POWER_ATHEROAP_THRESH_HIGH 78 43 #define TX_POWER_ATHEROAP_THRESH_LOW 72 44 45 #define CURRENT_TX_RATE_REG 0x1e0 46 #define INITIAL_TX_RATE_REG 0x1e1 47 #define TX_RETRY_COUNT_REG 0x1ac 48 #define RegC38_TH 20 49 50 #define DM_Type_ByDriver 1 51 52 /*--------------------------Define Parameters-------------------------------*/ 53 54 55 /*------------------------------Define structure----------------------------*/ 56 struct dig_t { 57 u8 dig_enable_flag; 58 u8 dig_algorithm; 59 u8 dig_algorithm_switch; 60 61 long rssi_low_thresh; 62 long rssi_high_thresh; 63 64 long rssi_high_power_lowthresh; 65 long rssi_high_power_highthresh; 66 67 u8 dig_state; 68 u8 dig_highpwr_state; 69 u8 CurSTAConnectState; 70 u8 PreSTAConnectState; 71 72 u8 curpd_thstate; 73 u8 prepd_thstate; 74 u8 curcs_ratio_state; 75 u8 precs_ratio_state; 76 77 u32 pre_ig_value; 78 u32 cur_ig_value; 79 80 u8 backoff_val; 81 u8 rx_gain_range_max; 82 u8 rx_gain_range_min; 83 84 long rssi_val; 85 }; 86 87 enum dm_dig_sta { 88 DM_STA_DIG_OFF = 0, 89 DM_STA_DIG_ON, 90 DM_STA_DIG_MAX 91 }; 92 93 94 enum dm_ratr_sta { 95 DM_RATR_STA_HIGH = 0, 96 DM_RATR_STA_MIDDLE = 1, 97 DM_RATR_STA_LOW = 2, 98 DM_RATR_STA_MAX 99 }; 100 101 enum dm_dig_alg { 102 DIG_ALGO_BY_FALSE_ALARM = 0, 103 DIG_ALGO_BY_RSSI = 1, 104 DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM = 2, 105 DIG_ALGO_BY_TOW_PORT = 3, 106 DIG_ALGO_MAX 107 }; 108 109 enum dm_dig_connect { 110 DIG_STA_DISCONNECT = 0, 111 DIG_STA_CONNECT = 1, 112 DIG_STA_BEFORE_CONNECT = 2, 113 DIG_AP_DISCONNECT = 3, 114 DIG_AP_CONNECT = 4, 115 DIG_AP_ADD_STATION = 5, 116 DIG_CONNECT_MAX 117 }; 118 119 enum dm_dig_pd_th { 120 DIG_PD_AT_LOW_POWER = 0, 121 DIG_PD_AT_NORMAL_POWER = 1, 122 DIG_PD_AT_HIGH_POWER = 2, 123 DIG_PD_MAX 124 }; 125 126 enum dm_dig_cs_ratio { 127 DIG_CS_RATIO_LOWER = 0, 128 DIG_CS_RATIO_HIGHER = 1, 129 DIG_CS_MAX 130 }; 131 132 struct drx_path_sel { 133 u8 Enable; 134 u8 cck_method; 135 u8 cck_Rx_path; 136 137 u8 SS_TH_low; 138 u8 diff_TH; 139 u8 disabledRF; 140 u8 reserved; 141 142 u8 rf_rssi[4]; 143 u8 rf_enable_rssi_th[4]; 144 long cck_pwdb_sta[4]; 145 }; 146 147 enum dm_cck_rx_path_method { 148 CCK_Rx_Version_1 = 0, 149 CCK_Rx_Version_2 = 1, 150 CCK_Rx_Version_MAX 151 }; 152 153 154 struct dcmd_txcmd { 155 u32 Op; 156 u32 Length; 157 u32 Value; 158 }; 159 /*------------------------------Define structure----------------------------*/ 160 161 162 /*------------------------Export global variable----------------------------*/ 163 extern struct dig_t dm_digtable; 164 extern struct drx_path_sel DM_RxPathSelTable; 165 166 /* Pre-calculated gain tables */ 167 extern const u32 dm_tx_bb_gain[TxBBGainTableLength]; 168 extern const u8 dm_cck_tx_bb_gain[CCKTxBBGainTableLength][8]; 169 extern const u8 dm_cck_tx_bb_gain_ch14[CCKTxBBGainTableLength][8]; 170 /* Maps table index to iq amplify gain (dB, 12 to -24dB) */ 171 #define dm_tx_bb_gain_idx_to_amplify(idx) (-idx + 12) 172 173 /*------------------------Export global variable----------------------------*/ 174 175 176 /*--------------------------Exported Function prototype---------------------*/ 177 /*--------------------------Exported Function prototype---------------------*/ 178 179 void rtl92e_dm_init(struct net_device *dev); 180 void rtl92e_dm_deinit(struct net_device *dev); 181 182 void rtl92e_dm_watchdog(struct net_device *dev); 183 184 185 void rtl92e_init_adaptive_rate(struct net_device *dev); 186 void rtl92e_dm_txpower_tracking_wq(void *data); 187 188 void rtl92e_dm_cck_txpower_adjust(struct net_device *dev, bool binch14); 189 190 void rtl92e_dm_restore_state(struct net_device *dev); 191 void rtl92e_dm_backup_state(struct net_device *dev); 192 void rtl92e_dm_init_edca_turbo(struct net_device *dev); 193 void rtl92e_dm_rf_pathcheck_wq(void *data); 194 void rtl92e_dm_init_txpower_tracking(struct net_device *dev); 195 #endif /*__R8192UDM_H__ */ 196