1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 5 * 6 ******************************************************************************/ 7 #ifndef __HAL_COM_PHYCFG_H__ 8 #define __HAL_COM_PHYCFG_H__ 9 10 #define PathA 0x0 /* Useless */ 11 #define PathB 0x1 12 #define PathC 0x2 13 #define PathD 0x3 14 15 enum RATE_SECTION { 16 CCK = 0, 17 OFDM, 18 HT_MCS0_MCS7, 19 HT_MCS8_MCS15, 20 HT_MCS16_MCS23, 21 HT_MCS24_MCS31, 22 VHT_1SSMCS0_1SSMCS9, 23 VHT_2SSMCS0_2SSMCS9, 24 VHT_3SSMCS0_3SSMCS9, 25 VHT_4SSMCS0_4SSMCS9, 26 }; 27 28 enum RF_TX_NUM { 29 RF_1TX = 0, 30 RF_2TX, 31 RF_3TX, 32 RF_4TX, 33 RF_MAX_TX_NUM, 34 RF_TX_NUM_NONIMPLEMENT, 35 }; 36 37 #define MAX_POWER_INDEX 0x3F 38 39 enum _REGULATION_TXPWR_LMT { 40 TXPWR_LMT_FCC = 0, 41 TXPWR_LMT_MKK, 42 TXPWR_LMT_ETSI, 43 TXPWR_LMT_WW, 44 TXPWR_LMT_MAX_REGULATION_NUM, 45 }; 46 47 /*------------------------------Define structure----------------------------*/ 48 struct bb_register_def { 49 u32 rfintfs; /* set software control: */ 50 /* 0x870~0x877[8 bytes] */ 51 52 u32 rfintfo; /* output data: */ 53 /* 0x860~0x86f [16 bytes] */ 54 55 u32 rfintfe; /* output enable: */ 56 /* 0x860~0x86f [16 bytes] */ 57 58 u32 rf3wireOffset; /* LSSI data: */ 59 /* 0x840~0x84f [16 bytes] */ 60 61 u32 rfHSSIPara2; /* wire parameter control2 : */ 62 /* 0x824~0x827, 0x82c~0x82f, 63 * 0x834~0x837, 0x83c~0x83f 64 */ 65 u32 rfLSSIReadBack; /* LSSI RF readback data SI mode */ 66 /* 0x8a0~0x8af [16 bytes] */ 67 68 u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode 69 * 0x8b8-8bc for Path A and B */ 70 71 }; 72 73 u8 74 PHY_GetTxPowerByRateBase( 75 struct adapter * Adapter, 76 u8 Band, 77 u8 RfPath, 78 u8 TxNum, 79 enum RATE_SECTION RateSection 80 ); 81 82 u8 83 PHY_GetRateSectionIndexOfTxPowerByRate( 84 struct adapter *padapter, 85 u32 RegAddr, 86 u32 BitMask 87 ); 88 89 void 90 PHY_GetRateValuesOfTxPowerByRate( 91 struct adapter *padapter, 92 u32 RegAddr, 93 u32 BitMask, 94 u32 Value, 95 u8* RateIndex, 96 s8* PwrByRateVal, 97 u8* RateNum 98 ); 99 100 u8 101 PHY_GetRateIndexOfTxPowerByRate( 102 u8 Rate 103 ); 104 105 void 106 PHY_SetTxPowerIndexByRateSection( 107 struct adapter * padapter, 108 u8 RFPath, 109 u8 Channel, 110 u8 RateSection 111 ); 112 113 s8 114 PHY_GetTxPowerByRate( 115 struct adapter *padapter, 116 u8 Band, 117 u8 RFPath, 118 u8 TxNum, 119 u8 RateIndex 120 ); 121 122 void 123 PHY_SetTxPowerByRate( 124 struct adapter *padapter, 125 u8 Band, 126 u8 RFPath, 127 u8 TxNum, 128 u8 Rate, 129 s8 Value 130 ); 131 132 void 133 PHY_SetTxPowerLevelByPath( 134 struct adapter *Adapter, 135 u8 channel, 136 u8 path 137 ); 138 139 void 140 PHY_SetTxPowerIndexByRateArray( 141 struct adapter * padapter, 142 u8 RFPath, 143 enum CHANNEL_WIDTH BandWidth, 144 u8 Channel, 145 u8* Rates, 146 u8 RateArraySize 147 ); 148 149 void 150 PHY_InitTxPowerByRate( 151 struct adapter *padapter 152 ); 153 154 void 155 PHY_StoreTxPowerByRate( 156 struct adapter *padapter, 157 u32 Band, 158 u32 RfPath, 159 u32 TxNum, 160 u32 RegAddr, 161 u32 BitMask, 162 u32 Data 163 ); 164 165 void 166 PHY_TxPowerByRateConfiguration( 167 struct adapter * padapter 168 ); 169 170 u8 171 PHY_GetTxPowerIndexBase( 172 struct adapter * padapter, 173 u8 RFPath, 174 u8 Rate, 175 enum CHANNEL_WIDTH BandWidth, 176 u8 Channel, 177 bool *bIn24G 178 ); 179 180 s8 phy_get_tx_pwr_lmt (struct adapter *adapter, u32 RegPwrTblSel, 181 enum BAND_TYPE Band, enum CHANNEL_WIDTH Bandwidth, 182 u8 RfPath, 183 u8 DataRate, 184 u8 Channel 185 ); 186 187 void 188 PHY_SetTxPowerLimit( 189 struct adapter * Adapter, 190 u8 *Regulation, 191 u8 *Band, 192 u8 *Bandwidth, 193 u8 *RateSection, 194 u8 *RfPath, 195 u8 *Channel, 196 u8 *PowerLimit 197 ); 198 199 void 200 PHY_ConvertTxPowerLimitToPowerIndex( 201 struct adapter * Adapter 202 ); 203 204 void 205 PHY_InitTxPowerLimit( 206 struct adapter * Adapter 207 ); 208 209 s8 210 PHY_GetTxPowerTrackingOffset( 211 struct adapter *padapter, 212 u8 Rate, 213 u8 RFPath 214 ); 215 216 void 217 Hal_ChannelPlanToRegulation( 218 struct adapter * Adapter, 219 u16 ChannelPlan 220 ); 221 222 #define MAX_PARA_FILE_BUF_LEN 25600 223 224 #define LOAD_MAC_PARA_FILE BIT0 225 #define LOAD_BB_PARA_FILE BIT1 226 #define LOAD_BB_PG_PARA_FILE BIT2 227 #define LOAD_BB_MP_PARA_FILE BIT3 228 #define LOAD_RF_PARA_FILE BIT4 229 #define LOAD_RF_TXPWR_TRACK_PARA_FILE BIT5 230 #define LOAD_RF_TXPWR_LMT_PARA_FILE BIT6 231 232 int phy_ConfigMACWithParaFile(struct adapter *Adapter, char*pFileName); 233 234 int phy_ConfigBBWithParaFile(struct adapter *Adapter, char*pFileName, u32 ConfigType); 235 236 int phy_ConfigBBWithPgParaFile(struct adapter *Adapter, char*pFileName); 237 238 int phy_ConfigBBWithMpParaFile(struct adapter *Adapter, char*pFileName); 239 240 int PHY_ConfigRFWithParaFile(struct adapter *Adapter, char*pFileName, u8 eRFPath); 241 242 int PHY_ConfigRFWithTxPwrTrackParaFile(struct adapter *Adapter, char*pFileName); 243 244 int PHY_ConfigRFWithPowerLimitTableParaFile(struct adapter *Adapter, char*pFileName); 245 246 void phy_free_filebuf(struct adapter *padapter); 247 248 #endif /* __HAL_COMMON_H__ */ 249