xref: /linux/drivers/staging/vt6656/baseband.c (revision f86fd32d)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
4  * All rights reserved.
5  *
6  * File: baseband.c
7  *
8  * Purpose: Implement functions to access baseband
9  *
10  * Author: Jerry Chen
11  *
12  * Date: Jun. 5, 2002
13  *
14  * Functions:
15  *	vnt_get_frame_time	- Calculate data frame transmitting time
16  *	vnt_get_phy_field	- Calculate PhyLength, PhyService and Phy
17  *				  Signal parameter for baseband Tx
18  *	vnt_vt3184_init		- VIA VT3184 baseband chip init code
19  *
20  * Revision History:
21  *
22  *
23  */
24 
25 #include "mac.h"
26 #include "baseband.h"
27 #include "rf.h"
28 #include "usbpipe.h"
29 
30 static u8 vnt_vt3184_agc[] = {
31 	0x00, 0x00, 0x02, 0x02, 0x04, 0x04, 0x06, 0x06,
32 	0x08, 0x08, 0x0a, 0x0a, 0x0c, 0x0c, 0x0e, 0x0e, /* 0x0f */
33 	0x10, 0x10, 0x12, 0x12, 0x14, 0x14, 0x16, 0x16,
34 	0x18, 0x18, 0x1a, 0x1a, 0x1c, 0x1c, 0x1e, 0x1e, /* 0x1f */
35 	0x20, 0x20, 0x22, 0x22, 0x24, 0x24, 0x26, 0x26,
36 	0x28, 0x28, 0x2a, 0x2a, 0x2c, 0x2c, 0x2e, 0x2e, /* 0x2f */
37 	0x30, 0x30, 0x32, 0x32, 0x34, 0x34, 0x36, 0x36,
38 	0x38, 0x38, 0x3a, 0x3a, 0x3c, 0x3c, 0x3e, 0x3e  /* 0x3f */
39 };
40 
41 static u8 vnt_vt3184_al2230[] = {
42 	0x31, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
43 	0x70, 0x45, 0x2a, 0x76, 0x00, 0x00, 0x80, 0x00, /* 0x0f */
44 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
45 	0x00, 0x00, 0x00, 0x8e, 0x0a, 0x00, 0x00, 0x00, /* 0x1f */
46 	0x00, 0x00, 0x00, 0x00, 0x00, 0x4a, 0x00, 0x00,
47 	0x00, 0x00, 0x00, 0x00, 0x00, 0x4a, 0x00, 0x0c, /* 0x2f */
48 	0x26, 0x5b, 0x00, 0x00, 0x00, 0x00, 0xaa, 0xaa,
49 	0xff, 0xff, 0x79, 0x00, 0x00, 0x0b, 0x48, 0x04, /* 0x3f */
50 	0x00, 0x08, 0x00, 0x08, 0x08, 0x14, 0x05, 0x09,
51 	0x00, 0x00, 0x00, 0x00, 0x09, 0x73, 0x00, 0xc5, /* 0x4f */
52 	0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
53 	0x00, 0xd0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x5f */
54 	0xe4, 0x80, 0x00, 0x00, 0x00, 0x00, 0x98, 0x0a,
55 	0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x01, 0x00, /* 0x6f */
56 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
57 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x7f */
58 	0x8c, 0x01, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00,
59 	0x08, 0x00, 0x1f, 0xb7, 0x88, 0x47, 0xaa, 0x00, /* 0x8f */
60 	0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xeb,
61 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* 0x9f */
62 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
63 	0x18, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x18, /* 0xaf */
64 	0x38, 0x30, 0x00, 0x00, 0xff, 0x0f, 0xe4, 0xe2,
65 	0x00, 0x00, 0x00, 0x03, 0x01, 0x00, 0x00, 0x00, /* 0xbf */
66 	0x18, 0x20, 0x07, 0x18, 0xff, 0xff, 0x0e, 0x0a,
67 	0x0e, 0x00, 0x82, 0xa7, 0x3c, 0x10, 0x30, 0x05, /* 0xcf */
68 	0x40, 0x12, 0x00, 0x00, 0x10, 0x28, 0x80, 0x2a,
69 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0xdf */
70 	0x00, 0xf3, 0x00, 0x00, 0x00, 0x10, 0x00, 0x12,
71 	0x00, 0xf4, 0x00, 0xff, 0x79, 0x20, 0x30, 0x05, /* 0xef */
72 	0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
73 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00  /* 0xff */
74 };
75 
76 /* {{RobertYu:20060515, new BB setting for VT3226D0 */
77 static u8 vnt_vt3184_vt3226d0[] = {
78 	0x31, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
79 	0x70, 0x45, 0x2a, 0x76, 0x00, 0x00, 0x80, 0x00, /* 0x0f */
80 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
81 	0x00, 0x00, 0x00, 0x8e, 0x0a, 0x00, 0x00, 0x00, /* 0x1f */
82 	0x00, 0x00, 0x00, 0x00, 0x00, 0x4a, 0x00, 0x00,
83 	0x00, 0x00, 0x00, 0x00, 0x00, 0x4a, 0x00, 0x0c, /* 0x2f */
84 	0x26, 0x5b, 0x00, 0x00, 0x00, 0x00, 0xaa, 0xaa,
85 	0xff, 0xff, 0x79, 0x00, 0x00, 0x0b, 0x48, 0x04, /* 0x3f */
86 	0x00, 0x08, 0x00, 0x08, 0x08, 0x14, 0x05, 0x09,
87 	0x00, 0x00, 0x00, 0x00, 0x09, 0x73, 0x00, 0xc5, /* 0x4f */
88 	0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
89 	0x00, 0xd0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x5f */
90 	0xe4, 0x80, 0x00, 0x00, 0x00, 0x00, 0x98, 0x0a,
91 	0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x01, 0x00, /* 0x6f */
92 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
93 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x7f */
94 	0x8c, 0x01, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00,
95 	0x08, 0x00, 0x1f, 0xb7, 0x88, 0x47, 0xaa, 0x00, /* 0x8f */
96 	0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xeb,
97 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* 0x9f */
98 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
99 	0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, /* 0xaf */
100 	0x38, 0x30, 0x00, 0x00, 0xff, 0x0f, 0xe4, 0xe2,
101 	0x00, 0x00, 0x00, 0x03, 0x01, 0x00, 0x00, 0x00, /* 0xbf */
102 	0x18, 0x20, 0x07, 0x18, 0xff, 0xff, 0x10, 0x0a,
103 	0x0e, 0x00, 0x84, 0xa7, 0x3c, 0x10, 0x24, 0x05, /* 0xcf */
104 	0x40, 0x12, 0x00, 0x00, 0x10, 0x28, 0x80, 0x2a,
105 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0xdf */
106 	0x00, 0xf3, 0x00, 0x00, 0x00, 0x10, 0x00, 0x10,
107 	0x00, 0xf4, 0x00, 0xff, 0x79, 0x20, 0x30, 0x08, /* 0xef */
108 	0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
109 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00  /* 0xff */
110 };
111 
112 static const u16 vnt_frame_time[MAX_RATE] = {
113 	10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216
114 };
115 
116 /*
117  * Description: Calculate data frame transmitting time
118  *
119  * Parameters:
120  *  In:
121  *	preamble_type	- Preamble Type
122  *	pkt_type	- PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
123  *	frame_length	- Baseband Type
124  *	tx_rate		- Tx Rate
125  *  Out:
126  *
127  * Return Value: FrameTime
128  *
129  */
130 unsigned int vnt_get_frame_time(u8 preamble_type, u8 pkt_type,
131 				unsigned int frame_length, u16 tx_rate)
132 {
133 	unsigned int frame_time;
134 	unsigned int preamble;
135 	unsigned int tmp;
136 	unsigned int rate = 0;
137 
138 	if (tx_rate > RATE_54M)
139 		return 0;
140 
141 	rate = (unsigned int)vnt_frame_time[tx_rate];
142 
143 	if (tx_rate <= 3) {
144 		if (preamble_type == 1)
145 			preamble = 96;
146 		else
147 			preamble = 192;
148 
149 		frame_time = (frame_length * 80) / rate;
150 		tmp = (frame_time * rate) / 80;
151 
152 		if (frame_length != tmp)
153 			frame_time++;
154 
155 		return preamble + frame_time;
156 	}
157 	frame_time = (frame_length * 8 + 22) / rate;
158 	tmp = ((frame_time * rate) - 22) / 8;
159 
160 	if (frame_length != tmp)
161 		frame_time++;
162 
163 	frame_time = frame_time * 4;
164 
165 	if (pkt_type != PK_TYPE_11A)
166 		frame_time += 6;
167 	return 20 + frame_time;
168 }
169 
170 /*
171  * Description: Calculate Length, Service, and Signal fields of Phy for Tx
172  *
173  * Parameters:
174  *  In:
175  *      priv         - Device Structure
176  *      frame_length   - Tx Frame Length
177  *      tx_rate           - Tx Rate
178  *  Out:
179  *	struct vnt_phy_field *phy
180  *		- pointer to Phy Length field
181  *		- pointer to Phy Service field
182  *		- pointer to Phy Signal field
183  *
184  * Return Value: none
185  *
186  */
187 void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length,
188 		       u16 tx_rate, u8 pkt_type, struct vnt_phy_field *phy)
189 {
190 	u32 bit_count;
191 	u32 count = 0;
192 	u32 tmp;
193 	int ext_bit;
194 	u8 preamble_type = priv->preamble_type;
195 
196 	bit_count = frame_length * 8;
197 	ext_bit = false;
198 
199 	switch (tx_rate) {
200 	case RATE_1M:
201 		count = bit_count;
202 
203 		phy->signal = 0x00;
204 
205 		break;
206 	case RATE_2M:
207 		count = bit_count / 2;
208 
209 		if (preamble_type == 1)
210 			phy->signal = 0x09;
211 		else
212 			phy->signal = 0x01;
213 
214 		break;
215 	case RATE_5M:
216 		count = (bit_count * 10) / 55;
217 		tmp = (count * 55) / 10;
218 
219 		if (tmp != bit_count)
220 			count++;
221 
222 		if (preamble_type == 1)
223 			phy->signal = 0x0a;
224 		else
225 			phy->signal = 0x02;
226 
227 		break;
228 	case RATE_11M:
229 		count = bit_count / 11;
230 		tmp = count * 11;
231 
232 		if (tmp != bit_count) {
233 			count++;
234 
235 			if ((bit_count - tmp) <= 3)
236 				ext_bit = true;
237 		}
238 
239 		if (preamble_type == 1)
240 			phy->signal = 0x0b;
241 		else
242 			phy->signal = 0x03;
243 
244 		break;
245 	case RATE_6M:
246 		if (pkt_type == PK_TYPE_11A)
247 			phy->signal = 0x9b;
248 		else
249 			phy->signal = 0x8b;
250 
251 		break;
252 	case RATE_9M:
253 		if (pkt_type == PK_TYPE_11A)
254 			phy->signal = 0x9f;
255 		else
256 			phy->signal = 0x8f;
257 
258 		break;
259 	case RATE_12M:
260 		if (pkt_type == PK_TYPE_11A)
261 			phy->signal = 0x9a;
262 		else
263 			phy->signal = 0x8a;
264 
265 		break;
266 	case RATE_18M:
267 		if (pkt_type == PK_TYPE_11A)
268 			phy->signal = 0x9e;
269 		else
270 			phy->signal = 0x8e;
271 
272 		break;
273 	case RATE_24M:
274 		if (pkt_type == PK_TYPE_11A)
275 			phy->signal = 0x99;
276 		else
277 			phy->signal = 0x89;
278 
279 		break;
280 	case RATE_36M:
281 		if (pkt_type == PK_TYPE_11A)
282 			phy->signal = 0x9d;
283 		else
284 			phy->signal = 0x8d;
285 
286 		break;
287 	case RATE_48M:
288 		if (pkt_type == PK_TYPE_11A)
289 			phy->signal = 0x98;
290 		else
291 			phy->signal = 0x88;
292 
293 		break;
294 	case RATE_54M:
295 		if (pkt_type == PK_TYPE_11A)
296 			phy->signal = 0x9c;
297 		else
298 			phy->signal = 0x8c;
299 		break;
300 	default:
301 		if (pkt_type == PK_TYPE_11A)
302 			phy->signal = 0x9c;
303 		else
304 			phy->signal = 0x8c;
305 		break;
306 	}
307 
308 	if (pkt_type == PK_TYPE_11B) {
309 		phy->service = 0x00;
310 		if (ext_bit)
311 			phy->service |= 0x80;
312 		phy->len = cpu_to_le16((u16)count);
313 	} else {
314 		phy->service = 0x00;
315 		phy->len = cpu_to_le16((u16)frame_length);
316 	}
317 }
318 
319 /*
320  * Description: Set Antenna mode
321  *
322  * Parameters:
323  *  In:
324  *	priv		- Device Structure
325  *	antenna_mode	- Antenna Mode
326  *  Out:
327  *      none
328  *
329  * Return Value: none
330  *
331  */
332 int vnt_set_antenna_mode(struct vnt_private *priv, u8 antenna_mode)
333 {
334 	switch (antenna_mode) {
335 	case ANT_TXA:
336 	case ANT_TXB:
337 		break;
338 	case ANT_RXA:
339 		priv->bb_rx_conf &= 0xFC;
340 		break;
341 	case ANT_RXB:
342 		priv->bb_rx_conf &= 0xFE;
343 		priv->bb_rx_conf |= 0x02;
344 		break;
345 	}
346 
347 	return vnt_control_out(priv, MESSAGE_TYPE_SET_ANTMD,
348 			       (u16)antenna_mode, 0, 0, NULL);
349 }
350 
351 /*
352  * Description: Set Antenna mode
353  *
354  * Parameters:
355  *  In:
356  *      pDevice          - Device Structure
357  *      byAntennaMode    - Antenna Mode
358  *  Out:
359  *      none
360  *
361  * Return Value: none
362  *
363  */
364 
365 int vnt_vt3184_init(struct vnt_private *priv)
366 {
367 	int ret = 0;
368 	u16 length;
369 	u8 *addr;
370 	u8 *agc;
371 	u16 length_agc;
372 	u8 array[256];
373 	u8 data;
374 
375 	ret = vnt_control_in(priv, MESSAGE_TYPE_READ, 0, MESSAGE_REQUEST_EEPROM,
376 			     EEP_MAX_CONTEXT_SIZE, priv->eeprom);
377 	if (ret)
378 		goto end;
379 
380 	priv->rf_type = priv->eeprom[EEP_OFS_RFTYPE];
381 
382 	dev_dbg(&priv->usb->dev, "RF Type %d\n", priv->rf_type);
383 
384 	if (priv->rf_type == RF_AL2230 ||
385 	    priv->rf_type == RF_AL2230S) {
386 		priv->bb_rx_conf = vnt_vt3184_al2230[10];
387 		length = sizeof(vnt_vt3184_al2230);
388 		addr = vnt_vt3184_al2230;
389 		agc = vnt_vt3184_agc;
390 		length_agc = sizeof(vnt_vt3184_agc);
391 
392 		priv->bb_vga[0] = 0x1C;
393 		priv->bb_vga[1] = 0x10;
394 		priv->bb_vga[2] = 0x0;
395 		priv->bb_vga[3] = 0x0;
396 
397 	} else if (priv->rf_type == RF_AIROHA7230) {
398 		priv->bb_rx_conf = vnt_vt3184_al2230[10];
399 		length = sizeof(vnt_vt3184_al2230);
400 		addr = vnt_vt3184_al2230;
401 		agc = vnt_vt3184_agc;
402 		length_agc = sizeof(vnt_vt3184_agc);
403 
404 		addr[0xd7] = 0x06;
405 
406 		priv->bb_vga[0] = 0x1c;
407 		priv->bb_vga[1] = 0x10;
408 		priv->bb_vga[2] = 0x0;
409 		priv->bb_vga[3] = 0x0;
410 
411 	} else if ((priv->rf_type == RF_VT3226) ||
412 			(priv->rf_type == RF_VT3226D0)) {
413 		priv->bb_rx_conf = vnt_vt3184_vt3226d0[10];
414 		length = sizeof(vnt_vt3184_vt3226d0);
415 		addr = vnt_vt3184_vt3226d0;
416 		agc = vnt_vt3184_agc;
417 		length_agc = sizeof(vnt_vt3184_agc);
418 
419 		priv->bb_vga[0] = 0x20;
420 		priv->bb_vga[1] = 0x10;
421 		priv->bb_vga[2] = 0x0;
422 		priv->bb_vga[3] = 0x0;
423 
424 		/* Fix VT3226 DFC system timing issue */
425 		ret = vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL2,
426 					  SOFTPWRCTL_RFLEOPT);
427 		if (ret)
428 			goto end;
429 	} else if (priv->rf_type == RF_VT3342A0) {
430 		priv->bb_rx_conf = vnt_vt3184_vt3226d0[10];
431 		length = sizeof(vnt_vt3184_vt3226d0);
432 		addr = vnt_vt3184_vt3226d0;
433 		agc = vnt_vt3184_agc;
434 		length_agc = sizeof(vnt_vt3184_agc);
435 
436 		priv->bb_vga[0] = 0x20;
437 		priv->bb_vga[1] = 0x10;
438 		priv->bb_vga[2] = 0x0;
439 		priv->bb_vga[3] = 0x0;
440 
441 		/* Fix VT3226 DFC system timing issue */
442 		ret = vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL2,
443 					  SOFTPWRCTL_RFLEOPT);
444 		if (ret)
445 			goto end;
446 	} else {
447 		goto end;
448 	}
449 
450 	memcpy(array, addr, length);
451 
452 	ret = vnt_control_out_blocks(priv, VNT_REG_BLOCK_SIZE,
453 				     MESSAGE_REQUEST_BBREG, length, array);
454 	if (ret)
455 		goto end;
456 
457 	memcpy(array, agc, length_agc);
458 
459 	ret = vnt_control_out(priv, MESSAGE_TYPE_WRITE, 0,
460 			      MESSAGE_REQUEST_BBAGC, length_agc, array);
461 	if (ret)
462 		goto end;
463 
464 	if (priv->rf_type == RF_VT3226 ||
465 	    priv->rf_type == RF_VT3342A0) {
466 		ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
467 					 MAC_REG_ITRTMSET, 0x23);
468 		if (ret)
469 			goto end;
470 
471 		ret = vnt_mac_reg_bits_on(priv, MAC_REG_PAPEDELAY, 0x01);
472 		if (ret)
473 			goto end;
474 	} else if (priv->rf_type == RF_VT3226D0) {
475 		ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
476 					 MAC_REG_ITRTMSET, 0x11);
477 		if (ret)
478 			goto end;
479 
480 		ret = vnt_mac_reg_bits_on(priv, MAC_REG_PAPEDELAY, 0x01);
481 		if (ret)
482 			goto end;
483 	}
484 
485 	ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x04, 0x7f);
486 	if (ret)
487 		goto end;
488 
489 	ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
490 	if (ret)
491 		goto end;
492 
493 	ret = vnt_rf_table_download(priv);
494 	if (ret)
495 		goto end;
496 
497 	/* Fix for TX USB resets from vendors driver */
498 	ret = vnt_control_in(priv, MESSAGE_TYPE_READ, USB_REG4,
499 			     MESSAGE_REQUEST_MEM, sizeof(data), &data);
500 	if (ret)
501 		goto end;
502 
503 	data |= 0x2;
504 
505 	ret = vnt_control_out(priv, MESSAGE_TYPE_WRITE, USB_REG4,
506 			      MESSAGE_REQUEST_MEM, sizeof(data), &data);
507 
508 end:
509 	return ret;
510 }
511 
512 /*
513  * Description: Set ShortSlotTime mode
514  *
515  * Parameters:
516  *  In:
517  *	priv	- Device Structure
518  *  Out:
519  *      none
520  *
521  * Return Value: none
522  *
523  */
524 int vnt_set_short_slot_time(struct vnt_private *priv)
525 {
526 	int ret = 0;
527 	u8 bb_vga = 0;
528 
529 	if (priv->short_slot_time)
530 		priv->bb_rx_conf &= 0xdf;
531 	else
532 		priv->bb_rx_conf |= 0x20;
533 
534 	ret = vnt_control_in_u8(priv, MESSAGE_REQUEST_BBREG, 0xe7, &bb_vga);
535 	if (ret)
536 		goto end;
537 
538 	if (bb_vga == priv->bb_vga[0])
539 		priv->bb_rx_conf |= 0x20;
540 
541 	ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a,
542 				 priv->bb_rx_conf);
543 
544 end:
545 	return ret;
546 }
547 
548 void vnt_set_vga_gain_offset(struct vnt_private *priv, u8 data)
549 {
550 	vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xE7, data);
551 
552 	/* patch for 3253B0 Baseband with Cardbus module */
553 	if (priv->short_slot_time)
554 		priv->bb_rx_conf &= 0xdf; /* 1101 1111 */
555 	else
556 		priv->bb_rx_conf |= 0x20; /* 0010 0000 */
557 
558 	vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->bb_rx_conf);
559 }
560 
561 /*
562  * Description: vnt_set_deep_sleep
563  *
564  * Parameters:
565  *  In:
566  *	priv	- Device Structure
567  *  Out:
568  *      none
569  *
570  * Return Value: none
571  *
572  */
573 int vnt_set_deep_sleep(struct vnt_private *priv)
574 {
575 	int ret = 0;
576 
577 	/* CR12 */
578 	ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);
579 	if (ret)
580 		return ret;
581 
582 	/* CR13 */
583 	return vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0xB9);
584 }
585 
586 int vnt_exit_deep_sleep(struct vnt_private *priv)
587 {
588 	int ret = 0;
589 
590 	/* CR12 */
591 	ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x00);
592 	if (ret)
593 		return ret;
594 
595 	/* CR13 */
596 	return vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
597 }
598 
599 void vnt_update_pre_ed_threshold(struct vnt_private *priv, int scanning)
600 {
601 	u8 cr_201 = 0x0, cr_206 = 0x0;
602 	u8 ed_inx = priv->bb_pre_ed_index;
603 
604 	switch (priv->rf_type) {
605 	case RF_AL2230:
606 	case RF_AL2230S:
607 	case RF_AIROHA7230:
608 		if (scanning) { /* Max sensitivity */
609 			ed_inx = 0;
610 			cr_206 = 0x30;
611 			break;
612 		}
613 
614 		if (priv->bb_pre_ed_rssi <= 45) {
615 			ed_inx = 20;
616 			cr_201 = 0xff;
617 		} else if (priv->bb_pre_ed_rssi <= 46) {
618 			ed_inx = 19;
619 			cr_201 = 0x1a;
620 		} else if (priv->bb_pre_ed_rssi <= 47) {
621 			ed_inx = 18;
622 			cr_201 = 0x15;
623 		} else if (priv->bb_pre_ed_rssi <= 49) {
624 			ed_inx = 17;
625 			cr_201 = 0xe;
626 		} else if (priv->bb_pre_ed_rssi <= 51) {
627 			ed_inx = 16;
628 			cr_201 = 0x9;
629 		} else if (priv->bb_pre_ed_rssi <= 53) {
630 			ed_inx = 15;
631 			cr_201 = 0x6;
632 		} else if (priv->bb_pre_ed_rssi <= 55) {
633 			ed_inx = 14;
634 			cr_201 = 0x3;
635 		} else if (priv->bb_pre_ed_rssi <= 56) {
636 			ed_inx = 13;
637 			cr_201 = 0x2;
638 			cr_206 = 0xa0;
639 		} else if (priv->bb_pre_ed_rssi <= 57) {
640 			ed_inx = 12;
641 			cr_201 = 0x2;
642 			cr_206 = 0x20;
643 		} else if (priv->bb_pre_ed_rssi <= 58) {
644 			ed_inx = 11;
645 			cr_201 = 0x1;
646 			cr_206 = 0xa0;
647 		} else if (priv->bb_pre_ed_rssi <= 59) {
648 			ed_inx = 10;
649 			cr_201 = 0x1;
650 			cr_206 = 0x54;
651 		} else if (priv->bb_pre_ed_rssi <= 60) {
652 			ed_inx = 9;
653 			cr_201 = 0x1;
654 			cr_206 = 0x18;
655 		} else if (priv->bb_pre_ed_rssi <= 61) {
656 			ed_inx = 8;
657 			cr_206 = 0xe3;
658 		} else if (priv->bb_pre_ed_rssi <= 62) {
659 			ed_inx = 7;
660 			cr_206 = 0xb9;
661 		} else if (priv->bb_pre_ed_rssi <= 63) {
662 			ed_inx = 6;
663 			cr_206 = 0x93;
664 		} else if (priv->bb_pre_ed_rssi <= 64) {
665 			ed_inx = 5;
666 			cr_206 = 0x79;
667 		} else if (priv->bb_pre_ed_rssi <= 65) {
668 			ed_inx = 4;
669 			cr_206 = 0x62;
670 		} else if (priv->bb_pre_ed_rssi <= 66) {
671 			ed_inx = 3;
672 			cr_206 = 0x51;
673 		} else if (priv->bb_pre_ed_rssi <= 67) {
674 			ed_inx = 2;
675 			cr_206 = 0x43;
676 		} else if (priv->bb_pre_ed_rssi <= 68) {
677 			ed_inx = 1;
678 			cr_206 = 0x36;
679 		} else {
680 			ed_inx = 0;
681 			cr_206 = 0x30;
682 		}
683 		break;
684 
685 	case RF_VT3226:
686 	case RF_VT3226D0:
687 		if (scanning)	{ /* Max sensitivity */
688 			ed_inx = 0;
689 			cr_206 = 0x24;
690 			break;
691 		}
692 
693 		if (priv->bb_pre_ed_rssi <= 41) {
694 			ed_inx = 22;
695 			cr_201 = 0xff;
696 		} else if (priv->bb_pre_ed_rssi <= 42) {
697 			ed_inx = 21;
698 			cr_201 = 0x36;
699 		} else if (priv->bb_pre_ed_rssi <= 43) {
700 			ed_inx = 20;
701 			cr_201 = 0x26;
702 		} else if (priv->bb_pre_ed_rssi <= 45) {
703 			ed_inx = 19;
704 			cr_201 = 0x18;
705 		} else if (priv->bb_pre_ed_rssi <= 47) {
706 			ed_inx = 18;
707 			cr_201 = 0x11;
708 		} else if (priv->bb_pre_ed_rssi <= 49) {
709 			ed_inx = 17;
710 			cr_201 = 0xa;
711 		} else if (priv->bb_pre_ed_rssi <= 51) {
712 			ed_inx = 16;
713 			cr_201 = 0x7;
714 		} else if (priv->bb_pre_ed_rssi <= 53) {
715 			ed_inx = 15;
716 			cr_201 = 0x4;
717 		} else if (priv->bb_pre_ed_rssi <= 55) {
718 			ed_inx = 14;
719 			cr_201 = 0x2;
720 			cr_206 = 0xc0;
721 		} else if (priv->bb_pre_ed_rssi <= 56) {
722 			ed_inx = 13;
723 			cr_201 = 0x2;
724 			cr_206 = 0x30;
725 		} else if (priv->bb_pre_ed_rssi <= 57) {
726 			ed_inx = 12;
727 			cr_201 = 0x1;
728 			cr_206 = 0xb0;
729 		} else if (priv->bb_pre_ed_rssi <= 58) {
730 			ed_inx = 11;
731 			cr_201 = 0x1;
732 			cr_206 = 0x70;
733 		} else if (priv->bb_pre_ed_rssi <= 59) {
734 			ed_inx = 10;
735 			cr_201 = 0x1;
736 			cr_206 = 0x30;
737 		} else if (priv->bb_pre_ed_rssi <= 60) {
738 			ed_inx = 9;
739 			cr_206 = 0xea;
740 		} else if (priv->bb_pre_ed_rssi <= 61) {
741 			ed_inx = 8;
742 			cr_206 = 0xc0;
743 		} else if (priv->bb_pre_ed_rssi <= 62) {
744 			ed_inx = 7;
745 			cr_206 = 0x9c;
746 		} else if (priv->bb_pre_ed_rssi <= 63) {
747 			ed_inx = 6;
748 			cr_206 = 0x80;
749 		} else if (priv->bb_pre_ed_rssi <= 64) {
750 			ed_inx = 5;
751 			cr_206 = 0x68;
752 		} else if (priv->bb_pre_ed_rssi <= 65) {
753 			ed_inx = 4;
754 			cr_206 = 0x52;
755 		} else if (priv->bb_pre_ed_rssi <= 66) {
756 			ed_inx = 3;
757 			cr_206 = 0x43;
758 		} else if (priv->bb_pre_ed_rssi <= 67) {
759 			ed_inx = 2;
760 			cr_206 = 0x36;
761 		} else if (priv->bb_pre_ed_rssi <= 68) {
762 			ed_inx = 1;
763 			cr_206 = 0x2d;
764 		} else {
765 			ed_inx = 0;
766 			cr_206 = 0x24;
767 		}
768 		break;
769 
770 	case RF_VT3342A0:
771 		if (scanning) { /* need Max sensitivity */
772 			ed_inx = 0;
773 			cr_206 = 0x38;
774 			break;
775 		}
776 
777 		if (priv->bb_pre_ed_rssi <= 41) {
778 			ed_inx = 20;
779 			cr_201 = 0xff;
780 		} else if (priv->bb_pre_ed_rssi <= 42) {
781 			ed_inx = 19;
782 			cr_201 = 0x36;
783 		} else if (priv->bb_pre_ed_rssi <= 43) {
784 			ed_inx = 18;
785 			cr_201 = 0x26;
786 		} else if (priv->bb_pre_ed_rssi <= 45) {
787 			ed_inx = 17;
788 			cr_201 = 0x18;
789 		} else if (priv->bb_pre_ed_rssi <= 47) {
790 			ed_inx = 16;
791 			cr_201 = 0x11;
792 		} else if (priv->bb_pre_ed_rssi <= 49) {
793 			ed_inx = 15;
794 			cr_201 = 0xa;
795 		} else if (priv->bb_pre_ed_rssi <= 51) {
796 			ed_inx = 14;
797 			cr_201 = 0x7;
798 		} else if (priv->bb_pre_ed_rssi <= 53) {
799 			ed_inx = 13;
800 			cr_201 = 0x4;
801 		} else if (priv->bb_pre_ed_rssi <= 55) {
802 			ed_inx = 12;
803 			cr_201 = 0x2;
804 			cr_206 = 0xc0;
805 		} else if (priv->bb_pre_ed_rssi <= 56) {
806 			ed_inx = 11;
807 			cr_201 = 0x2;
808 			cr_206 = 0x30;
809 		} else if (priv->bb_pre_ed_rssi <= 57) {
810 			ed_inx = 10;
811 			cr_201 = 0x1;
812 			cr_206 = 0xb0;
813 		} else if (priv->bb_pre_ed_rssi <= 58) {
814 			ed_inx = 9;
815 			cr_201 = 0x1;
816 			cr_206 = 0x70;
817 		} else if (priv->bb_pre_ed_rssi <= 59) {
818 			ed_inx = 8;
819 			cr_201 = 0x1;
820 			cr_206 = 0x30;
821 		} else if (priv->bb_pre_ed_rssi <= 60) {
822 			ed_inx = 7;
823 			cr_206 = 0xea;
824 		} else if (priv->bb_pre_ed_rssi <= 61) {
825 			ed_inx = 6;
826 			cr_206 = 0xc0;
827 		} else if (priv->bb_pre_ed_rssi <= 62) {
828 			ed_inx = 5;
829 			cr_206 = 0x9c;
830 		} else if (priv->bb_pre_ed_rssi <= 63) {
831 			ed_inx = 4;
832 			cr_206 = 0x80;
833 		} else if (priv->bb_pre_ed_rssi <= 64) {
834 			ed_inx = 3;
835 			cr_206 = 0x68;
836 		} else if (priv->bb_pre_ed_rssi <= 65) {
837 			ed_inx = 2;
838 			cr_206 = 0x52;
839 		} else if (priv->bb_pre_ed_rssi <= 66) {
840 			ed_inx = 1;
841 			cr_206 = 0x43;
842 		} else {
843 			ed_inx = 0;
844 			cr_206 = 0x38;
845 		}
846 		break;
847 	}
848 
849 	if (ed_inx == priv->bb_pre_ed_index && !scanning)
850 		return;
851 
852 	priv->bb_pre_ed_index = ed_inx;
853 
854 	dev_dbg(&priv->usb->dev, "%s bb_pre_ed_rssi %d\n",
855 		__func__, priv->bb_pre_ed_rssi);
856 
857 	if (!cr_201 && !cr_206)
858 		return;
859 
860 	vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xc9, cr_201);
861 	vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xce, cr_206);
862 }
863 
864