1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2ab4382d2SGreg Kroah-Hartman #ifndef __GRLIB_APBUART_H__ 3ab4382d2SGreg Kroah-Hartman #define __GRLIB_APBUART_H__ 4ab4382d2SGreg Kroah-Hartman 5ab4382d2SGreg Kroah-Hartman #include <asm/io.h> 6ab4382d2SGreg Kroah-Hartman 7ab4382d2SGreg Kroah-Hartman #define UART_NR 8 8ab4382d2SGreg Kroah-Hartman static int grlib_apbuart_port_nr; 9ab4382d2SGreg Kroah-Hartman 10ab4382d2SGreg Kroah-Hartman struct grlib_apbuart_regs_map { 11ab4382d2SGreg Kroah-Hartman u32 data; 12ab4382d2SGreg Kroah-Hartman u32 status; 13ab4382d2SGreg Kroah-Hartman u32 ctrl; 14ab4382d2SGreg Kroah-Hartman u32 scaler; 15ab4382d2SGreg Kroah-Hartman }; 16ab4382d2SGreg Kroah-Hartman 17ab4382d2SGreg Kroah-Hartman struct amba_prom_registers { 18ab4382d2SGreg Kroah-Hartman unsigned int phys_addr; 19ab4382d2SGreg Kroah-Hartman unsigned int reg_size; 20ab4382d2SGreg Kroah-Hartman }; 21ab4382d2SGreg Kroah-Hartman 22ab4382d2SGreg Kroah-Hartman /* 23ab4382d2SGreg Kroah-Hartman * The following defines the bits in the APBUART Status Registers. 24ab4382d2SGreg Kroah-Hartman */ 25ab4382d2SGreg Kroah-Hartman #define UART_STATUS_DR 0x00000001 /* Data Ready */ 26ab4382d2SGreg Kroah-Hartman #define UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */ 27ab4382d2SGreg Kroah-Hartman #define UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */ 28ab4382d2SGreg Kroah-Hartman #define UART_STATUS_BR 0x00000008 /* Break Error */ 29ab4382d2SGreg Kroah-Hartman #define UART_STATUS_OE 0x00000010 /* RX Overrun Error */ 30ab4382d2SGreg Kroah-Hartman #define UART_STATUS_PE 0x00000020 /* RX Parity Error */ 31ab4382d2SGreg Kroah-Hartman #define UART_STATUS_FE 0x00000040 /* RX Framing Error */ 32ab4382d2SGreg Kroah-Hartman #define UART_STATUS_ERR 0x00000078 /* Error Mask */ 33ab4382d2SGreg Kroah-Hartman 34ab4382d2SGreg Kroah-Hartman /* 35ab4382d2SGreg Kroah-Hartman * The following defines the bits in the APBUART Ctrl Registers. 36ab4382d2SGreg Kroah-Hartman */ 37ab4382d2SGreg Kroah-Hartman #define UART_CTRL_RE 0x00000001 /* Receiver enable */ 38ab4382d2SGreg Kroah-Hartman #define UART_CTRL_TE 0x00000002 /* Transmitter enable */ 39ab4382d2SGreg Kroah-Hartman #define UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */ 40ab4382d2SGreg Kroah-Hartman #define UART_CTRL_TI 0x00000008 /* Transmitter irq */ 41ab4382d2SGreg Kroah-Hartman #define UART_CTRL_PS 0x00000010 /* Parity select */ 42ab4382d2SGreg Kroah-Hartman #define UART_CTRL_PE 0x00000020 /* Parity enable */ 43ab4382d2SGreg Kroah-Hartman #define UART_CTRL_FL 0x00000040 /* Flow control enable */ 44ab4382d2SGreg Kroah-Hartman #define UART_CTRL_LB 0x00000080 /* Loopback enable */ 45ab4382d2SGreg Kroah-Hartman 46ab4382d2SGreg Kroah-Hartman #define APBBASE(port) ((struct grlib_apbuart_regs_map *)((port)->membase)) 47ab4382d2SGreg Kroah-Hartman 48ab4382d2SGreg Kroah-Hartman #define APBBASE_DATA_P(port) (&(APBBASE(port)->data)) 49ab4382d2SGreg Kroah-Hartman #define APBBASE_STATUS_P(port) (&(APBBASE(port)->status)) 50ab4382d2SGreg Kroah-Hartman #define APBBASE_CTRL_P(port) (&(APBBASE(port)->ctrl)) 51ab4382d2SGreg Kroah-Hartman #define APBBASE_SCALAR_P(port) (&(APBBASE(port)->scaler)) 52ab4382d2SGreg Kroah-Hartman 53ab4382d2SGreg Kroah-Hartman #define UART_GET_CHAR(port) (__raw_readl(APBBASE_DATA_P(port))) 54ab4382d2SGreg Kroah-Hartman #define UART_PUT_CHAR(port, v) (__raw_writel(v, APBBASE_DATA_P(port))) 55ab4382d2SGreg Kroah-Hartman #define UART_GET_STATUS(port) (__raw_readl(APBBASE_STATUS_P(port))) 56ab4382d2SGreg Kroah-Hartman #define UART_PUT_STATUS(port, v)(__raw_writel(v, APBBASE_STATUS_P(port))) 57ab4382d2SGreg Kroah-Hartman #define UART_GET_CTRL(port) (__raw_readl(APBBASE_CTRL_P(port))) 58ab4382d2SGreg Kroah-Hartman #define UART_PUT_CTRL(port, v) (__raw_writel(v, APBBASE_CTRL_P(port))) 59ab4382d2SGreg Kroah-Hartman #define UART_GET_SCAL(port) (__raw_readl(APBBASE_SCALAR_P(port))) 60ab4382d2SGreg Kroah-Hartman #define UART_PUT_SCAL(port, v) (__raw_writel(v, APBBASE_SCALAR_P(port))) 61ab4382d2SGreg Kroah-Hartman 62ab4382d2SGreg Kroah-Hartman #define UART_RX_DATA(s) (((s) & UART_STATUS_DR) != 0) 63ab4382d2SGreg Kroah-Hartman #define UART_TX_READY(s) (((s) & UART_STATUS_THE) != 0) 64ab4382d2SGreg Kroah-Hartman 65ab4382d2SGreg Kroah-Hartman #endif /* __GRLIB_APBUART_H__ */ 66