1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * drivers/uio/uio_dmem_genirq.c 4 * 5 * Userspace I/O platform driver with generic IRQ handling code. 6 * 7 * Copyright (C) 2012 Damian Hobson-Garcia 8 * 9 * Based on uio_pdrv_genirq.c by Magnus Damm 10 */ 11 12 #include <linux/platform_device.h> 13 #include <linux/uio_driver.h> 14 #include <linux/spinlock.h> 15 #include <linux/bitops.h> 16 #include <linux/module.h> 17 #include <linux/interrupt.h> 18 #include <linux/platform_data/uio_dmem_genirq.h> 19 #include <linux/stringify.h> 20 #include <linux/pm_runtime.h> 21 #include <linux/dma-mapping.h> 22 #include <linux/slab.h> 23 24 #include <linux/of.h> 25 #include <linux/of_platform.h> 26 #include <linux/of_address.h> 27 28 #define DRIVER_NAME "uio_dmem_genirq" 29 #define DMEM_MAP_ERROR (~0) 30 31 struct uio_dmem_genirq_platdata { 32 struct uio_info *uioinfo; 33 spinlock_t lock; 34 unsigned long flags; 35 struct platform_device *pdev; 36 unsigned int dmem_region_start; 37 unsigned int num_dmem_regions; 38 void *dmem_region_vaddr[MAX_UIO_MAPS]; 39 struct mutex alloc_lock; 40 unsigned int refcnt; 41 }; 42 43 static int uio_dmem_genirq_open(struct uio_info *info, struct inode *inode) 44 { 45 struct uio_dmem_genirq_platdata *priv = info->priv; 46 struct uio_mem *uiomem; 47 int ret = 0; 48 int dmem_region = priv->dmem_region_start; 49 50 uiomem = &priv->uioinfo->mem[priv->dmem_region_start]; 51 52 mutex_lock(&priv->alloc_lock); 53 while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) { 54 void *addr; 55 if (!uiomem->size) 56 break; 57 58 addr = dma_alloc_coherent(&priv->pdev->dev, uiomem->size, 59 (dma_addr_t *)&uiomem->addr, GFP_KERNEL); 60 if (!addr) { 61 uiomem->addr = DMEM_MAP_ERROR; 62 } 63 priv->dmem_region_vaddr[dmem_region++] = addr; 64 ++uiomem; 65 } 66 priv->refcnt++; 67 68 mutex_unlock(&priv->alloc_lock); 69 /* Wait until the Runtime PM code has woken up the device */ 70 pm_runtime_get_sync(&priv->pdev->dev); 71 return ret; 72 } 73 74 static int uio_dmem_genirq_release(struct uio_info *info, struct inode *inode) 75 { 76 struct uio_dmem_genirq_platdata *priv = info->priv; 77 struct uio_mem *uiomem; 78 int dmem_region = priv->dmem_region_start; 79 80 /* Tell the Runtime PM code that the device has become idle */ 81 pm_runtime_put_sync(&priv->pdev->dev); 82 83 uiomem = &priv->uioinfo->mem[priv->dmem_region_start]; 84 85 mutex_lock(&priv->alloc_lock); 86 87 priv->refcnt--; 88 while (!priv->refcnt && uiomem < &priv->uioinfo->mem[MAX_UIO_MAPS]) { 89 if (!uiomem->size) 90 break; 91 if (priv->dmem_region_vaddr[dmem_region]) { 92 dma_free_coherent(&priv->pdev->dev, uiomem->size, 93 priv->dmem_region_vaddr[dmem_region], 94 uiomem->addr); 95 } 96 uiomem->addr = DMEM_MAP_ERROR; 97 ++dmem_region; 98 ++uiomem; 99 } 100 101 mutex_unlock(&priv->alloc_lock); 102 return 0; 103 } 104 105 static irqreturn_t uio_dmem_genirq_handler(int irq, struct uio_info *dev_info) 106 { 107 struct uio_dmem_genirq_platdata *priv = dev_info->priv; 108 109 /* Just disable the interrupt in the interrupt controller, and 110 * remember the state so we can allow user space to enable it later. 111 */ 112 113 if (!test_and_set_bit(0, &priv->flags)) 114 disable_irq_nosync(irq); 115 116 return IRQ_HANDLED; 117 } 118 119 static int uio_dmem_genirq_irqcontrol(struct uio_info *dev_info, s32 irq_on) 120 { 121 struct uio_dmem_genirq_platdata *priv = dev_info->priv; 122 unsigned long flags; 123 124 /* Allow user space to enable and disable the interrupt 125 * in the interrupt controller, but keep track of the 126 * state to prevent per-irq depth damage. 127 * 128 * Serialize this operation to support multiple tasks. 129 */ 130 131 spin_lock_irqsave(&priv->lock, flags); 132 if (irq_on) { 133 if (test_and_clear_bit(0, &priv->flags)) 134 enable_irq(dev_info->irq); 135 } else { 136 if (!test_and_set_bit(0, &priv->flags)) 137 disable_irq(dev_info->irq); 138 } 139 spin_unlock_irqrestore(&priv->lock, flags); 140 141 return 0; 142 } 143 144 static int uio_dmem_genirq_probe(struct platform_device *pdev) 145 { 146 struct uio_dmem_genirq_pdata *pdata = dev_get_platdata(&pdev->dev); 147 struct uio_info *uioinfo = &pdata->uioinfo; 148 struct uio_dmem_genirq_platdata *priv; 149 struct uio_mem *uiomem; 150 int ret = -EINVAL; 151 int i; 152 153 if (pdev->dev.of_node) { 154 int irq; 155 156 /* alloc uioinfo for one device */ 157 uioinfo = kzalloc(sizeof(*uioinfo), GFP_KERNEL); 158 if (!uioinfo) { 159 ret = -ENOMEM; 160 dev_err(&pdev->dev, "unable to kmalloc\n"); 161 goto bad2; 162 } 163 uioinfo->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOFn", 164 pdev->dev.of_node); 165 uioinfo->version = "devicetree"; 166 167 /* Multiple IRQs are not supported */ 168 irq = platform_get_irq(pdev, 0); 169 if (irq == -ENXIO) 170 uioinfo->irq = UIO_IRQ_NONE; 171 else 172 uioinfo->irq = irq; 173 } 174 175 if (!uioinfo || !uioinfo->name || !uioinfo->version) { 176 dev_err(&pdev->dev, "missing platform_data\n"); 177 goto bad0; 178 } 179 180 if (uioinfo->handler || uioinfo->irqcontrol || 181 uioinfo->irq_flags & IRQF_SHARED) { 182 dev_err(&pdev->dev, "interrupt configuration error\n"); 183 goto bad0; 184 } 185 186 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 187 if (!priv) { 188 ret = -ENOMEM; 189 dev_err(&pdev->dev, "unable to kmalloc\n"); 190 goto bad0; 191 } 192 193 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 194 195 priv->uioinfo = uioinfo; 196 spin_lock_init(&priv->lock); 197 priv->flags = 0; /* interrupt is enabled to begin with */ 198 priv->pdev = pdev; 199 mutex_init(&priv->alloc_lock); 200 201 if (!uioinfo->irq) { 202 ret = platform_get_irq(pdev, 0); 203 if (ret < 0) 204 goto bad1; 205 uioinfo->irq = ret; 206 } 207 uiomem = &uioinfo->mem[0]; 208 209 for (i = 0; i < pdev->num_resources; ++i) { 210 struct resource *r = &pdev->resource[i]; 211 212 if (r->flags != IORESOURCE_MEM) 213 continue; 214 215 if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) { 216 dev_warn(&pdev->dev, "device has more than " 217 __stringify(MAX_UIO_MAPS) 218 " I/O memory resources.\n"); 219 break; 220 } 221 222 uiomem->memtype = UIO_MEM_PHYS; 223 uiomem->addr = r->start; 224 uiomem->size = resource_size(r); 225 ++uiomem; 226 } 227 228 priv->dmem_region_start = uiomem - &uioinfo->mem[0]; 229 priv->num_dmem_regions = pdata->num_dynamic_regions; 230 231 for (i = 0; i < pdata->num_dynamic_regions; ++i) { 232 if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) { 233 dev_warn(&pdev->dev, "device has more than " 234 __stringify(MAX_UIO_MAPS) 235 " dynamic and fixed memory regions.\n"); 236 break; 237 } 238 uiomem->memtype = UIO_MEM_PHYS; 239 uiomem->addr = DMEM_MAP_ERROR; 240 uiomem->size = pdata->dynamic_region_sizes[i]; 241 ++uiomem; 242 } 243 244 while (uiomem < &uioinfo->mem[MAX_UIO_MAPS]) { 245 uiomem->size = 0; 246 ++uiomem; 247 } 248 249 /* This driver requires no hardware specific kernel code to handle 250 * interrupts. Instead, the interrupt handler simply disables the 251 * interrupt in the interrupt controller. User space is responsible 252 * for performing hardware specific acknowledge and re-enabling of 253 * the interrupt in the interrupt controller. 254 * 255 * Interrupt sharing is not supported. 256 */ 257 258 uioinfo->handler = uio_dmem_genirq_handler; 259 uioinfo->irqcontrol = uio_dmem_genirq_irqcontrol; 260 uioinfo->open = uio_dmem_genirq_open; 261 uioinfo->release = uio_dmem_genirq_release; 262 uioinfo->priv = priv; 263 264 /* Enable Runtime PM for this device: 265 * The device starts in suspended state to allow the hardware to be 266 * turned off by default. The Runtime PM bus code should power on the 267 * hardware and enable clocks at open(). 268 */ 269 pm_runtime_enable(&pdev->dev); 270 271 ret = uio_register_device(&pdev->dev, priv->uioinfo); 272 if (ret) { 273 dev_err(&pdev->dev, "unable to register uio device\n"); 274 pm_runtime_disable(&pdev->dev); 275 goto bad1; 276 } 277 278 platform_set_drvdata(pdev, priv); 279 return 0; 280 bad1: 281 kfree(priv); 282 bad0: 283 /* kfree uioinfo for OF */ 284 if (pdev->dev.of_node) 285 kfree(uioinfo); 286 bad2: 287 return ret; 288 } 289 290 static int uio_dmem_genirq_remove(struct platform_device *pdev) 291 { 292 struct uio_dmem_genirq_platdata *priv = platform_get_drvdata(pdev); 293 294 uio_unregister_device(priv->uioinfo); 295 pm_runtime_disable(&pdev->dev); 296 297 priv->uioinfo->handler = NULL; 298 priv->uioinfo->irqcontrol = NULL; 299 300 /* kfree uioinfo for OF */ 301 if (pdev->dev.of_node) 302 kfree(priv->uioinfo); 303 304 kfree(priv); 305 return 0; 306 } 307 308 static int uio_dmem_genirq_runtime_nop(struct device *dev) 309 { 310 /* Runtime PM callback shared between ->runtime_suspend() 311 * and ->runtime_resume(). Simply returns success. 312 * 313 * In this driver pm_runtime_get_sync() and pm_runtime_put_sync() 314 * are used at open() and release() time. This allows the 315 * Runtime PM code to turn off power to the device while the 316 * device is unused, ie before open() and after release(). 317 * 318 * This Runtime PM callback does not need to save or restore 319 * any registers since user space is responsbile for hardware 320 * register reinitialization after open(). 321 */ 322 return 0; 323 } 324 325 static const struct dev_pm_ops uio_dmem_genirq_dev_pm_ops = { 326 .runtime_suspend = uio_dmem_genirq_runtime_nop, 327 .runtime_resume = uio_dmem_genirq_runtime_nop, 328 }; 329 330 #ifdef CONFIG_OF 331 static const struct of_device_id uio_of_genirq_match[] = { 332 { /* empty for now */ }, 333 }; 334 MODULE_DEVICE_TABLE(of, uio_of_genirq_match); 335 #endif 336 337 static struct platform_driver uio_dmem_genirq = { 338 .probe = uio_dmem_genirq_probe, 339 .remove = uio_dmem_genirq_remove, 340 .driver = { 341 .name = DRIVER_NAME, 342 .pm = &uio_dmem_genirq_dev_pm_ops, 343 .of_match_table = of_match_ptr(uio_of_genirq_match), 344 }, 345 }; 346 347 module_platform_driver(uio_dmem_genirq); 348 349 MODULE_AUTHOR("Damian Hobson-Garcia"); 350 MODULE_DESCRIPTION("Userspace I/O platform driver with dynamic memory."); 351 MODULE_LICENSE("GPL v2"); 352 MODULE_ALIAS("platform:" DRIVER_NAME); 353