xref: /linux/drivers/usb/mtu3/mtu3_plat.c (revision 44f57d78)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2016 MediaTek Inc.
4  *
5  * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
6  */
7 
8 #include <linux/clk.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/iopoll.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/of_address.h>
14 #include <linux/of_irq.h>
15 #include <linux/platform_device.h>
16 
17 #include "mtu3.h"
18 #include "mtu3_dr.h"
19 #include "mtu3_debug.h"
20 
21 /* u2-port0 should be powered on and enabled; */
22 int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
23 {
24 	void __iomem *ibase = ssusb->ippc_base;
25 	u32 value, check_val;
26 	int ret;
27 
28 	check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
29 			SSUSB_REF_RST_B_STS;
30 
31 	ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
32 			(check_val == (value & check_val)), 100, 20000);
33 	if (ret) {
34 		dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
35 		return ret;
36 	}
37 
38 	ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
39 			(value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000);
40 	if (ret) {
41 		dev_err(ssusb->dev, "mac2 clock is not stable\n");
42 		return ret;
43 	}
44 
45 	return 0;
46 }
47 
48 static int ssusb_phy_init(struct ssusb_mtk *ssusb)
49 {
50 	int i;
51 	int ret;
52 
53 	for (i = 0; i < ssusb->num_phys; i++) {
54 		ret = phy_init(ssusb->phys[i]);
55 		if (ret)
56 			goto exit_phy;
57 	}
58 	return 0;
59 
60 exit_phy:
61 	for (; i > 0; i--)
62 		phy_exit(ssusb->phys[i - 1]);
63 
64 	return ret;
65 }
66 
67 static int ssusb_phy_exit(struct ssusb_mtk *ssusb)
68 {
69 	int i;
70 
71 	for (i = 0; i < ssusb->num_phys; i++)
72 		phy_exit(ssusb->phys[i]);
73 
74 	return 0;
75 }
76 
77 static int ssusb_phy_power_on(struct ssusb_mtk *ssusb)
78 {
79 	int i;
80 	int ret;
81 
82 	for (i = 0; i < ssusb->num_phys; i++) {
83 		ret = phy_power_on(ssusb->phys[i]);
84 		if (ret)
85 			goto power_off_phy;
86 	}
87 	return 0;
88 
89 power_off_phy:
90 	for (; i > 0; i--)
91 		phy_power_off(ssusb->phys[i - 1]);
92 
93 	return ret;
94 }
95 
96 static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
97 {
98 	unsigned int i;
99 
100 	for (i = 0; i < ssusb->num_phys; i++)
101 		phy_power_off(ssusb->phys[i]);
102 }
103 
104 static int ssusb_clks_enable(struct ssusb_mtk *ssusb)
105 {
106 	int ret;
107 
108 	ret = clk_prepare_enable(ssusb->sys_clk);
109 	if (ret) {
110 		dev_err(ssusb->dev, "failed to enable sys_clk\n");
111 		goto sys_clk_err;
112 	}
113 
114 	ret = clk_prepare_enable(ssusb->ref_clk);
115 	if (ret) {
116 		dev_err(ssusb->dev, "failed to enable ref_clk\n");
117 		goto ref_clk_err;
118 	}
119 
120 	ret = clk_prepare_enable(ssusb->mcu_clk);
121 	if (ret) {
122 		dev_err(ssusb->dev, "failed to enable mcu_clk\n");
123 		goto mcu_clk_err;
124 	}
125 
126 	ret = clk_prepare_enable(ssusb->dma_clk);
127 	if (ret) {
128 		dev_err(ssusb->dev, "failed to enable dma_clk\n");
129 		goto dma_clk_err;
130 	}
131 
132 	return 0;
133 
134 dma_clk_err:
135 	clk_disable_unprepare(ssusb->mcu_clk);
136 mcu_clk_err:
137 	clk_disable_unprepare(ssusb->ref_clk);
138 ref_clk_err:
139 	clk_disable_unprepare(ssusb->sys_clk);
140 sys_clk_err:
141 	return ret;
142 }
143 
144 static void ssusb_clks_disable(struct ssusb_mtk *ssusb)
145 {
146 	clk_disable_unprepare(ssusb->dma_clk);
147 	clk_disable_unprepare(ssusb->mcu_clk);
148 	clk_disable_unprepare(ssusb->ref_clk);
149 	clk_disable_unprepare(ssusb->sys_clk);
150 }
151 
152 static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
153 {
154 	int ret = 0;
155 
156 	ret = regulator_enable(ssusb->vusb33);
157 	if (ret) {
158 		dev_err(ssusb->dev, "failed to enable vusb33\n");
159 		goto vusb33_err;
160 	}
161 
162 	ret = ssusb_clks_enable(ssusb);
163 	if (ret)
164 		goto clks_err;
165 
166 	ret = ssusb_phy_init(ssusb);
167 	if (ret) {
168 		dev_err(ssusb->dev, "failed to init phy\n");
169 		goto phy_init_err;
170 	}
171 
172 	ret = ssusb_phy_power_on(ssusb);
173 	if (ret) {
174 		dev_err(ssusb->dev, "failed to power on phy\n");
175 		goto phy_err;
176 	}
177 
178 	return 0;
179 
180 phy_err:
181 	ssusb_phy_exit(ssusb);
182 phy_init_err:
183 	ssusb_clks_disable(ssusb);
184 clks_err:
185 	regulator_disable(ssusb->vusb33);
186 vusb33_err:
187 	return ret;
188 }
189 
190 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
191 {
192 	ssusb_clks_disable(ssusb);
193 	regulator_disable(ssusb->vusb33);
194 	ssusb_phy_power_off(ssusb);
195 	ssusb_phy_exit(ssusb);
196 }
197 
198 static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
199 {
200 	/* reset whole ip (xhci & u3d) */
201 	mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
202 	udelay(1);
203 	mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
204 
205 	/*
206 	 * device ip may be powered on in firmware/BROM stage before entering
207 	 * kernel stage;
208 	 * power down device ip, otherwise ip-sleep will fail when working as
209 	 * host only mode
210 	 */
211 	mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
212 }
213 
214 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
215 {
216 	struct device_node *node = pdev->dev.of_node;
217 	struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
218 	struct device *dev = &pdev->dev;
219 	struct resource *res;
220 	int i;
221 	int ret;
222 
223 	ssusb->vusb33 = devm_regulator_get(dev, "vusb33");
224 	if (IS_ERR(ssusb->vusb33)) {
225 		dev_err(dev, "failed to get vusb33\n");
226 		return PTR_ERR(ssusb->vusb33);
227 	}
228 
229 	ssusb->sys_clk = devm_clk_get(dev, "sys_ck");
230 	if (IS_ERR(ssusb->sys_clk)) {
231 		dev_err(dev, "failed to get sys clock\n");
232 		return PTR_ERR(ssusb->sys_clk);
233 	}
234 
235 	ssusb->ref_clk = devm_clk_get_optional(dev, "ref_ck");
236 	if (IS_ERR(ssusb->ref_clk))
237 		return PTR_ERR(ssusb->ref_clk);
238 
239 	ssusb->mcu_clk = devm_clk_get_optional(dev, "mcu_ck");
240 	if (IS_ERR(ssusb->mcu_clk))
241 		return PTR_ERR(ssusb->mcu_clk);
242 
243 	ssusb->dma_clk = devm_clk_get_optional(dev, "dma_ck");
244 	if (IS_ERR(ssusb->dma_clk))
245 		return PTR_ERR(ssusb->dma_clk);
246 
247 	ssusb->num_phys = of_count_phandle_with_args(node,
248 			"phys", "#phy-cells");
249 	if (ssusb->num_phys > 0) {
250 		ssusb->phys = devm_kcalloc(dev, ssusb->num_phys,
251 					sizeof(*ssusb->phys), GFP_KERNEL);
252 		if (!ssusb->phys)
253 			return -ENOMEM;
254 	} else {
255 		ssusb->num_phys = 0;
256 	}
257 
258 	for (i = 0; i < ssusb->num_phys; i++) {
259 		ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i);
260 		if (IS_ERR(ssusb->phys[i])) {
261 			dev_err(dev, "failed to get phy-%d\n", i);
262 			return PTR_ERR(ssusb->phys[i]);
263 		}
264 	}
265 
266 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc");
267 	ssusb->ippc_base = devm_ioremap_resource(dev, res);
268 	if (IS_ERR(ssusb->ippc_base))
269 		return PTR_ERR(ssusb->ippc_base);
270 
271 	ssusb->dr_mode = usb_get_dr_mode(dev);
272 	if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
273 		ssusb->dr_mode = USB_DR_MODE_OTG;
274 
275 	if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
276 		goto out;
277 
278 	/* if host role is supported */
279 	ret = ssusb_wakeup_of_property_parse(ssusb, node);
280 	if (ret) {
281 		dev_err(dev, "failed to parse uwk property\n");
282 		return ret;
283 	}
284 
285 	/* optional property, ignore the error if it does not exist */
286 	of_property_read_u32(node, "mediatek,u3p-dis-msk",
287 			     &ssusb->u3p_dis_msk);
288 
289 	otg_sx->vbus = devm_regulator_get(dev, "vbus");
290 	if (IS_ERR(otg_sx->vbus)) {
291 		dev_err(dev, "failed to get vbus\n");
292 		return PTR_ERR(otg_sx->vbus);
293 	}
294 
295 	if (ssusb->dr_mode == USB_DR_MODE_HOST)
296 		goto out;
297 
298 	/* if dual-role mode is supported */
299 	otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd");
300 	otg_sx->manual_drd_enabled =
301 		of_property_read_bool(node, "enable-manual-drd");
302 
303 	if (of_property_read_bool(node, "extcon")) {
304 		otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0);
305 		if (IS_ERR(otg_sx->edev)) {
306 			dev_err(ssusb->dev, "couldn't get extcon device\n");
307 			return PTR_ERR(otg_sx->edev);
308 		}
309 	}
310 
311 out:
312 	dev_info(dev, "dr_mode: %d, is_u3_dr: %d, u3p_dis_msk: %x, drd: %s\n",
313 		ssusb->dr_mode, otg_sx->is_u3_drd, ssusb->u3p_dis_msk,
314 		otg_sx->manual_drd_enabled ? "manual" : "auto");
315 
316 	return 0;
317 }
318 
319 static int mtu3_probe(struct platform_device *pdev)
320 {
321 	struct device_node *node = pdev->dev.of_node;
322 	struct device *dev = &pdev->dev;
323 	struct ssusb_mtk *ssusb;
324 	int ret = -ENOMEM;
325 
326 	/* all elements are set to ZERO as default value */
327 	ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL);
328 	if (!ssusb)
329 		return -ENOMEM;
330 
331 	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
332 	if (ret) {
333 		dev_err(dev, "No suitable DMA config available\n");
334 		return -ENOTSUPP;
335 	}
336 
337 	platform_set_drvdata(pdev, ssusb);
338 	ssusb->dev = dev;
339 
340 	ret = get_ssusb_rscs(pdev, ssusb);
341 	if (ret)
342 		return ret;
343 
344 	ssusb_debugfs_create_root(ssusb);
345 
346 	/* enable power domain */
347 	pm_runtime_enable(dev);
348 	pm_runtime_get_sync(dev);
349 	device_enable_async_suspend(dev);
350 
351 	ret = ssusb_rscs_init(ssusb);
352 	if (ret)
353 		goto comm_init_err;
354 
355 	ssusb_ip_sw_reset(ssusb);
356 
357 	if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
358 		ssusb->dr_mode = USB_DR_MODE_HOST;
359 	else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
360 		ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
361 
362 	/* default as host */
363 	ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL);
364 
365 	switch (ssusb->dr_mode) {
366 	case USB_DR_MODE_PERIPHERAL:
367 		ret = ssusb_gadget_init(ssusb);
368 		if (ret) {
369 			dev_err(dev, "failed to initialize gadget\n");
370 			goto comm_exit;
371 		}
372 		break;
373 	case USB_DR_MODE_HOST:
374 		ret = ssusb_host_init(ssusb, node);
375 		if (ret) {
376 			dev_err(dev, "failed to initialize host\n");
377 			goto comm_exit;
378 		}
379 		break;
380 	case USB_DR_MODE_OTG:
381 		ret = ssusb_gadget_init(ssusb);
382 		if (ret) {
383 			dev_err(dev, "failed to initialize gadget\n");
384 			goto comm_exit;
385 		}
386 
387 		ret = ssusb_host_init(ssusb, node);
388 		if (ret) {
389 			dev_err(dev, "failed to initialize host\n");
390 			goto gadget_exit;
391 		}
392 
393 		ret = ssusb_otg_switch_init(ssusb);
394 		if (ret) {
395 			dev_err(dev, "failed to initialize switch\n");
396 			goto host_exit;
397 		}
398 		break;
399 	default:
400 		dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode);
401 		ret = -EINVAL;
402 		goto comm_exit;
403 	}
404 
405 	return 0;
406 
407 host_exit:
408 	ssusb_host_exit(ssusb);
409 gadget_exit:
410 	ssusb_gadget_exit(ssusb);
411 comm_exit:
412 	ssusb_rscs_exit(ssusb);
413 comm_init_err:
414 	pm_runtime_put_sync(dev);
415 	pm_runtime_disable(dev);
416 	ssusb_debugfs_remove_root(ssusb);
417 
418 	return ret;
419 }
420 
421 static int mtu3_remove(struct platform_device *pdev)
422 {
423 	struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
424 
425 	switch (ssusb->dr_mode) {
426 	case USB_DR_MODE_PERIPHERAL:
427 		ssusb_gadget_exit(ssusb);
428 		break;
429 	case USB_DR_MODE_HOST:
430 		ssusb_host_exit(ssusb);
431 		break;
432 	case USB_DR_MODE_OTG:
433 		ssusb_otg_switch_exit(ssusb);
434 		ssusb_gadget_exit(ssusb);
435 		ssusb_host_exit(ssusb);
436 		break;
437 	default:
438 		return -EINVAL;
439 	}
440 
441 	ssusb_rscs_exit(ssusb);
442 	pm_runtime_put_sync(&pdev->dev);
443 	pm_runtime_disable(&pdev->dev);
444 	ssusb_debugfs_remove_root(ssusb);
445 
446 	return 0;
447 }
448 
449 /*
450  * when support dual-role mode, we reject suspend when
451  * it works as device mode;
452  */
453 static int __maybe_unused mtu3_suspend(struct device *dev)
454 {
455 	struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
456 
457 	dev_dbg(dev, "%s\n", __func__);
458 
459 	/* REVISIT: disconnect it for only device mode? */
460 	if (!ssusb->is_host)
461 		return 0;
462 
463 	ssusb_host_disable(ssusb, true);
464 	ssusb_phy_power_off(ssusb);
465 	ssusb_clks_disable(ssusb);
466 	ssusb_wakeup_set(ssusb, true);
467 
468 	return 0;
469 }
470 
471 static int __maybe_unused mtu3_resume(struct device *dev)
472 {
473 	struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
474 	int ret;
475 
476 	dev_dbg(dev, "%s\n", __func__);
477 
478 	if (!ssusb->is_host)
479 		return 0;
480 
481 	ssusb_wakeup_set(ssusb, false);
482 	ret = ssusb_clks_enable(ssusb);
483 	if (ret)
484 		goto clks_err;
485 
486 	ret = ssusb_phy_power_on(ssusb);
487 	if (ret)
488 		goto phy_err;
489 
490 	ssusb_host_enable(ssusb);
491 
492 	return 0;
493 
494 phy_err:
495 	ssusb_clks_disable(ssusb);
496 clks_err:
497 	return ret;
498 }
499 
500 static const struct dev_pm_ops mtu3_pm_ops = {
501 	SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume)
502 };
503 
504 #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
505 
506 #ifdef CONFIG_OF
507 
508 static const struct of_device_id mtu3_of_match[] = {
509 	{.compatible = "mediatek,mt8173-mtu3",},
510 	{.compatible = "mediatek,mtu3",},
511 	{},
512 };
513 
514 MODULE_DEVICE_TABLE(of, mtu3_of_match);
515 
516 #endif
517 
518 static struct platform_driver mtu3_driver = {
519 	.probe = mtu3_probe,
520 	.remove = mtu3_remove,
521 	.driver = {
522 		.name = MTU3_DRIVER_NAME,
523 		.pm = DEV_PM_OPS,
524 		.of_match_table = of_match_ptr(mtu3_of_match),
525 	},
526 };
527 module_platform_driver(mtu3_driver);
528 
529 MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
530 MODULE_LICENSE("GPL v2");
531 MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");
532