1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * drivers/video/pvr2fb.c 4 * 5 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega 6 * Dreamcast. 7 * 8 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org> 9 * Copyright (c) 2001 - 2008 Paul Mundt <lethal@linux-sh.org> 10 * 11 * This driver is mostly based on the excellent amifb and vfb sources. It uses 12 * an odd scheme for converting hardware values to/from framebuffer values, 13 * here are some hacked-up formulas: 14 * 15 * The Dreamcast has screen offsets from each side of its four borders and 16 * the start offsets of the display window. I used these values to calculate 17 * 'pseudo' values (think of them as placeholders) for the fb video mode, so 18 * that when it came time to convert these values back into their hardware 19 * values, I could just add mode- specific offsets to get the correct mode 20 * settings: 21 * 22 * left_margin = diwstart_h - borderstart_h; 23 * right_margin = borderstop_h - (diwstart_h + xres); 24 * upper_margin = diwstart_v - borderstart_v; 25 * lower_margin = borderstop_v - (diwstart_h + yres); 26 * 27 * hsync_len = borderstart_h + (hsync_total - borderstop_h); 28 * vsync_len = borderstart_v + (vsync_total - borderstop_v); 29 * 30 * Then, when it's time to convert back to hardware settings, the only 31 * constants are the borderstart_* offsets, all other values are derived from 32 * the fb video mode: 33 * 34 * // PAL 35 * borderstart_h = 116; 36 * borderstart_v = 44; 37 * ... 38 * borderstop_h = borderstart_h + hsync_total - hsync_len; 39 * ... 40 * diwstart_v = borderstart_v - upper_margin; 41 * 42 * However, in the current implementation, the borderstart values haven't had 43 * the benefit of being fully researched, so some modes may be broken. 44 */ 45 46 #undef DEBUG 47 48 #include <linux/module.h> 49 #include <linux/kernel.h> 50 #include <linux/errno.h> 51 #include <linux/string.h> 52 #include <linux/mm.h> 53 #include <linux/slab.h> 54 #include <linux/delay.h> 55 #include <linux/interrupt.h> 56 #include <linux/fb.h> 57 #include <linux/init.h> 58 #include <linux/pci.h> 59 60 #ifdef CONFIG_SH_DREAMCAST 61 #include <asm/machvec.h> 62 #include <mach-dreamcast/mach/sysasic.h> 63 #endif 64 65 #ifdef CONFIG_PVR2_DMA 66 #include <linux/pagemap.h> 67 #include <mach/dma.h> 68 #include <asm/dma.h> 69 #endif 70 71 #ifdef CONFIG_SH_STORE_QUEUES 72 #include <linux/uaccess.h> 73 #include <cpu/sq.h> 74 #endif 75 76 #ifndef PCI_DEVICE_ID_NEC_NEON250 77 # define PCI_DEVICE_ID_NEC_NEON250 0x0067 78 #endif 79 80 /* 2D video registers */ 81 #define DISP_BASE par->mmio_base 82 #define DISP_BRDRCOLR (DISP_BASE + 0x40) 83 #define DISP_DIWMODE (DISP_BASE + 0x44) 84 #define DISP_DIWADDRL (DISP_BASE + 0x50) 85 #define DISP_DIWADDRS (DISP_BASE + 0x54) 86 #define DISP_DIWSIZE (DISP_BASE + 0x5c) 87 #define DISP_SYNCCONF (DISP_BASE + 0xd0) 88 #define DISP_BRDRHORZ (DISP_BASE + 0xd4) 89 #define DISP_SYNCSIZE (DISP_BASE + 0xd8) 90 #define DISP_BRDRVERT (DISP_BASE + 0xdc) 91 #define DISP_DIWCONF (DISP_BASE + 0xe8) 92 #define DISP_DIWHSTRT (DISP_BASE + 0xec) 93 #define DISP_DIWVSTRT (DISP_BASE + 0xf0) 94 #define DISP_PIXDEPTH (DISP_BASE + 0x108) 95 96 /* Pixel clocks, one for TV output, doubled for VGA output */ 97 #define TV_CLK 74239 98 #define VGA_CLK 37119 99 100 /* This is for 60Hz - the VTOTAL is doubled for interlaced modes */ 101 #define PAL_HTOTAL 863 102 #define PAL_VTOTAL 312 103 #define NTSC_HTOTAL 857 104 #define NTSC_VTOTAL 262 105 106 /* Supported cable types */ 107 enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE }; 108 109 /* Supported video output types */ 110 enum { VO_PAL, VO_NTSC, VO_VGA }; 111 112 /* Supported palette types */ 113 enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 }; 114 115 struct pvr2_params { unsigned int val; char *name; }; 116 static struct pvr2_params cables[] = { 117 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" }, 118 }; 119 120 static struct pvr2_params outputs[] = { 121 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" }, 122 }; 123 124 /* 125 * This describes the current video mode 126 */ 127 128 static struct pvr2fb_par { 129 unsigned int hsync_total; /* Clocks/line */ 130 unsigned int vsync_total; /* Lines/field */ 131 unsigned int borderstart_h; 132 unsigned int borderstop_h; 133 unsigned int borderstart_v; 134 unsigned int borderstop_v; 135 unsigned int diwstart_h; /* Horizontal offset of the display field */ 136 unsigned int diwstart_v; /* Vertical offset of the display field, for 137 interlaced modes, this is the long field */ 138 unsigned long disp_start; /* Address of image within VRAM */ 139 unsigned char is_interlaced; /* Is the display interlaced? */ 140 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */ 141 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */ 142 143 unsigned long mmio_base; /* MMIO base */ 144 u32 palette[16]; 145 } *currentpar; 146 147 static struct fb_info *fb_info; 148 149 static struct fb_fix_screeninfo pvr2_fix = { 150 .id = "NEC PowerVR2", 151 .type = FB_TYPE_PACKED_PIXELS, 152 .visual = FB_VISUAL_TRUECOLOR, 153 .ypanstep = 1, 154 .ywrapstep = 1, 155 .accel = FB_ACCEL_NONE, 156 }; 157 158 static const struct fb_var_screeninfo pvr2_var = { 159 .xres = 640, 160 .yres = 480, 161 .xres_virtual = 640, 162 .yres_virtual = 480, 163 .bits_per_pixel =16, 164 .red = { 11, 5, 0 }, 165 .green = { 5, 6, 0 }, 166 .blue = { 0, 5, 0 }, 167 .activate = FB_ACTIVATE_NOW, 168 .height = -1, 169 .width = -1, 170 .vmode = FB_VMODE_NONINTERLACED, 171 }; 172 173 static int cable_type = CT_VGA; 174 static int video_output = VO_VGA; 175 176 static int nopan = 0; 177 static int nowrap = 1; 178 179 /* 180 * We do all updating, blanking, etc. during the vertical retrace period 181 */ 182 static unsigned int do_vmode_full = 0; /* Change the video mode */ 183 static unsigned int do_vmode_pan = 0; /* Update the video mode */ 184 static short do_blank = 0; /* (Un)Blank the screen */ 185 186 static unsigned int is_blanked = 0; /* Is the screen blanked? */ 187 188 #ifdef CONFIG_SH_STORE_QUEUES 189 static unsigned long pvr2fb_map; 190 #endif 191 192 #ifdef CONFIG_PVR2_DMA 193 static unsigned int shdma = PVR2_CASCADE_CHAN; 194 static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS; 195 #endif 196 197 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue, 198 unsigned int transp, struct fb_info *info); 199 static int pvr2fb_blank(int blank, struct fb_info *info); 200 static unsigned long get_line_length(int xres_virtual, int bpp); 201 static void set_color_bitfields(struct fb_var_screeninfo *var); 202 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info); 203 static int pvr2fb_set_par(struct fb_info *info); 204 static void pvr2_update_display(struct fb_info *info); 205 static void pvr2_init_display(struct fb_info *info); 206 static void pvr2_do_blank(void); 207 static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id); 208 static int pvr2_init_cable(void); 209 static int pvr2_get_param(const struct pvr2_params *p, const char *s, 210 int val, int size); 211 #ifdef CONFIG_PVR2_DMA 212 static ssize_t pvr2fb_write(struct fb_info *info, const char *buf, 213 size_t count, loff_t *ppos); 214 #endif 215 216 static struct fb_ops pvr2fb_ops = { 217 .owner = THIS_MODULE, 218 .fb_setcolreg = pvr2fb_setcolreg, 219 .fb_blank = pvr2fb_blank, 220 .fb_check_var = pvr2fb_check_var, 221 .fb_set_par = pvr2fb_set_par, 222 #ifdef CONFIG_PVR2_DMA 223 .fb_write = pvr2fb_write, 224 #endif 225 .fb_fillrect = cfb_fillrect, 226 .fb_copyarea = cfb_copyarea, 227 .fb_imageblit = cfb_imageblit, 228 }; 229 230 static struct fb_videomode pvr2_modedb[] = { 231 /* 232 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with 233 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and 234 * NTSC, so it shouldn't be a problem (I hope). 235 */ 236 237 { 238 /* 640x480 @ 60Hz interlaced (NTSC) */ 239 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26, 240 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP 241 }, { 242 /* 640x240 @ 60Hz (NTSC) */ 243 /* XXX: Broken! Don't use... */ 244 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22, 245 FB_SYNC_BROADCAST, FB_VMODE_YWRAP 246 }, { 247 /* 640x480 @ 60hz (VGA) */ 248 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26, 249 0, FB_VMODE_YWRAP 250 }, 251 }; 252 253 #define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb) 254 255 #define DEFMODE_NTSC 0 256 #define DEFMODE_PAL 0 257 #define DEFMODE_VGA 2 258 259 static int defmode = DEFMODE_NTSC; 260 static char *mode_option = NULL; 261 262 static inline void pvr2fb_set_pal_type(unsigned int type) 263 { 264 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par; 265 266 fb_writel(type, par->mmio_base + 0x108); 267 } 268 269 static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par, 270 unsigned int regno, 271 unsigned int val) 272 { 273 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno)); 274 } 275 276 static int pvr2fb_blank(int blank, struct fb_info *info) 277 { 278 do_blank = blank ? blank : -1; 279 return 0; 280 } 281 282 static inline unsigned long get_line_length(int xres_virtual, int bpp) 283 { 284 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3); 285 } 286 287 static void set_color_bitfields(struct fb_var_screeninfo *var) 288 { 289 switch (var->bits_per_pixel) { 290 case 16: /* RGB 565 */ 291 pvr2fb_set_pal_type(PAL_RGB565); 292 var->red.offset = 11; var->red.length = 5; 293 var->green.offset = 5; var->green.length = 6; 294 var->blue.offset = 0; var->blue.length = 5; 295 var->transp.offset = 0; var->transp.length = 0; 296 break; 297 case 24: /* RGB 888 */ 298 var->red.offset = 16; var->red.length = 8; 299 var->green.offset = 8; var->green.length = 8; 300 var->blue.offset = 0; var->blue.length = 8; 301 var->transp.offset = 0; var->transp.length = 0; 302 break; 303 case 32: /* ARGB 8888 */ 304 pvr2fb_set_pal_type(PAL_ARGB8888); 305 var->red.offset = 16; var->red.length = 8; 306 var->green.offset = 8; var->green.length = 8; 307 var->blue.offset = 0; var->blue.length = 8; 308 var->transp.offset = 24; var->transp.length = 8; 309 break; 310 } 311 } 312 313 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, 314 unsigned int green, unsigned int blue, 315 unsigned int transp, struct fb_info *info) 316 { 317 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; 318 unsigned int tmp; 319 320 if (regno > info->cmap.len) 321 return 1; 322 323 /* 324 * We only support the hardware palette for 16 and 32bpp. It's also 325 * expected that the palette format has been set by the time we get 326 * here, so we don't waste time setting it again. 327 */ 328 switch (info->var.bits_per_pixel) { 329 case 16: /* RGB 565 */ 330 tmp = (red & 0xf800) | 331 ((green & 0xfc00) >> 5) | 332 ((blue & 0xf800) >> 11); 333 334 pvr2fb_set_pal_entry(par, regno, tmp); 335 break; 336 case 24: /* RGB 888 */ 337 red >>= 8; green >>= 8; blue >>= 8; 338 tmp = (red << 16) | (green << 8) | blue; 339 break; 340 case 32: /* ARGB 8888 */ 341 red >>= 8; green >>= 8; blue >>= 8; 342 tmp = (transp << 24) | (red << 16) | (green << 8) | blue; 343 344 pvr2fb_set_pal_entry(par, regno, tmp); 345 break; 346 default: 347 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel); 348 return 1; 349 } 350 351 if (regno < 16) 352 ((u32*)(info->pseudo_palette))[regno] = tmp; 353 354 return 0; 355 } 356 357 static int pvr2fb_set_par(struct fb_info *info) 358 { 359 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; 360 struct fb_var_screeninfo *var = &info->var; 361 unsigned long line_length; 362 unsigned int vtotal; 363 364 /* 365 * XXX: It's possible that a user could use a VGA box, change the cable 366 * type in hardware (i.e. switch from VGA<->composite), then change 367 * modes (i.e. switching to another VT). If that happens we should 368 * automagically change the output format to cope, but currently I 369 * don't have a VGA box to make sure this works properly. 370 */ 371 cable_type = pvr2_init_cable(); 372 if (cable_type == CT_VGA && video_output != VO_VGA) 373 video_output = VO_VGA; 374 375 var->vmode &= FB_VMODE_MASK; 376 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA) 377 par->is_interlaced = 1; 378 /* 379 * XXX: Need to be more creative with this (i.e. allow doublecan for 380 * PAL/NTSC output). 381 */ 382 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA) 383 par->is_doublescan = 1; 384 385 par->hsync_total = var->left_margin + var->xres + var->right_margin + 386 var->hsync_len; 387 par->vsync_total = var->upper_margin + var->yres + var->lower_margin + 388 var->vsync_len; 389 390 if (var->sync & FB_SYNC_BROADCAST) { 391 vtotal = par->vsync_total; 392 if (par->is_interlaced) 393 vtotal /= 2; 394 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) { 395 /* XXX: Check for start values here... */ 396 /* XXX: Check hardware for PAL-compatibility */ 397 par->borderstart_h = 116; 398 par->borderstart_v = 44; 399 } else { 400 /* NTSC video output */ 401 par->borderstart_h = 126; 402 par->borderstart_v = 18; 403 } 404 } else { 405 /* VGA mode */ 406 /* XXX: What else needs to be checked? */ 407 /* 408 * XXX: We have a little freedom in VGA modes, what ranges 409 * should be here (i.e. hsync/vsync totals, etc.)? 410 */ 411 par->borderstart_h = 126; 412 par->borderstart_v = 40; 413 } 414 415 /* Calculate the remainding offsets */ 416 par->diwstart_h = par->borderstart_h + var->left_margin; 417 par->diwstart_v = par->borderstart_v + var->upper_margin; 418 par->borderstop_h = par->diwstart_h + var->xres + 419 var->right_margin; 420 par->borderstop_v = par->diwstart_v + var->yres + 421 var->lower_margin; 422 423 if (!par->is_interlaced) 424 par->borderstop_v /= 2; 425 if (info->var.xres < 640) 426 par->is_lowres = 1; 427 428 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel); 429 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length; 430 info->fix.line_length = line_length; 431 return 0; 432 } 433 434 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 435 { 436 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; 437 unsigned int vtotal, hsync_total; 438 unsigned long line_length; 439 440 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) { 441 pr_debug("Invalid pixclock value %d\n", var->pixclock); 442 return -EINVAL; 443 } 444 445 if (var->xres < 320) 446 var->xres = 320; 447 if (var->yres < 240) 448 var->yres = 240; 449 if (var->xres_virtual < var->xres) 450 var->xres_virtual = var->xres; 451 if (var->yres_virtual < var->yres) 452 var->yres_virtual = var->yres; 453 454 if (var->bits_per_pixel <= 16) 455 var->bits_per_pixel = 16; 456 else if (var->bits_per_pixel <= 24) 457 var->bits_per_pixel = 24; 458 else if (var->bits_per_pixel <= 32) 459 var->bits_per_pixel = 32; 460 461 set_color_bitfields(var); 462 463 if (var->vmode & FB_VMODE_YWRAP) { 464 if (var->xoffset || var->yoffset < 0 || 465 var->yoffset >= var->yres_virtual) { 466 var->xoffset = var->yoffset = 0; 467 } else { 468 if (var->xoffset > var->xres_virtual - var->xres || 469 var->yoffset > var->yres_virtual - var->yres || 470 var->xoffset < 0 || var->yoffset < 0) 471 var->xoffset = var->yoffset = 0; 472 } 473 } else { 474 var->xoffset = var->yoffset = 0; 475 } 476 477 /* 478 * XXX: Need to be more creative with this (i.e. allow doublecan for 479 * PAL/NTSC output). 480 */ 481 if (var->yres < 480 && video_output == VO_VGA) 482 var->vmode |= FB_VMODE_DOUBLE; 483 484 if (video_output != VO_VGA) { 485 var->sync |= FB_SYNC_BROADCAST; 486 var->vmode |= FB_VMODE_INTERLACED; 487 } else { 488 var->sync &= ~FB_SYNC_BROADCAST; 489 var->vmode &= ~FB_VMODE_INTERLACED; 490 var->vmode |= FB_VMODE_NONINTERLACED; 491 } 492 493 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) { 494 var->right_margin = par->borderstop_h - 495 (par->diwstart_h + var->xres); 496 var->left_margin = par->diwstart_h - par->borderstart_h; 497 var->hsync_len = par->borderstart_h + 498 (par->hsync_total - par->borderstop_h); 499 500 var->upper_margin = par->diwstart_v - par->borderstart_v; 501 var->lower_margin = par->borderstop_v - 502 (par->diwstart_v + var->yres); 503 var->vsync_len = par->borderstop_v + 504 (par->vsync_total - par->borderstop_v); 505 } 506 507 hsync_total = var->left_margin + var->xres + var->right_margin + 508 var->hsync_len; 509 vtotal = var->upper_margin + var->yres + var->lower_margin + 510 var->vsync_len; 511 512 if (var->sync & FB_SYNC_BROADCAST) { 513 if (var->vmode & FB_VMODE_INTERLACED) 514 vtotal /= 2; 515 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) { 516 /* PAL video output */ 517 /* XXX: Should be using a range here ... ? */ 518 if (hsync_total != PAL_HTOTAL) { 519 pr_debug("invalid hsync total for PAL\n"); 520 return -EINVAL; 521 } 522 } else { 523 /* NTSC video output */ 524 if (hsync_total != NTSC_HTOTAL) { 525 pr_debug("invalid hsync total for NTSC\n"); 526 return -EINVAL; 527 } 528 } 529 } 530 531 /* Check memory sizes */ 532 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel); 533 if (line_length * var->yres_virtual > info->fix.smem_len) 534 return -ENOMEM; 535 536 return 0; 537 } 538 539 static void pvr2_update_display(struct fb_info *info) 540 { 541 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par; 542 struct fb_var_screeninfo *var = &info->var; 543 544 /* Update the start address of the display image */ 545 fb_writel(par->disp_start, DISP_DIWADDRL); 546 fb_writel(par->disp_start + 547 get_line_length(var->xoffset+var->xres, var->bits_per_pixel), 548 DISP_DIWADDRS); 549 } 550 551 /* 552 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't 553 * very stable. It's probably due to the fact that a lot of the 2D video 554 * registers are still undocumented. 555 */ 556 557 static void pvr2_init_display(struct fb_info *info) 558 { 559 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par; 560 struct fb_var_screeninfo *var = &info->var; 561 unsigned int diw_height, diw_width, diw_modulo = 1; 562 unsigned int bytesperpixel = var->bits_per_pixel >> 3; 563 564 /* hsync and vsync totals */ 565 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE); 566 567 /* column height, modulo, row width */ 568 /* since we're "panning" within vram, we need to offset things based 569 * on the offset from the virtual x start to our real gfx. */ 570 if (video_output != VO_VGA && par->is_interlaced) 571 diw_modulo += info->fix.line_length / 4; 572 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres); 573 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4; 574 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width, 575 DISP_DIWSIZE); 576 577 /* display address, long and short fields */ 578 fb_writel(par->disp_start, DISP_DIWADDRL); 579 fb_writel(par->disp_start + 580 get_line_length(var->xoffset+var->xres, var->bits_per_pixel), 581 DISP_DIWADDRS); 582 583 /* border horizontal, border vertical, border color */ 584 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ); 585 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT); 586 fb_writel(0, DISP_BRDRCOLR); 587 588 /* display window start position */ 589 fb_writel(par->diwstart_h, DISP_DIWHSTRT); 590 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT); 591 592 /* misc. settings */ 593 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF); 594 595 /* clock doubler (for VGA), scan doubler, display enable */ 596 fb_writel(((video_output == VO_VGA) << 23) | 597 (par->is_doublescan << 1) | 1, DISP_DIWMODE); 598 599 /* bits per pixel */ 600 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE); 601 fb_writel(bytesperpixel << 2, DISP_PIXDEPTH); 602 603 /* video enable, color sync, interlace, 604 * hsync and vsync polarity (currently unused) */ 605 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF); 606 } 607 608 /* Simulate blanking by making the border cover the entire screen */ 609 610 #define BLANK_BIT (1<<3) 611 612 static void pvr2_do_blank(void) 613 { 614 struct pvr2fb_par *par = currentpar; 615 unsigned long diwconf; 616 617 diwconf = fb_readl(DISP_DIWCONF); 618 if (do_blank > 0) 619 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF); 620 else 621 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF); 622 623 is_blanked = do_blank > 0 ? do_blank : 0; 624 } 625 626 static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id) 627 { 628 struct fb_info *info = dev_id; 629 630 if (do_vmode_pan || do_vmode_full) 631 pvr2_update_display(info); 632 if (do_vmode_full) 633 pvr2_init_display(info); 634 if (do_vmode_pan) 635 do_vmode_pan = 0; 636 if (do_vmode_full) 637 do_vmode_full = 0; 638 if (do_blank) { 639 pvr2_do_blank(); 640 do_blank = 0; 641 } 642 return IRQ_HANDLED; 643 } 644 645 /* 646 * Determine the cable type and initialize the cable output format. Don't do 647 * anything if the cable type has been overidden (via "cable:XX"). 648 */ 649 650 #define PCTRA 0xff80002c 651 #define PDTRA 0xff800030 652 #define VOUTC 0xa0702c00 653 654 static int pvr2_init_cable(void) 655 { 656 if (cable_type < 0) { 657 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000, 658 PCTRA); 659 cable_type = (fb_readw(PDTRA) >> 8) & 3; 660 } 661 662 /* Now select the output format (either composite or other) */ 663 /* XXX: Save the previous val first, as this reg is also AICA 664 related */ 665 if (cable_type == CT_COMPOSITE) 666 fb_writel(3 << 8, VOUTC); 667 else if (cable_type == CT_RGB) 668 fb_writel(1 << 9, VOUTC); 669 else 670 fb_writel(0, VOUTC); 671 672 return cable_type; 673 } 674 675 #ifdef CONFIG_PVR2_DMA 676 static ssize_t pvr2fb_write(struct fb_info *info, const char *buf, 677 size_t count, loff_t *ppos) 678 { 679 unsigned long dst, start, end, len; 680 unsigned int nr_pages; 681 struct page **pages; 682 int ret, i; 683 684 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT; 685 686 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL); 687 if (!pages) 688 return -ENOMEM; 689 690 ret = get_user_pages_fast((unsigned long)buf, nr_pages, FOLL_WRITE, pages); 691 if (ret < nr_pages) { 692 nr_pages = ret; 693 ret = -EINVAL; 694 goto out_unmap; 695 } 696 697 dma_configure_channel(shdma, 0x12c1); 698 699 dst = (unsigned long)fb_info->screen_base + *ppos; 700 start = (unsigned long)page_address(pages[0]); 701 end = (unsigned long)page_address(pages[nr_pages]); 702 len = nr_pages << PAGE_SHIFT; 703 704 /* Half-assed contig check */ 705 if (start + len == end) { 706 /* As we do this in one shot, it's either all or nothing.. */ 707 if ((*ppos + len) > fb_info->fix.smem_len) { 708 ret = -ENOSPC; 709 goto out_unmap; 710 } 711 712 dma_write(shdma, start, 0, len); 713 dma_write(pvr2dma, 0, dst, len); 714 dma_wait_for_completion(pvr2dma); 715 716 goto out; 717 } 718 719 /* Not contiguous, writeout per-page instead.. */ 720 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) { 721 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) { 722 ret = -ENOSPC; 723 goto out_unmap; 724 } 725 726 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0); 727 dma_write_page(pvr2dma, 0, dst); 728 dma_wait_for_completion(pvr2dma); 729 } 730 731 out: 732 *ppos += count; 733 ret = count; 734 735 out_unmap: 736 for (i = 0; i < nr_pages; i++) 737 put_page(pages[i]); 738 739 kfree(pages); 740 741 return ret; 742 } 743 #endif /* CONFIG_PVR2_DMA */ 744 745 /** 746 * pvr2fb_common_init 747 * 748 * Common init code for the PVR2 chips. 749 * 750 * This mostly takes care of the common aspects of the fb setup and 751 * registration. It's expected that the board-specific init code has 752 * already setup pvr2_fix with something meaningful at this point. 753 * 754 * Device info reporting is also done here, as well as picking a sane 755 * default from the modedb. For board-specific modelines, simply define 756 * a per-board modedb. 757 * 758 * Also worth noting is that the cable and video output types are likely 759 * always going to be VGA for the PCI-based PVR2 boards, but we leave this 760 * in for flexibility anyways. Who knows, maybe someone has tv-out on a 761 * PCI-based version of these things ;-) 762 */ 763 static int pvr2fb_common_init(void) 764 { 765 struct pvr2fb_par *par = currentpar; 766 unsigned long modememused, rev; 767 768 fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start, 769 pvr2_fix.smem_len); 770 771 if (!fb_info->screen_base) { 772 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n"); 773 goto out_err; 774 } 775 776 par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start, 777 pvr2_fix.mmio_len); 778 if (!par->mmio_base) { 779 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n"); 780 goto out_err; 781 } 782 783 fb_memset(fb_info->screen_base, 0, pvr2_fix.smem_len); 784 785 pvr2_fix.ypanstep = nopan ? 0 : 1; 786 pvr2_fix.ywrapstep = nowrap ? 0 : 1; 787 788 fb_info->fbops = &pvr2fb_ops; 789 fb_info->fix = pvr2_fix; 790 fb_info->par = currentpar; 791 fb_info->pseudo_palette = currentpar->palette; 792 fb_info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; 793 794 if (video_output == VO_VGA) 795 defmode = DEFMODE_VGA; 796 797 if (!mode_option) 798 mode_option = "640x480@60"; 799 800 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb, 801 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16)) 802 fb_info->var = pvr2_var; 803 804 fb_alloc_cmap(&fb_info->cmap, 256, 0); 805 806 if (register_framebuffer(fb_info) < 0) 807 goto out_err; 808 /*Must write PIXDEPTH to register before anything is displayed - so force init */ 809 pvr2_init_display(fb_info); 810 811 modememused = get_line_length(fb_info->var.xres_virtual, 812 fb_info->var.bits_per_pixel); 813 modememused *= fb_info->var.yres_virtual; 814 815 rev = fb_readl(par->mmio_base + 0x04); 816 817 fb_info(fb_info, "%s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n", 818 fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f, 819 modememused >> 10, 820 (unsigned long)(fb_info->fix.smem_len >> 10)); 821 fb_info(fb_info, "Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n", 822 fb_info->var.xres, fb_info->var.yres, 823 fb_info->var.bits_per_pixel, 824 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel), 825 (char *)pvr2_get_param(cables, NULL, cable_type, 3), 826 (char *)pvr2_get_param(outputs, NULL, video_output, 3)); 827 828 #ifdef CONFIG_SH_STORE_QUEUES 829 fb_notice(fb_info, "registering with SQ API\n"); 830 831 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len, 832 fb_info->fix.id, PAGE_SHARED); 833 834 fb_notice(fb_info, "Mapped video memory to SQ addr 0x%lx\n", 835 pvr2fb_map); 836 #endif 837 838 return 0; 839 840 out_err: 841 if (fb_info->screen_base) 842 iounmap(fb_info->screen_base); 843 if (par->mmio_base) 844 iounmap((void *)par->mmio_base); 845 846 return -ENXIO; 847 } 848 849 #ifdef CONFIG_SH_DREAMCAST 850 static int __init pvr2fb_dc_init(void) 851 { 852 if (!mach_is_dreamcast()) 853 return -ENXIO; 854 855 /* Make a guess at the monitor based on the attached cable */ 856 if (pvr2_init_cable() == CT_VGA) { 857 fb_info->monspecs.hfmin = 30000; 858 fb_info->monspecs.hfmax = 70000; 859 fb_info->monspecs.vfmin = 60; 860 fb_info->monspecs.vfmax = 60; 861 } else { 862 /* Not VGA, using a TV (taken from acornfb) */ 863 fb_info->monspecs.hfmin = 15469; 864 fb_info->monspecs.hfmax = 15781; 865 fb_info->monspecs.vfmin = 49; 866 fb_info->monspecs.vfmax = 51; 867 } 868 869 /* 870 * XXX: This needs to pull default video output via BIOS or other means 871 */ 872 if (video_output < 0) { 873 if (cable_type == CT_VGA) { 874 video_output = VO_VGA; 875 } else { 876 video_output = VO_NTSC; 877 } 878 } 879 880 /* 881 * Nothing exciting about the DC PVR2 .. only a measly 8MiB. 882 */ 883 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */ 884 pvr2_fix.smem_len = 8 << 20; 885 886 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */ 887 pvr2_fix.mmio_len = 0x2000; 888 889 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, IRQF_SHARED, 890 "pvr2 VBL handler", fb_info)) { 891 return -EBUSY; 892 } 893 894 #ifdef CONFIG_PVR2_DMA 895 if (request_dma(pvr2dma, "pvr2") != 0) { 896 free_irq(HW_EVENT_VSYNC, fb_info); 897 return -EBUSY; 898 } 899 #endif 900 901 return pvr2fb_common_init(); 902 } 903 904 static void __exit pvr2fb_dc_exit(void) 905 { 906 if (fb_info->screen_base) { 907 iounmap(fb_info->screen_base); 908 fb_info->screen_base = NULL; 909 } 910 if (currentpar->mmio_base) { 911 iounmap((void *)currentpar->mmio_base); 912 currentpar->mmio_base = 0; 913 } 914 915 free_irq(HW_EVENT_VSYNC, fb_info); 916 #ifdef CONFIG_PVR2_DMA 917 free_dma(pvr2dma); 918 #endif 919 } 920 #endif /* CONFIG_SH_DREAMCAST */ 921 922 #ifdef CONFIG_PCI 923 static int pvr2fb_pci_probe(struct pci_dev *pdev, 924 const struct pci_device_id *ent) 925 { 926 int ret; 927 928 ret = pci_enable_device(pdev); 929 if (ret) { 930 printk(KERN_ERR "pvr2fb: PCI enable failed\n"); 931 return ret; 932 } 933 934 ret = pci_request_regions(pdev, "pvr2fb"); 935 if (ret) { 936 printk(KERN_ERR "pvr2fb: PCI request regions failed\n"); 937 return ret; 938 } 939 940 /* 941 * Slightly more exciting than the DC PVR2 .. 16MiB! 942 */ 943 pvr2_fix.smem_start = pci_resource_start(pdev, 0); 944 pvr2_fix.smem_len = pci_resource_len(pdev, 0); 945 946 pvr2_fix.mmio_start = pci_resource_start(pdev, 1); 947 pvr2_fix.mmio_len = pci_resource_len(pdev, 1); 948 949 fb_info->device = &pdev->dev; 950 951 return pvr2fb_common_init(); 952 } 953 954 static void pvr2fb_pci_remove(struct pci_dev *pdev) 955 { 956 if (fb_info->screen_base) { 957 iounmap(fb_info->screen_base); 958 fb_info->screen_base = NULL; 959 } 960 if (currentpar->mmio_base) { 961 iounmap((void *)currentpar->mmio_base); 962 currentpar->mmio_base = 0; 963 } 964 965 pci_release_regions(pdev); 966 } 967 968 static const struct pci_device_id pvr2fb_pci_tbl[] = { 969 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250, 970 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 971 { 0, }, 972 }; 973 974 MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl); 975 976 static struct pci_driver pvr2fb_pci_driver = { 977 .name = "pvr2fb", 978 .id_table = pvr2fb_pci_tbl, 979 .probe = pvr2fb_pci_probe, 980 .remove = pvr2fb_pci_remove, 981 }; 982 983 static int __init pvr2fb_pci_init(void) 984 { 985 return pci_register_driver(&pvr2fb_pci_driver); 986 } 987 988 static void __exit pvr2fb_pci_exit(void) 989 { 990 pci_unregister_driver(&pvr2fb_pci_driver); 991 } 992 #endif /* CONFIG_PCI */ 993 994 static int pvr2_get_param(const struct pvr2_params *p, const char *s, int val, 995 int size) 996 { 997 int i; 998 999 for (i = 0 ; i < size ; i++ ) { 1000 if (s != NULL) { 1001 if (!strncasecmp(p[i].name, s, strlen(s))) 1002 return p[i].val; 1003 } else { 1004 if (p[i].val == val) 1005 return (int)p[i].name; 1006 } 1007 } 1008 return -1; 1009 } 1010 1011 /* 1012 * Parse command arguments. Supported arguments are: 1013 * inverse Use inverse color maps 1014 * cable:composite|rgb|vga Override the video cable type 1015 * output:NTSC|PAL|VGA Override the video output format 1016 * 1017 * <xres>x<yres>[-<bpp>][@<refresh>] or, 1018 * <name>[-<bpp>][@<refresh>] Startup using this video mode 1019 */ 1020 1021 #ifndef MODULE 1022 static int __init pvr2fb_setup(char *options) 1023 { 1024 char *this_opt; 1025 char cable_arg[80]; 1026 char output_arg[80]; 1027 1028 if (!options || !*options) 1029 return 0; 1030 1031 while ((this_opt = strsep(&options, ","))) { 1032 if (!*this_opt) 1033 continue; 1034 if (!strcmp(this_opt, "inverse")) { 1035 fb_invert_cmaps(); 1036 } else if (!strncmp(this_opt, "cable:", 6)) { 1037 strcpy(cable_arg, this_opt + 6); 1038 } else if (!strncmp(this_opt, "output:", 7)) { 1039 strcpy(output_arg, this_opt + 7); 1040 } else if (!strncmp(this_opt, "nopan", 5)) { 1041 nopan = 1; 1042 } else if (!strncmp(this_opt, "nowrap", 6)) { 1043 nowrap = 1; 1044 } else { 1045 mode_option = this_opt; 1046 } 1047 } 1048 1049 if (*cable_arg) 1050 cable_type = pvr2_get_param(cables, cable_arg, 0, 3); 1051 if (*output_arg) 1052 video_output = pvr2_get_param(outputs, output_arg, 0, 3); 1053 1054 return 0; 1055 } 1056 #endif 1057 1058 static struct pvr2_board { 1059 int (*init)(void); 1060 void (*exit)(void); 1061 char name[16]; 1062 } board_driver[] __refdata = { 1063 #ifdef CONFIG_SH_DREAMCAST 1064 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" }, 1065 #endif 1066 #ifdef CONFIG_PCI 1067 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" }, 1068 #endif 1069 { 0, }, 1070 }; 1071 1072 static int __init pvr2fb_init(void) 1073 { 1074 int i, ret = -ENODEV; 1075 1076 #ifndef MODULE 1077 char *option = NULL; 1078 1079 if (fb_get_options("pvr2fb", &option)) 1080 return -ENODEV; 1081 pvr2fb_setup(option); 1082 #endif 1083 1084 fb_info = framebuffer_alloc(sizeof(struct pvr2fb_par), NULL); 1085 1086 if (!fb_info) { 1087 printk(KERN_ERR "Failed to allocate memory for fb_info\n"); 1088 return -ENOMEM; 1089 } 1090 1091 1092 currentpar = fb_info->par; 1093 1094 for (i = 0; i < ARRAY_SIZE(board_driver); i++) { 1095 struct pvr2_board *pvr_board = board_driver + i; 1096 1097 if (!pvr_board->init) 1098 continue; 1099 1100 ret = pvr_board->init(); 1101 1102 if (ret != 0) { 1103 printk(KERN_ERR "pvr2fb: Failed init of %s device\n", 1104 pvr_board->name); 1105 framebuffer_release(fb_info); 1106 break; 1107 } 1108 } 1109 1110 return ret; 1111 } 1112 1113 static void __exit pvr2fb_exit(void) 1114 { 1115 int i; 1116 1117 for (i = 0; i < ARRAY_SIZE(board_driver); i++) { 1118 struct pvr2_board *pvr_board = board_driver + i; 1119 1120 if (pvr_board->exit) 1121 pvr_board->exit(); 1122 } 1123 1124 #ifdef CONFIG_SH_STORE_QUEUES 1125 sq_unmap(pvr2fb_map); 1126 #endif 1127 1128 unregister_framebuffer(fb_info); 1129 framebuffer_release(fb_info); 1130 } 1131 1132 module_init(pvr2fb_init); 1133 module_exit(pvr2fb_exit); 1134 1135 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>"); 1136 MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards"); 1137 MODULE_LICENSE("GPL"); 1138