1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_GENERIC_BITOPS_NON_ATOMIC_H_
3 #define _ASM_GENERIC_BITOPS_NON_ATOMIC_H_
4 
5 #include <asm/types.h>
6 
7 /**
8  * __set_bit - Set a bit in memory
9  * @nr: the bit to set
10  * @addr: the address to start counting from
11  *
12  * Unlike set_bit(), this function is non-atomic and may be reordered.
13  * If it's called on the same region of memory simultaneously, the effect
14  * may be that only one operation succeeds.
15  */
16 static inline void __set_bit(int nr, volatile unsigned long *addr)
17 {
18 	unsigned long mask = BIT_MASK(nr);
19 	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
20 
21 	*p  |= mask;
22 }
23 
24 static inline void __clear_bit(int nr, volatile unsigned long *addr)
25 {
26 	unsigned long mask = BIT_MASK(nr);
27 	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
28 
29 	*p &= ~mask;
30 }
31 
32 /**
33  * __change_bit - Toggle a bit in memory
34  * @nr: the bit to change
35  * @addr: the address to start counting from
36  *
37  * Unlike change_bit(), this function is non-atomic and may be reordered.
38  * If it's called on the same region of memory simultaneously, the effect
39  * may be that only one operation succeeds.
40  */
41 static inline void __change_bit(int nr, volatile unsigned long *addr)
42 {
43 	unsigned long mask = BIT_MASK(nr);
44 	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
45 
46 	*p ^= mask;
47 }
48 
49 /**
50  * __test_and_set_bit - Set a bit and return its old value
51  * @nr: Bit to set
52  * @addr: Address to count from
53  *
54  * This operation is non-atomic and can be reordered.
55  * If two examples of this operation race, one can appear to succeed
56  * but actually fail.  You must protect multiple accesses with a lock.
57  */
58 static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
59 {
60 	unsigned long mask = BIT_MASK(nr);
61 	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
62 	unsigned long old = *p;
63 
64 	*p = old | mask;
65 	return (old & mask) != 0;
66 }
67 
68 /**
69  * __test_and_clear_bit - Clear a bit and return its old value
70  * @nr: Bit to clear
71  * @addr: Address to count from
72  *
73  * This operation is non-atomic and can be reordered.
74  * If two examples of this operation race, one can appear to succeed
75  * but actually fail.  You must protect multiple accesses with a lock.
76  */
77 static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
78 {
79 	unsigned long mask = BIT_MASK(nr);
80 	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
81 	unsigned long old = *p;
82 
83 	*p = old & ~mask;
84 	return (old & mask) != 0;
85 }
86 
87 /* WARNING: non atomic and it can be reordered! */
88 static inline int __test_and_change_bit(int nr,
89 					    volatile unsigned long *addr)
90 {
91 	unsigned long mask = BIT_MASK(nr);
92 	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
93 	unsigned long old = *p;
94 
95 	*p = old ^ mask;
96 	return (old & mask) != 0;
97 }
98 
99 /**
100  * test_bit - Determine whether a bit is set
101  * @nr: bit number to test
102  * @addr: Address to start counting from
103  */
104 static inline int test_bit(int nr, const volatile unsigned long *addr)
105 {
106 	return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
107 }
108 
109 #endif /* _ASM_GENERIC_BITOPS_NON_ATOMIC_H_ */
110