1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 25c01b46bSArnd Bergmann #ifndef __ASM_GENERIC_CACHE_H 35c01b46bSArnd Bergmann #define __ASM_GENERIC_CACHE_H 45c01b46bSArnd Bergmann /* 55c01b46bSArnd Bergmann * 32 bytes appears to be the most common cache line size, 65c01b46bSArnd Bergmann * so make that the default here. Architectures with larger 75c01b46bSArnd Bergmann * cache lines need to provide their own cache.h. 85c01b46bSArnd Bergmann */ 95c01b46bSArnd Bergmann 105c01b46bSArnd Bergmann #define L1_CACHE_SHIFT 5 115c01b46bSArnd Bergmann #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 125c01b46bSArnd Bergmann 135c01b46bSArnd Bergmann #endif /* __ASM_GENERIC_CACHE_H */ 14