170dad67aSJoel Stanley /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
270dad67aSJoel Stanley 
370dad67aSJoel Stanley #ifndef DT_BINDINGS_ASPEED_CLOCK_H
470dad67aSJoel Stanley #define DT_BINDINGS_ASPEED_CLOCK_H
570dad67aSJoel Stanley 
670dad67aSJoel Stanley #define ASPEED_CLK_GATE_ECLK		0
770dad67aSJoel Stanley #define ASPEED_CLK_GATE_GCLK		1
870dad67aSJoel Stanley #define ASPEED_CLK_GATE_MCLK		2
970dad67aSJoel Stanley #define ASPEED_CLK_GATE_VCLK		3
1070dad67aSJoel Stanley #define ASPEED_CLK_GATE_BCLK		4
1170dad67aSJoel Stanley #define ASPEED_CLK_GATE_DCLK		5
1270dad67aSJoel Stanley #define ASPEED_CLK_GATE_REFCLK		6
1370dad67aSJoel Stanley #define ASPEED_CLK_GATE_USBPORT2CLK	7
1470dad67aSJoel Stanley #define ASPEED_CLK_GATE_LCLK		8
1570dad67aSJoel Stanley #define ASPEED_CLK_GATE_USBUHCICLK	9
1670dad67aSJoel Stanley #define ASPEED_CLK_GATE_D1CLK		10
1770dad67aSJoel Stanley #define ASPEED_CLK_GATE_YCLK		11
1870dad67aSJoel Stanley #define ASPEED_CLK_GATE_USBPORT1CLK	12
1970dad67aSJoel Stanley #define ASPEED_CLK_GATE_UART1CLK	13
2070dad67aSJoel Stanley #define ASPEED_CLK_GATE_UART2CLK	14
2170dad67aSJoel Stanley #define ASPEED_CLK_GATE_UART5CLK	15
2270dad67aSJoel Stanley #define ASPEED_CLK_GATE_ESPICLK		16
2370dad67aSJoel Stanley #define ASPEED_CLK_GATE_MAC1CLK		17
2470dad67aSJoel Stanley #define ASPEED_CLK_GATE_MAC2CLK		18
2570dad67aSJoel Stanley #define ASPEED_CLK_GATE_RSACLK		19
2670dad67aSJoel Stanley #define ASPEED_CLK_GATE_UART3CLK	20
2770dad67aSJoel Stanley #define ASPEED_CLK_GATE_UART4CLK	21
28cd88259aSLei YU #define ASPEED_CLK_GATE_SDCLK		22
2970dad67aSJoel Stanley #define ASPEED_CLK_GATE_LHCCLK		23
3070dad67aSJoel Stanley #define ASPEED_CLK_HPLL			24
3170dad67aSJoel Stanley #define ASPEED_CLK_AHB			25
3270dad67aSJoel Stanley #define ASPEED_CLK_APB			26
3370dad67aSJoel Stanley #define ASPEED_CLK_UART			27
3470dad67aSJoel Stanley #define ASPEED_CLK_SDIO			28
3570dad67aSJoel Stanley #define ASPEED_CLK_ECLK			29
3670dad67aSJoel Stanley #define ASPEED_CLK_ECLK_MUX		30
3770dad67aSJoel Stanley #define ASPEED_CLK_LHCLK		31
3870dad67aSJoel Stanley #define ASPEED_CLK_MAC			32
3970dad67aSJoel Stanley #define ASPEED_CLK_BCLK			33
4070dad67aSJoel Stanley #define ASPEED_CLK_MPLL			34
4167b6e5cfSLei YU #define ASPEED_CLK_24M			35
425b468cc4SAndrew Jeffery #define ASPEED_CLK_MAC1RCLK		36
435b468cc4SAndrew Jeffery #define ASPEED_CLK_MAC2RCLK		37
4470dad67aSJoel Stanley 
4570dad67aSJoel Stanley #define ASPEED_RESET_XDMA		0
4670dad67aSJoel Stanley #define ASPEED_RESET_MCTP		1
4770dad67aSJoel Stanley #define ASPEED_RESET_ADC		2
4870dad67aSJoel Stanley #define ASPEED_RESET_JTAG_MASTER	3
4970dad67aSJoel Stanley #define ASPEED_RESET_MIC		4
5070dad67aSJoel Stanley #define ASPEED_RESET_PWM		5
51e76e5682SJae Hyun Yoo #define ASPEED_RESET_PECI		6
5270dad67aSJoel Stanley #define ASPEED_RESET_I2C		7
5370dad67aSJoel Stanley #define ASPEED_RESET_AHB		8
54dcb899c4SJoel Stanley #define ASPEED_RESET_CRT1		9
55*dffc3c56SNeal Liu #define ASPEED_RESET_HACE		10
5670dad67aSJoel Stanley 
5770dad67aSJoel Stanley #endif
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