1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2602408e3STushar Behera /* 3602408e3STushar Behera * This header provides constants for Samsung audio subsystem 4602408e3STushar Behera * clock controller. 5602408e3STushar Behera * 6602408e3STushar Behera * The constants defined in this header are being used in dts 7602408e3STushar Behera * and exynos audss driver. 8602408e3STushar Behera */ 9602408e3STushar Behera 10602408e3STushar Behera #ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H 11602408e3STushar Behera #define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H 12602408e3STushar Behera 13602408e3STushar Behera #define EXYNOS_MOUT_AUDSS 0 14602408e3STushar Behera #define EXYNOS_MOUT_I2S 1 15602408e3STushar Behera #define EXYNOS_DOUT_SRP 2 16602408e3STushar Behera #define EXYNOS_DOUT_AUD_BUS 3 17602408e3STushar Behera #define EXYNOS_DOUT_I2S 4 18602408e3STushar Behera #define EXYNOS_SRP_CLK 5 19602408e3STushar Behera #define EXYNOS_I2S_BUS 6 20602408e3STushar Behera #define EXYNOS_SCLK_I2S 7 21602408e3STushar Behera #define EXYNOS_PCM_BUS 8 22602408e3STushar Behera #define EXYNOS_SCLK_PCM 9 23602408e3STushar Behera #define EXYNOS_ADMA 10 24602408e3STushar Behera 25602408e3STushar Behera #define EXYNOS_AUDSS_MAX_CLKS 11 26602408e3STushar Behera 27602408e3STushar Behera #endif 28