1*324e0bfcSJonathan Marek /* SPDX-License-Identifier: GPL-2.0 */ 2*324e0bfcSJonathan Marek /* 3*324e0bfcSJonathan Marek * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. 4*324e0bfcSJonathan Marek */ 5*324e0bfcSJonathan Marek 6*324e0bfcSJonathan Marek #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8250_H 7*324e0bfcSJonathan Marek #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8250_H 8*324e0bfcSJonathan Marek 9*324e0bfcSJonathan Marek /* GPU_CC clock registers */ 10*324e0bfcSJonathan Marek #define GPU_CC_AHB_CLK 0 11*324e0bfcSJonathan Marek #define GPU_CC_CRC_AHB_CLK 1 12*324e0bfcSJonathan Marek #define GPU_CC_CX_APB_CLK 2 13*324e0bfcSJonathan Marek #define GPU_CC_CX_GMU_CLK 3 14*324e0bfcSJonathan Marek #define GPU_CC_CX_SNOC_DVM_CLK 4 15*324e0bfcSJonathan Marek #define GPU_CC_CXO_AON_CLK 5 16*324e0bfcSJonathan Marek #define GPU_CC_CXO_CLK 6 17*324e0bfcSJonathan Marek #define GPU_CC_GMU_CLK_SRC 7 18*324e0bfcSJonathan Marek #define GPU_CC_GX_GMU_CLK 8 19*324e0bfcSJonathan Marek #define GPU_CC_PLL1 9 20*324e0bfcSJonathan Marek #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 10 21*324e0bfcSJonathan Marek 22*324e0bfcSJonathan Marek /* GPU_CC Resets */ 23*324e0bfcSJonathan Marek #define GPUCC_GPU_CC_ACD_BCR 0 24*324e0bfcSJonathan Marek #define GPUCC_GPU_CC_CX_BCR 1 25*324e0bfcSJonathan Marek #define GPUCC_GPU_CC_GFX3D_AON_BCR 2 26*324e0bfcSJonathan Marek #define GPUCC_GPU_CC_GMU_BCR 3 27*324e0bfcSJonathan Marek #define GPUCC_GPU_CC_GX_BCR 4 28*324e0bfcSJonathan Marek #define GPUCC_GPU_CC_XO_BCR 5 29*324e0bfcSJonathan Marek 30*324e0bfcSJonathan Marek /* GPU_CC GDSCRs */ 31*324e0bfcSJonathan Marek #define GPU_CX_GDSC 0 32*324e0bfcSJonathan Marek #define GPU_GX_GDSC 1 33*324e0bfcSJonathan Marek 34*324e0bfcSJonathan Marek #endif 35