1*d4a599c5SImran Shaik /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*d4a599c5SImran Shaik /*
3*d4a599c5SImran Shaik  * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
4*d4a599c5SImran Shaik  */
5*d4a599c5SImran Shaik 
6*d4a599c5SImran Shaik #ifndef _DT_BINDINGS_CLK_QCOM_ECPRI_CC_QDU1000_H
7*d4a599c5SImran Shaik #define _DT_BINDINGS_CLK_QCOM_ECPRI_CC_QDU1000_H
8*d4a599c5SImran Shaik 
9*d4a599c5SImran Shaik /* ECPRI_CC clocks */
10*d4a599c5SImran Shaik #define ECPRI_CC_PLL0						0
11*d4a599c5SImran Shaik #define ECPRI_CC_PLL1						1
12*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_CG_CLK					2
13*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_CLK_SRC					3
14*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_DMA_CLK					4
15*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_DMA_CLK_SRC				5
16*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_DMA_NOC_CLK				6
17*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_FAST_CLK					7
18*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_FAST_CLK_SRC				8
19*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_FAST_DIV2_CLK				9
20*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_FAST_DIV2_CLK_SRC			10
21*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_FAST_DIV2_NOC_CLK			11
22*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_FR_CLK					12
23*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_ORAN_CLK_SRC				13
24*d4a599c5SImran Shaik #define ECPRI_CC_ECPRI_ORAN_DIV2_CLK				14
25*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_C2C0_HM_FF_CLK_SRC			15
26*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_C2C0_UDP_FIFO_CLK			16
27*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_C2C1_UDP_FIFO_CLK			17
28*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_C2C_0_HM_FF_0_CLK			18
29*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_C2C_0_HM_FF_1_CLK			19
30*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_C2C_HM_FF_0_DIV_CLK_SRC		20
31*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_C2C_HM_FF_1_DIV_CLK_SRC		21
32*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_C2C_HM_MACSEC_CLK			22
33*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_C2C_HM_MACSEC_CLK_SRC			23
34*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_DBG_C2C_HM_FF_0_CLK			24
35*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_DBG_C2C_HM_FF_0_DIV_CLK_SRC		25
36*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_DBG_C2C_HM_FF_1_CLK			26
37*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_DBG_C2C_HM_FF_1_DIV_CLK_SRC		27
38*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_DBG_C2C_HM_FF_CLK_SRC			28
39*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_DBG_C2C_UDP_FIFO_CLK			29
40*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH0_HM_FF_CLK_SRC			30
41*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH0_MACSEC_CLK_SRC			31
42*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH1_HM_FF_CLK_SRC			32
43*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH1_MACSEC_CLK_SRC			33
44*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH2_HM_FF_CLK_SRC			34
45*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH2_MACSEC_CLK_SRC			35
46*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_0_HM_FF_0_CLK			36
47*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_0_HM_FF_0_DIV_CLK_SRC		37
48*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_0_HM_FF_1_CLK			38
49*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_0_HM_FF_1_DIV_CLK_SRC		39
50*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_0_HM_FF_2_CLK			40
51*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_0_HM_FF_2_DIV_CLK_SRC		41
52*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_0_HM_FF_3_CLK			42
53*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_0_HM_FF_3_DIV_CLK_SRC		43
54*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_0_UDP_FIFO_CLK			44
55*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_1_HM_FF_0_CLK			45
56*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_1_HM_FF_0_DIV_CLK_SRC		46
57*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_1_HM_FF_1_CLK			47
58*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_1_HM_FF_1_DIV_CLK_SRC		48
59*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_1_HM_FF_2_CLK			49
60*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_1_HM_FF_2_DIV_CLK_SRC		50
61*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_1_HM_FF_3_CLK			51
62*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_1_HM_FF_3_DIV_CLK_SRC		52
63*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_1_UDP_FIFO_CLK			53
64*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_2_HM_FF_0_CLK			54
65*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_2_HM_FF_0_DIV_CLK_SRC		55
66*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_2_HM_FF_1_CLK			56
67*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_2_HM_FF_1_DIV_CLK_SRC		57
68*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_2_HM_FF_2_CLK			58
69*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_2_HM_FF_2_DIV_CLK_SRC		59
70*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_2_HM_FF_3_CLK			60
71*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_2_HM_FF_3_DIV_CLK_SRC		61
72*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_2_UDP_FIFO_CLK			62
73*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_MACSEC_0_CLK			63
74*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_MACSEC_1_CLK			64
75*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_FH_MACSEC_2_CLK			65
76*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_MAC_C2C_HM_REF_CLK			66
77*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_MAC_C2C_HM_REF_CLK_SRC		67
78*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_MAC_DBG_C2C_HM_REF_CLK		68
79*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_MAC_DBG_C2C_HM_REF_CLK_SRC		69
80*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_MAC_FH0_HM_REF_CLK			70
81*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_MAC_FH0_HM_REF_CLK_SRC		71
82*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_MAC_FH1_HM_REF_CLK			72
83*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_MAC_FH1_HM_REF_CLK_SRC		73
84*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_MAC_FH2_HM_REF_CLK			74
85*d4a599c5SImran Shaik #define ECPRI_CC_ETH_100G_MAC_FH2_HM_REF_CLK_SRC		75
86*d4a599c5SImran Shaik #define ECPRI_CC_ETH_DBG_NFAPI_AXI_CLK				76
87*d4a599c5SImran Shaik #define ECPRI_CC_ETH_DBG_NOC_AXI_CLK				77
88*d4a599c5SImran Shaik #define ECPRI_CC_ETH_PHY_0_OCK_SRAM_CLK				78
89*d4a599c5SImran Shaik #define ECPRI_CC_ETH_PHY_1_OCK_SRAM_CLK				79
90*d4a599c5SImran Shaik #define ECPRI_CC_ETH_PHY_2_OCK_SRAM_CLK				80
91*d4a599c5SImran Shaik #define ECPRI_CC_ETH_PHY_3_OCK_SRAM_CLK				81
92*d4a599c5SImran Shaik #define ECPRI_CC_ETH_PHY_4_OCK_SRAM_CLK				82
93*d4a599c5SImran Shaik #define ECPRI_CC_MSS_EMAC_CLK					83
94*d4a599c5SImran Shaik #define ECPRI_CC_MSS_EMAC_CLK_SRC				84
95*d4a599c5SImran Shaik #define ECPRI_CC_MSS_ORAN_CLK					85
96*d4a599c5SImran Shaik #define ECPRI_CC_PHY0_LANE0_RX_CLK				86
97*d4a599c5SImran Shaik #define ECPRI_CC_PHY0_LANE0_TX_CLK				87
98*d4a599c5SImran Shaik #define ECPRI_CC_PHY0_LANE1_RX_CLK				88
99*d4a599c5SImran Shaik #define ECPRI_CC_PHY0_LANE1_TX_CLK				89
100*d4a599c5SImran Shaik #define ECPRI_CC_PHY0_LANE2_RX_CLK				90
101*d4a599c5SImran Shaik #define ECPRI_CC_PHY0_LANE2_TX_CLK				91
102*d4a599c5SImran Shaik #define ECPRI_CC_PHY0_LANE3_RX_CLK				92
103*d4a599c5SImran Shaik #define ECPRI_CC_PHY0_LANE3_TX_CLK				93
104*d4a599c5SImran Shaik #define ECPRI_CC_PHY1_LANE0_RX_CLK				94
105*d4a599c5SImran Shaik #define ECPRI_CC_PHY1_LANE0_TX_CLK				95
106*d4a599c5SImran Shaik #define ECPRI_CC_PHY1_LANE1_RX_CLK				96
107*d4a599c5SImran Shaik #define ECPRI_CC_PHY1_LANE1_TX_CLK				97
108*d4a599c5SImran Shaik #define ECPRI_CC_PHY1_LANE2_RX_CLK				98
109*d4a599c5SImran Shaik #define ECPRI_CC_PHY1_LANE2_TX_CLK				99
110*d4a599c5SImran Shaik #define ECPRI_CC_PHY1_LANE3_RX_CLK				100
111*d4a599c5SImran Shaik #define ECPRI_CC_PHY1_LANE3_TX_CLK				101
112*d4a599c5SImran Shaik #define ECPRI_CC_PHY2_LANE0_RX_CLK				102
113*d4a599c5SImran Shaik #define ECPRI_CC_PHY2_LANE0_TX_CLK				103
114*d4a599c5SImran Shaik #define ECPRI_CC_PHY2_LANE1_RX_CLK				104
115*d4a599c5SImran Shaik #define ECPRI_CC_PHY2_LANE1_TX_CLK				105
116*d4a599c5SImran Shaik #define ECPRI_CC_PHY2_LANE2_RX_CLK				106
117*d4a599c5SImran Shaik #define ECPRI_CC_PHY2_LANE2_TX_CLK				107
118*d4a599c5SImran Shaik #define ECPRI_CC_PHY2_LANE3_RX_CLK				108
119*d4a599c5SImran Shaik #define ECPRI_CC_PHY2_LANE3_TX_CLK				109
120*d4a599c5SImran Shaik #define ECPRI_CC_PHY3_LANE0_RX_CLK				110
121*d4a599c5SImran Shaik #define ECPRI_CC_PHY3_LANE0_TX_CLK				111
122*d4a599c5SImran Shaik #define ECPRI_CC_PHY3_LANE1_RX_CLK				112
123*d4a599c5SImran Shaik #define ECPRI_CC_PHY3_LANE1_TX_CLK				113
124*d4a599c5SImran Shaik #define ECPRI_CC_PHY3_LANE2_RX_CLK				114
125*d4a599c5SImran Shaik #define ECPRI_CC_PHY3_LANE2_TX_CLK				115
126*d4a599c5SImran Shaik #define ECPRI_CC_PHY3_LANE3_RX_CLK				116
127*d4a599c5SImran Shaik #define ECPRI_CC_PHY3_LANE3_TX_CLK				117
128*d4a599c5SImran Shaik #define ECPRI_CC_PHY4_LANE0_RX_CLK				118
129*d4a599c5SImran Shaik #define ECPRI_CC_PHY4_LANE0_TX_CLK				119
130*d4a599c5SImran Shaik #define ECPRI_CC_PHY4_LANE1_RX_CLK				120
131*d4a599c5SImran Shaik #define ECPRI_CC_PHY4_LANE1_TX_CLK				121
132*d4a599c5SImran Shaik #define ECPRI_CC_PHY4_LANE2_RX_CLK				122
133*d4a599c5SImran Shaik #define ECPRI_CC_PHY4_LANE2_TX_CLK				123
134*d4a599c5SImran Shaik #define ECPRI_CC_PHY4_LANE3_RX_CLK				124
135*d4a599c5SImran Shaik #define ECPRI_CC_PHY4_LANE3_TX_CLK				125
136*d4a599c5SImran Shaik 
137*d4a599c5SImran Shaik /* ECPRI_CC resets */
138*d4a599c5SImran Shaik #define ECPRI_CC_CLK_CTL_TOP_ECPRI_CC_ECPRI_SS_BCR		0
139*d4a599c5SImran Shaik #define ECPRI_CC_CLK_CTL_TOP_ECPRI_CC_ETH_C2C_BCR		1
140*d4a599c5SImran Shaik #define ECPRI_CC_CLK_CTL_TOP_ECPRI_CC_ETH_FH0_BCR		2
141*d4a599c5SImran Shaik #define ECPRI_CC_CLK_CTL_TOP_ECPRI_CC_ETH_FH1_BCR		3
142*d4a599c5SImran Shaik #define ECPRI_CC_CLK_CTL_TOP_ECPRI_CC_ETH_FH2_BCR		4
143*d4a599c5SImran Shaik #define ECPRI_CC_CLK_CTL_TOP_ECPRI_CC_ETH_WRAPPER_TOP_BCR	5
144*d4a599c5SImran Shaik #define ECPRI_CC_CLK_CTL_TOP_ECPRI_CC_MODEM_BCR			6
145*d4a599c5SImran Shaik #define ECPRI_CC_CLK_CTL_TOP_ECPRI_CC_NOC_BCR			7
146*d4a599c5SImran Shaik 
147*d4a599c5SImran Shaik #endif
148