1*a0aa7fa5SNeil Armstrong /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*a0aa7fa5SNeil Armstrong /*
3*a0aa7fa5SNeil Armstrong  * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved
4*a0aa7fa5SNeil Armstrong  * Copyright (c) 2023, Linaro Limited
5*a0aa7fa5SNeil Armstrong  */
6*a0aa7fa5SNeil Armstrong 
7*a0aa7fa5SNeil Armstrong #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8650_H
8*a0aa7fa5SNeil Armstrong #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8650_H
9*a0aa7fa5SNeil Armstrong 
10*a0aa7fa5SNeil Armstrong /* GPU_CC clocks */
11*a0aa7fa5SNeil Armstrong #define GPU_CC_AHB_CLK				0
12*a0aa7fa5SNeil Armstrong #define GPU_CC_CRC_AHB_CLK			1
13*a0aa7fa5SNeil Armstrong #define GPU_CC_CX_ACCU_SHIFT_CLK		2
14*a0aa7fa5SNeil Armstrong #define GPU_CC_CX_FF_CLK			3
15*a0aa7fa5SNeil Armstrong #define GPU_CC_CX_GMU_CLK			4
16*a0aa7fa5SNeil Armstrong #define GPU_CC_CXO_AON_CLK			5
17*a0aa7fa5SNeil Armstrong #define GPU_CC_CXO_CLK				6
18*a0aa7fa5SNeil Armstrong #define GPU_CC_DEMET_CLK			7
19*a0aa7fa5SNeil Armstrong #define GPU_CC_DPM_CLK				8
20*a0aa7fa5SNeil Armstrong #define GPU_CC_FF_CLK_SRC			9
21*a0aa7fa5SNeil Armstrong #define GPU_CC_FREQ_MEASURE_CLK			10
22*a0aa7fa5SNeil Armstrong #define GPU_CC_GMU_CLK_SRC			11
23*a0aa7fa5SNeil Armstrong #define GPU_CC_GX_ACCU_SHIFT_CLK		12
24*a0aa7fa5SNeil Armstrong #define GPU_CC_GX_FF_CLK			13
25*a0aa7fa5SNeil Armstrong #define GPU_CC_GX_GFX3D_CLK			14
26*a0aa7fa5SNeil Armstrong #define GPU_CC_GX_GFX3D_RDVM_CLK		15
27*a0aa7fa5SNeil Armstrong #define GPU_CC_GX_GMU_CLK			16
28*a0aa7fa5SNeil Armstrong #define GPU_CC_GX_VSENSE_CLK			17
29*a0aa7fa5SNeil Armstrong #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK		18
30*a0aa7fa5SNeil Armstrong #define GPU_CC_HUB_AON_CLK			19
31*a0aa7fa5SNeil Armstrong #define GPU_CC_HUB_CLK_SRC			20
32*a0aa7fa5SNeil Armstrong #define GPU_CC_HUB_CX_INT_CLK			21
33*a0aa7fa5SNeil Armstrong #define GPU_CC_HUB_DIV_CLK_SRC			22
34*a0aa7fa5SNeil Armstrong #define GPU_CC_MEMNOC_GFX_CLK			23
35*a0aa7fa5SNeil Armstrong #define GPU_CC_PLL0				24
36*a0aa7fa5SNeil Armstrong #define GPU_CC_PLL1				25
37*a0aa7fa5SNeil Armstrong #define GPU_CC_SLEEP_CLK			26
38*a0aa7fa5SNeil Armstrong 
39*a0aa7fa5SNeil Armstrong /* GDSCs */
40*a0aa7fa5SNeil Armstrong #define GPU_GX_GDSC				0
41*a0aa7fa5SNeil Armstrong #define GPU_CX_GDSC				1
42*a0aa7fa5SNeil Armstrong 
43*a0aa7fa5SNeil Armstrong #endif
44