1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 263f3171dSMaxime COQUELIN /* 363f3171dSMaxime COQUELIN * This header provides constants clk index STMicroelectronics 463f3171dSMaxime COQUELIN * STiH418 SoC. 563f3171dSMaxime COQUELIN */ 663f3171dSMaxime COQUELIN #ifndef _DT_BINDINGS_CLK_STIH418 763f3171dSMaxime COQUELIN #define _DT_BINDINGS_CLK_STIH418 863f3171dSMaxime COQUELIN 963f3171dSMaxime COQUELIN #include "stih410-clks.h" 1063f3171dSMaxime COQUELIN 1163f3171dSMaxime COQUELIN /* STiH418 introduces new clock outputs compared to STiH410 */ 1263f3171dSMaxime COQUELIN 1363f3171dSMaxime COQUELIN /* CLOCKGEN C0 */ 1463f3171dSMaxime COQUELIN #define CLK_PROC_BDISP_0 14 1563f3171dSMaxime COQUELIN #define CLK_PROC_BDISP_1 15 1663f3171dSMaxime COQUELIN #define CLK_TX_ICN_1 23 1763f3171dSMaxime COQUELIN #define CLK_ETH_PHYREF 27 1863f3171dSMaxime COQUELIN #define CLK_PP_HEVC 35 1963f3171dSMaxime COQUELIN #define CLK_CLUST_HEVC 36 2063f3171dSMaxime COQUELIN #define CLK_HWPE_HEVC 37 2163f3171dSMaxime COQUELIN #define CLK_FC_HEVC 38 2263f3171dSMaxime COQUELIN #define CLK_PROC_MIXER 39 2363f3171dSMaxime COQUELIN #define CLK_PROC_SC 40 2463f3171dSMaxime COQUELIN #define CLK_AVSP_HEVC 41 2563f3171dSMaxime COQUELIN 2663f3171dSMaxime COQUELIN /* CLOCKGEN D2 */ 2763f3171dSMaxime COQUELIN #undef CLK_PIX_PIP 2863f3171dSMaxime COQUELIN #undef CLK_PIX_GDP1 2963f3171dSMaxime COQUELIN #undef CLK_PIX_GDP2 3063f3171dSMaxime COQUELIN #undef CLK_PIX_GDP3 3163f3171dSMaxime COQUELIN #undef CLK_PIX_GDP4 3263f3171dSMaxime COQUELIN 3363f3171dSMaxime COQUELIN #define CLK_TMDS_HDMI_DIV2 5 3463f3171dSMaxime COQUELIN #define CLK_VP9 47 3563f3171dSMaxime COQUELIN #endif 36