1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_DMA_MAPPING_H 3 #define _LINUX_DMA_MAPPING_H 4 5 #include <linux/sizes.h> 6 #include <linux/string.h> 7 #include <linux/device.h> 8 #include <linux/err.h> 9 #include <linux/dma-direction.h> 10 #include <linux/scatterlist.h> 11 #include <linux/bug.h> 12 #include <linux/mem_encrypt.h> 13 14 /** 15 * List of possible attributes associated with a DMA mapping. The semantics 16 * of each attribute should be defined in Documentation/core-api/dma-attributes.rst. 17 */ 18 19 /* 20 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping 21 * may be weakly ordered, that is that reads and writes may pass each other. 22 */ 23 #define DMA_ATTR_WEAK_ORDERING (1UL << 1) 24 /* 25 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be 26 * buffered to improve performance. 27 */ 28 #define DMA_ATTR_WRITE_COMBINE (1UL << 2) 29 /* 30 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel 31 * virtual mapping for the allocated buffer. 32 */ 33 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) 34 /* 35 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of 36 * the CPU cache for the given buffer assuming that it has been already 37 * transferred to 'device' domain. 38 */ 39 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) 40 /* 41 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer 42 * in physical memory. 43 */ 44 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) 45 /* 46 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem 47 * that it's probably not worth the time to try to allocate memory to in a way 48 * that gives better TLB efficiency. 49 */ 50 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) 51 /* 52 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress 53 * allocation failure reports (similarly to __GFP_NOWARN). 54 */ 55 #define DMA_ATTR_NO_WARN (1UL << 8) 56 57 /* 58 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully 59 * accessible at an elevated privilege level (and ideally inaccessible or 60 * at least read-only at lesser-privileged levels). 61 */ 62 #define DMA_ATTR_PRIVILEGED (1UL << 9) 63 64 /* 65 * A dma_addr_t can hold any valid DMA or bus address for the platform. It can 66 * be given to a device to use as a DMA source or target. It is specific to a 67 * given device and there may be a translation between the CPU physical address 68 * space and the bus address space. 69 * 70 * DMA_MAPPING_ERROR is the magic error code if a mapping failed. It should not 71 * be used directly in drivers, but checked for using dma_mapping_error() 72 * instead. 73 */ 74 #define DMA_MAPPING_ERROR (~(dma_addr_t)0) 75 76 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) 77 78 #ifdef CONFIG_DMA_API_DEBUG 79 void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr); 80 void debug_dma_map_single(struct device *dev, const void *addr, 81 unsigned long len); 82 #else 83 static inline void debug_dma_mapping_error(struct device *dev, 84 dma_addr_t dma_addr) 85 { 86 } 87 static inline void debug_dma_map_single(struct device *dev, const void *addr, 88 unsigned long len) 89 { 90 } 91 #endif /* CONFIG_DMA_API_DEBUG */ 92 93 #ifdef CONFIG_HAS_DMA 94 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 95 { 96 debug_dma_mapping_error(dev, dma_addr); 97 98 if (unlikely(dma_addr == DMA_MAPPING_ERROR)) 99 return -ENOMEM; 100 return 0; 101 } 102 103 dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page, 104 size_t offset, size_t size, enum dma_data_direction dir, 105 unsigned long attrs); 106 void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size, 107 enum dma_data_direction dir, unsigned long attrs); 108 unsigned int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, 109 int nents, enum dma_data_direction dir, unsigned long attrs); 110 void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, 111 int nents, enum dma_data_direction dir, 112 unsigned long attrs); 113 int dma_map_sgtable(struct device *dev, struct sg_table *sgt, 114 enum dma_data_direction dir, unsigned long attrs); 115 dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr, 116 size_t size, enum dma_data_direction dir, unsigned long attrs); 117 void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size, 118 enum dma_data_direction dir, unsigned long attrs); 119 void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size, 120 enum dma_data_direction dir); 121 void dma_sync_single_for_device(struct device *dev, dma_addr_t addr, 122 size_t size, enum dma_data_direction dir); 123 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, 124 int nelems, enum dma_data_direction dir); 125 void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, 126 int nelems, enum dma_data_direction dir); 127 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 128 gfp_t flag, unsigned long attrs); 129 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 130 dma_addr_t dma_handle, unsigned long attrs); 131 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 132 gfp_t gfp, unsigned long attrs); 133 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, 134 dma_addr_t dma_handle); 135 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, 136 void *cpu_addr, dma_addr_t dma_addr, size_t size, 137 unsigned long attrs); 138 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 139 void *cpu_addr, dma_addr_t dma_addr, size_t size, 140 unsigned long attrs); 141 bool dma_can_mmap(struct device *dev); 142 bool dma_pci_p2pdma_supported(struct device *dev); 143 int dma_set_mask(struct device *dev, u64 mask); 144 int dma_set_coherent_mask(struct device *dev, u64 mask); 145 u64 dma_get_required_mask(struct device *dev); 146 size_t dma_max_mapping_size(struct device *dev); 147 size_t dma_opt_mapping_size(struct device *dev); 148 bool dma_need_sync(struct device *dev, dma_addr_t dma_addr); 149 unsigned long dma_get_merge_boundary(struct device *dev); 150 struct sg_table *dma_alloc_noncontiguous(struct device *dev, size_t size, 151 enum dma_data_direction dir, gfp_t gfp, unsigned long attrs); 152 void dma_free_noncontiguous(struct device *dev, size_t size, 153 struct sg_table *sgt, enum dma_data_direction dir); 154 void *dma_vmap_noncontiguous(struct device *dev, size_t size, 155 struct sg_table *sgt); 156 void dma_vunmap_noncontiguous(struct device *dev, void *vaddr); 157 int dma_mmap_noncontiguous(struct device *dev, struct vm_area_struct *vma, 158 size_t size, struct sg_table *sgt); 159 #else /* CONFIG_HAS_DMA */ 160 static inline dma_addr_t dma_map_page_attrs(struct device *dev, 161 struct page *page, size_t offset, size_t size, 162 enum dma_data_direction dir, unsigned long attrs) 163 { 164 return DMA_MAPPING_ERROR; 165 } 166 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, 167 size_t size, enum dma_data_direction dir, unsigned long attrs) 168 { 169 } 170 static inline unsigned int dma_map_sg_attrs(struct device *dev, 171 struct scatterlist *sg, int nents, enum dma_data_direction dir, 172 unsigned long attrs) 173 { 174 return 0; 175 } 176 static inline void dma_unmap_sg_attrs(struct device *dev, 177 struct scatterlist *sg, int nents, enum dma_data_direction dir, 178 unsigned long attrs) 179 { 180 } 181 static inline int dma_map_sgtable(struct device *dev, struct sg_table *sgt, 182 enum dma_data_direction dir, unsigned long attrs) 183 { 184 return -EOPNOTSUPP; 185 } 186 static inline dma_addr_t dma_map_resource(struct device *dev, 187 phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, 188 unsigned long attrs) 189 { 190 return DMA_MAPPING_ERROR; 191 } 192 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, 193 size_t size, enum dma_data_direction dir, unsigned long attrs) 194 { 195 } 196 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, 197 size_t size, enum dma_data_direction dir) 198 { 199 } 200 static inline void dma_sync_single_for_device(struct device *dev, 201 dma_addr_t addr, size_t size, enum dma_data_direction dir) 202 { 203 } 204 static inline void dma_sync_sg_for_cpu(struct device *dev, 205 struct scatterlist *sg, int nelems, enum dma_data_direction dir) 206 { 207 } 208 static inline void dma_sync_sg_for_device(struct device *dev, 209 struct scatterlist *sg, int nelems, enum dma_data_direction dir) 210 { 211 } 212 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 213 { 214 return -ENOMEM; 215 } 216 static inline void *dma_alloc_attrs(struct device *dev, size_t size, 217 dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs) 218 { 219 return NULL; 220 } 221 static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 222 dma_addr_t dma_handle, unsigned long attrs) 223 { 224 } 225 static inline void *dmam_alloc_attrs(struct device *dev, size_t size, 226 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) 227 { 228 return NULL; 229 } 230 static inline void dmam_free_coherent(struct device *dev, size_t size, 231 void *vaddr, dma_addr_t dma_handle) 232 { 233 } 234 static inline int dma_get_sgtable_attrs(struct device *dev, 235 struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, 236 size_t size, unsigned long attrs) 237 { 238 return -ENXIO; 239 } 240 static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 241 void *cpu_addr, dma_addr_t dma_addr, size_t size, 242 unsigned long attrs) 243 { 244 return -ENXIO; 245 } 246 static inline bool dma_can_mmap(struct device *dev) 247 { 248 return false; 249 } 250 static inline bool dma_pci_p2pdma_supported(struct device *dev) 251 { 252 return false; 253 } 254 static inline int dma_set_mask(struct device *dev, u64 mask) 255 { 256 return -EIO; 257 } 258 static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 259 { 260 return -EIO; 261 } 262 static inline u64 dma_get_required_mask(struct device *dev) 263 { 264 return 0; 265 } 266 static inline size_t dma_max_mapping_size(struct device *dev) 267 { 268 return 0; 269 } 270 static inline size_t dma_opt_mapping_size(struct device *dev) 271 { 272 return 0; 273 } 274 static inline bool dma_need_sync(struct device *dev, dma_addr_t dma_addr) 275 { 276 return false; 277 } 278 static inline unsigned long dma_get_merge_boundary(struct device *dev) 279 { 280 return 0; 281 } 282 static inline struct sg_table *dma_alloc_noncontiguous(struct device *dev, 283 size_t size, enum dma_data_direction dir, gfp_t gfp, 284 unsigned long attrs) 285 { 286 return NULL; 287 } 288 static inline void dma_free_noncontiguous(struct device *dev, size_t size, 289 struct sg_table *sgt, enum dma_data_direction dir) 290 { 291 } 292 static inline void *dma_vmap_noncontiguous(struct device *dev, size_t size, 293 struct sg_table *sgt) 294 { 295 return NULL; 296 } 297 static inline void dma_vunmap_noncontiguous(struct device *dev, void *vaddr) 298 { 299 } 300 static inline int dma_mmap_noncontiguous(struct device *dev, 301 struct vm_area_struct *vma, size_t size, struct sg_table *sgt) 302 { 303 return -EINVAL; 304 } 305 #endif /* CONFIG_HAS_DMA */ 306 307 struct page *dma_alloc_pages(struct device *dev, size_t size, 308 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); 309 void dma_free_pages(struct device *dev, size_t size, struct page *page, 310 dma_addr_t dma_handle, enum dma_data_direction dir); 311 int dma_mmap_pages(struct device *dev, struct vm_area_struct *vma, 312 size_t size, struct page *page); 313 314 static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, 315 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp) 316 { 317 struct page *page = dma_alloc_pages(dev, size, dma_handle, dir, gfp); 318 return page ? page_address(page) : NULL; 319 } 320 321 static inline void dma_free_noncoherent(struct device *dev, size_t size, 322 void *vaddr, dma_addr_t dma_handle, enum dma_data_direction dir) 323 { 324 dma_free_pages(dev, size, virt_to_page(vaddr), dma_handle, dir); 325 } 326 327 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, 328 size_t size, enum dma_data_direction dir, unsigned long attrs) 329 { 330 /* DMA must never operate on areas that might be remapped. */ 331 if (dev_WARN_ONCE(dev, is_vmalloc_addr(ptr), 332 "rejecting DMA map of vmalloc memory\n")) 333 return DMA_MAPPING_ERROR; 334 debug_dma_map_single(dev, ptr, size); 335 return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr), 336 size, dir, attrs); 337 } 338 339 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, 340 size_t size, enum dma_data_direction dir, unsigned long attrs) 341 { 342 return dma_unmap_page_attrs(dev, addr, size, dir, attrs); 343 } 344 345 static inline void dma_sync_single_range_for_cpu(struct device *dev, 346 dma_addr_t addr, unsigned long offset, size_t size, 347 enum dma_data_direction dir) 348 { 349 return dma_sync_single_for_cpu(dev, addr + offset, size, dir); 350 } 351 352 static inline void dma_sync_single_range_for_device(struct device *dev, 353 dma_addr_t addr, unsigned long offset, size_t size, 354 enum dma_data_direction dir) 355 { 356 return dma_sync_single_for_device(dev, addr + offset, size, dir); 357 } 358 359 /** 360 * dma_unmap_sgtable - Unmap the given buffer for DMA 361 * @dev: The device for which to perform the DMA operation 362 * @sgt: The sg_table object describing the buffer 363 * @dir: DMA direction 364 * @attrs: Optional DMA attributes for the unmap operation 365 * 366 * Unmaps a buffer described by a scatterlist stored in the given sg_table 367 * object for the @dir DMA operation by the @dev device. After this function 368 * the ownership of the buffer is transferred back to the CPU domain. 369 */ 370 static inline void dma_unmap_sgtable(struct device *dev, struct sg_table *sgt, 371 enum dma_data_direction dir, unsigned long attrs) 372 { 373 dma_unmap_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs); 374 } 375 376 /** 377 * dma_sync_sgtable_for_cpu - Synchronize the given buffer for CPU access 378 * @dev: The device for which to perform the DMA operation 379 * @sgt: The sg_table object describing the buffer 380 * @dir: DMA direction 381 * 382 * Performs the needed cache synchronization and moves the ownership of the 383 * buffer back to the CPU domain, so it is safe to perform any access to it 384 * by the CPU. Before doing any further DMA operations, one has to transfer 385 * the ownership of the buffer back to the DMA domain by calling the 386 * dma_sync_sgtable_for_device(). 387 */ 388 static inline void dma_sync_sgtable_for_cpu(struct device *dev, 389 struct sg_table *sgt, enum dma_data_direction dir) 390 { 391 dma_sync_sg_for_cpu(dev, sgt->sgl, sgt->orig_nents, dir); 392 } 393 394 /** 395 * dma_sync_sgtable_for_device - Synchronize the given buffer for DMA 396 * @dev: The device for which to perform the DMA operation 397 * @sgt: The sg_table object describing the buffer 398 * @dir: DMA direction 399 * 400 * Performs the needed cache synchronization and moves the ownership of the 401 * buffer back to the DMA domain, so it is safe to perform the DMA operation. 402 * Once finished, one has to call dma_sync_sgtable_for_cpu() or 403 * dma_unmap_sgtable(). 404 */ 405 static inline void dma_sync_sgtable_for_device(struct device *dev, 406 struct sg_table *sgt, enum dma_data_direction dir) 407 { 408 dma_sync_sg_for_device(dev, sgt->sgl, sgt->orig_nents, dir); 409 } 410 411 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) 412 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) 413 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) 414 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) 415 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) 416 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) 417 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) 418 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) 419 420 static inline void *dma_alloc_coherent(struct device *dev, size_t size, 421 dma_addr_t *dma_handle, gfp_t gfp) 422 { 423 return dma_alloc_attrs(dev, size, dma_handle, gfp, 424 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 425 } 426 427 static inline void dma_free_coherent(struct device *dev, size_t size, 428 void *cpu_addr, dma_addr_t dma_handle) 429 { 430 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); 431 } 432 433 434 static inline u64 dma_get_mask(struct device *dev) 435 { 436 if (dev->dma_mask && *dev->dma_mask) 437 return *dev->dma_mask; 438 return DMA_BIT_MASK(32); 439 } 440 441 /* 442 * Set both the DMA mask and the coherent DMA mask to the same thing. 443 * Note that we don't check the return value from dma_set_coherent_mask() 444 * as the DMA API guarantees that the coherent DMA mask can be set to 445 * the same or smaller than the streaming DMA mask. 446 */ 447 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) 448 { 449 int rc = dma_set_mask(dev, mask); 450 if (rc == 0) 451 dma_set_coherent_mask(dev, mask); 452 return rc; 453 } 454 455 /* 456 * Similar to the above, except it deals with the case where the device 457 * does not have dev->dma_mask appropriately setup. 458 */ 459 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) 460 { 461 dev->dma_mask = &dev->coherent_dma_mask; 462 return dma_set_mask_and_coherent(dev, mask); 463 } 464 465 /** 466 * dma_addressing_limited - return if the device is addressing limited 467 * @dev: device to check 468 * 469 * Return %true if the devices DMA mask is too small to address all memory in 470 * the system, else %false. Lack of addressing bits is the prime reason for 471 * bounce buffering, but might not be the only one. 472 */ 473 static inline bool dma_addressing_limited(struct device *dev) 474 { 475 return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) < 476 dma_get_required_mask(dev); 477 } 478 479 static inline unsigned int dma_get_max_seg_size(struct device *dev) 480 { 481 if (dev->dma_parms && dev->dma_parms->max_segment_size) 482 return dev->dma_parms->max_segment_size; 483 return SZ_64K; 484 } 485 486 static inline int dma_set_max_seg_size(struct device *dev, unsigned int size) 487 { 488 if (dev->dma_parms) { 489 dev->dma_parms->max_segment_size = size; 490 return 0; 491 } 492 return -EIO; 493 } 494 495 static inline unsigned long dma_get_seg_boundary(struct device *dev) 496 { 497 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) 498 return dev->dma_parms->segment_boundary_mask; 499 return ULONG_MAX; 500 } 501 502 /** 503 * dma_get_seg_boundary_nr_pages - return the segment boundary in "page" units 504 * @dev: device to guery the boundary for 505 * @page_shift: ilog() of the IOMMU page size 506 * 507 * Return the segment boundary in IOMMU page units (which may be different from 508 * the CPU page size) for the passed in device. 509 * 510 * If @dev is NULL a boundary of U32_MAX is assumed, this case is just for 511 * non-DMA API callers. 512 */ 513 static inline unsigned long dma_get_seg_boundary_nr_pages(struct device *dev, 514 unsigned int page_shift) 515 { 516 if (!dev) 517 return (U32_MAX >> page_shift) + 1; 518 return (dma_get_seg_boundary(dev) >> page_shift) + 1; 519 } 520 521 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) 522 { 523 if (dev->dma_parms) { 524 dev->dma_parms->segment_boundary_mask = mask; 525 return 0; 526 } 527 return -EIO; 528 } 529 530 static inline unsigned int dma_get_min_align_mask(struct device *dev) 531 { 532 if (dev->dma_parms) 533 return dev->dma_parms->min_align_mask; 534 return 0; 535 } 536 537 static inline int dma_set_min_align_mask(struct device *dev, 538 unsigned int min_align_mask) 539 { 540 if (WARN_ON_ONCE(!dev->dma_parms)) 541 return -EIO; 542 dev->dma_parms->min_align_mask = min_align_mask; 543 return 0; 544 } 545 546 static inline int dma_get_cache_alignment(void) 547 { 548 #ifdef ARCH_DMA_MINALIGN 549 return ARCH_DMA_MINALIGN; 550 #endif 551 return 1; 552 } 553 554 static inline void *dmam_alloc_coherent(struct device *dev, size_t size, 555 dma_addr_t *dma_handle, gfp_t gfp) 556 { 557 return dmam_alloc_attrs(dev, size, dma_handle, gfp, 558 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 559 } 560 561 static inline void *dma_alloc_wc(struct device *dev, size_t size, 562 dma_addr_t *dma_addr, gfp_t gfp) 563 { 564 unsigned long attrs = DMA_ATTR_WRITE_COMBINE; 565 566 if (gfp & __GFP_NOWARN) 567 attrs |= DMA_ATTR_NO_WARN; 568 569 return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); 570 } 571 572 static inline void dma_free_wc(struct device *dev, size_t size, 573 void *cpu_addr, dma_addr_t dma_addr) 574 { 575 return dma_free_attrs(dev, size, cpu_addr, dma_addr, 576 DMA_ATTR_WRITE_COMBINE); 577 } 578 579 static inline int dma_mmap_wc(struct device *dev, 580 struct vm_area_struct *vma, 581 void *cpu_addr, dma_addr_t dma_addr, 582 size_t size) 583 { 584 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, 585 DMA_ATTR_WRITE_COMBINE); 586 } 587 588 #ifdef CONFIG_NEED_DMA_MAP_STATE 589 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME 590 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME 591 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 592 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 593 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 594 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 595 #else 596 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 597 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 598 #define dma_unmap_addr(PTR, ADDR_NAME) (0) 599 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 600 #define dma_unmap_len(PTR, LEN_NAME) (0) 601 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 602 #endif 603 604 #endif /* _LINUX_DMA_MAPPING_H */ 605