1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_PGTABLE_H 3 #define _LINUX_PGTABLE_H 4 5 #include <linux/pfn.h> 6 #include <asm/pgtable.h> 7 8 #ifndef __ASSEMBLY__ 9 #ifdef CONFIG_MMU 10 11 #include <linux/mm_types.h> 12 #include <linux/bug.h> 13 #include <linux/errno.h> 14 #include <asm-generic/pgtable_uffd.h> 15 #include <linux/page_table_check.h> 16 17 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \ 18 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS 19 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED 20 #endif 21 22 /* 23 * On almost all architectures and configurations, 0 can be used as the 24 * upper ceiling to free_pgtables(): on many architectures it has the same 25 * effect as using TASK_SIZE. However, there is one configuration which 26 * must impose a more careful limit, to avoid freeing kernel pgtables. 27 */ 28 #ifndef USER_PGTABLES_CEILING 29 #define USER_PGTABLES_CEILING 0UL 30 #endif 31 32 /* 33 * This defines the first usable user address. Platforms 34 * can override its value with custom FIRST_USER_ADDRESS 35 * defined in their respective <asm/pgtable.h>. 36 */ 37 #ifndef FIRST_USER_ADDRESS 38 #define FIRST_USER_ADDRESS 0UL 39 #endif 40 41 /* 42 * This defines the generic helper for accessing PMD page 43 * table page. Although platforms can still override this 44 * via their respective <asm/pgtable.h>. 45 */ 46 #ifndef pmd_pgtable 47 #define pmd_pgtable(pmd) pmd_page(pmd) 48 #endif 49 50 /* 51 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD] 52 * 53 * The pXx_index() functions return the index of the entry in the page 54 * table page which would control the given virtual address 55 * 56 * As these functions may be used by the same code for different levels of 57 * the page table folding, they are always available, regardless of 58 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0 59 * because in such cases PTRS_PER_PxD equals 1. 60 */ 61 62 static inline unsigned long pte_index(unsigned long address) 63 { 64 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 65 } 66 #define pte_index pte_index 67 68 #ifndef pmd_index 69 static inline unsigned long pmd_index(unsigned long address) 70 { 71 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 72 } 73 #define pmd_index pmd_index 74 #endif 75 76 #ifndef pud_index 77 static inline unsigned long pud_index(unsigned long address) 78 { 79 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 80 } 81 #define pud_index pud_index 82 #endif 83 84 #ifndef pgd_index 85 /* Must be a compile-time constant, so implement it as a macro */ 86 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 87 #endif 88 89 #ifndef pte_offset_kernel 90 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 91 { 92 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 93 } 94 #define pte_offset_kernel pte_offset_kernel 95 #endif 96 97 #if defined(CONFIG_HIGHPTE) 98 #define pte_offset_map(dir, address) \ 99 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \ 100 pte_index((address))) 101 #define pte_unmap(pte) kunmap_atomic((pte)) 102 #else 103 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address)) 104 #define pte_unmap(pte) ((void)(pte)) /* NOP */ 105 #endif 106 107 /* Find an entry in the second-level page table.. */ 108 #ifndef pmd_offset 109 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 110 { 111 return pud_pgtable(*pud) + pmd_index(address); 112 } 113 #define pmd_offset pmd_offset 114 #endif 115 116 #ifndef pud_offset 117 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) 118 { 119 return p4d_pgtable(*p4d) + pud_index(address); 120 } 121 #define pud_offset pud_offset 122 #endif 123 124 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address) 125 { 126 return (pgd + pgd_index(address)); 127 }; 128 129 /* 130 * a shortcut to get a pgd_t in a given mm 131 */ 132 #ifndef pgd_offset 133 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address)) 134 #endif 135 136 /* 137 * a shortcut which implies the use of the kernel's pgd, instead 138 * of a process's 139 */ 140 #ifndef pgd_offset_k 141 #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 142 #endif 143 144 /* 145 * In many cases it is known that a virtual address is mapped at PMD or PTE 146 * level, so instead of traversing all the page table levels, we can get a 147 * pointer to the PMD entry in user or kernel page table or translate a virtual 148 * address to the pointer in the PTE in the kernel page tables with simple 149 * helpers. 150 */ 151 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va) 152 { 153 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va); 154 } 155 156 static inline pmd_t *pmd_off_k(unsigned long va) 157 { 158 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va); 159 } 160 161 static inline pte_t *virt_to_kpte(unsigned long vaddr) 162 { 163 pmd_t *pmd = pmd_off_k(vaddr); 164 165 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr); 166 } 167 168 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 169 extern int ptep_set_access_flags(struct vm_area_struct *vma, 170 unsigned long address, pte_t *ptep, 171 pte_t entry, int dirty); 172 #endif 173 174 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 175 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 176 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 177 unsigned long address, pmd_t *pmdp, 178 pmd_t entry, int dirty); 179 extern int pudp_set_access_flags(struct vm_area_struct *vma, 180 unsigned long address, pud_t *pudp, 181 pud_t entry, int dirty); 182 #else 183 static inline int pmdp_set_access_flags(struct vm_area_struct *vma, 184 unsigned long address, pmd_t *pmdp, 185 pmd_t entry, int dirty) 186 { 187 BUILD_BUG(); 188 return 0; 189 } 190 static inline int pudp_set_access_flags(struct vm_area_struct *vma, 191 unsigned long address, pud_t *pudp, 192 pud_t entry, int dirty) 193 { 194 BUILD_BUG(); 195 return 0; 196 } 197 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 198 #endif 199 200 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 201 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 202 unsigned long address, 203 pte_t *ptep) 204 { 205 pte_t pte = *ptep; 206 int r = 1; 207 if (!pte_young(pte)) 208 r = 0; 209 else 210 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte)); 211 return r; 212 } 213 #endif 214 215 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 216 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG) 217 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 218 unsigned long address, 219 pmd_t *pmdp) 220 { 221 pmd_t pmd = *pmdp; 222 int r = 1; 223 if (!pmd_young(pmd)) 224 r = 0; 225 else 226 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd)); 227 return r; 228 } 229 #else 230 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 231 unsigned long address, 232 pmd_t *pmdp) 233 { 234 BUILD_BUG(); 235 return 0; 236 } 237 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */ 238 #endif 239 240 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 241 int ptep_clear_flush_young(struct vm_area_struct *vma, 242 unsigned long address, pte_t *ptep); 243 #endif 244 245 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 246 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 247 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 248 unsigned long address, pmd_t *pmdp); 249 #else 250 /* 251 * Despite relevant to THP only, this API is called from generic rmap code 252 * under PageTransHuge(), hence needs a dummy implementation for !THP 253 */ 254 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma, 255 unsigned long address, pmd_t *pmdp) 256 { 257 BUILD_BUG(); 258 return 0; 259 } 260 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 261 #endif 262 263 #ifndef arch_has_hw_pte_young 264 /* 265 * Return whether the accessed bit is supported on the local CPU. 266 * 267 * This stub assumes accessing through an old PTE triggers a page fault. 268 * Architectures that automatically set the access bit should overwrite it. 269 */ 270 static inline bool arch_has_hw_pte_young(void) 271 { 272 return false; 273 } 274 #endif 275 276 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR 277 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 278 unsigned long address, 279 pte_t *ptep) 280 { 281 pte_t pte = *ptep; 282 pte_clear(mm, address, ptep); 283 page_table_check_pte_clear(mm, address, pte); 284 return pte; 285 } 286 #endif 287 288 static inline void ptep_clear(struct mm_struct *mm, unsigned long addr, 289 pte_t *ptep) 290 { 291 ptep_get_and_clear(mm, addr, ptep); 292 } 293 294 #ifndef __HAVE_ARCH_PTEP_GET 295 static inline pte_t ptep_get(pte_t *ptep) 296 { 297 return READ_ONCE(*ptep); 298 } 299 #endif 300 301 #ifdef CONFIG_GUP_GET_PTE_LOW_HIGH 302 /* 303 * WARNING: only to be used in the get_user_pages_fast() implementation. 304 * 305 * With get_user_pages_fast(), we walk down the pagetables without taking any 306 * locks. For this we would like to load the pointers atomically, but sometimes 307 * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What 308 * we do have is the guarantee that a PTE will only either go from not present 309 * to present, or present to not present or both -- it will not switch to a 310 * completely different present page without a TLB flush in between; something 311 * that we are blocking by holding interrupts off. 312 * 313 * Setting ptes from not present to present goes: 314 * 315 * ptep->pte_high = h; 316 * smp_wmb(); 317 * ptep->pte_low = l; 318 * 319 * And present to not present goes: 320 * 321 * ptep->pte_low = 0; 322 * smp_wmb(); 323 * ptep->pte_high = 0; 324 * 325 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'. 326 * We load pte_high *after* loading pte_low, which ensures we don't see an older 327 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't 328 * picked up a changed pte high. We might have gotten rubbish values from 329 * pte_low and pte_high, but we are guaranteed that pte_low will not have the 330 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only 331 * operates on present ptes we're safe. 332 */ 333 static inline pte_t ptep_get_lockless(pte_t *ptep) 334 { 335 pte_t pte; 336 337 do { 338 pte.pte_low = ptep->pte_low; 339 smp_rmb(); 340 pte.pte_high = ptep->pte_high; 341 smp_rmb(); 342 } while (unlikely(pte.pte_low != ptep->pte_low)); 343 344 return pte; 345 } 346 #else /* CONFIG_GUP_GET_PTE_LOW_HIGH */ 347 /* 348 * We require that the PTE can be read atomically. 349 */ 350 static inline pte_t ptep_get_lockless(pte_t *ptep) 351 { 352 return ptep_get(ptep); 353 } 354 #endif /* CONFIG_GUP_GET_PTE_LOW_HIGH */ 355 356 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 357 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 358 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 359 unsigned long address, 360 pmd_t *pmdp) 361 { 362 pmd_t pmd = *pmdp; 363 364 pmd_clear(pmdp); 365 page_table_check_pmd_clear(mm, address, pmd); 366 367 return pmd; 368 } 369 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */ 370 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 371 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 372 unsigned long address, 373 pud_t *pudp) 374 { 375 pud_t pud = *pudp; 376 377 pud_clear(pudp); 378 page_table_check_pud_clear(mm, address, pud); 379 380 return pud; 381 } 382 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */ 383 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 384 385 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 386 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL 387 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma, 388 unsigned long address, pmd_t *pmdp, 389 int full) 390 { 391 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp); 392 } 393 #endif 394 395 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL 396 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm, 397 unsigned long address, pud_t *pudp, 398 int full) 399 { 400 return pudp_huge_get_and_clear(mm, address, pudp); 401 } 402 #endif 403 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 404 405 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 406 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 407 unsigned long address, pte_t *ptep, 408 int full) 409 { 410 pte_t pte; 411 pte = ptep_get_and_clear(mm, address, ptep); 412 return pte; 413 } 414 #endif 415 416 417 /* 418 * If two threads concurrently fault at the same page, the thread that 419 * won the race updates the PTE and its local TLB/Cache. The other thread 420 * gives up, simply does nothing, and continues; on architectures where 421 * software can update TLB, local TLB can be updated here to avoid next page 422 * fault. This function updates TLB only, do nothing with cache or others. 423 * It is the difference with function update_mmu_cache. 424 */ 425 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB 426 static inline void update_mmu_tlb(struct vm_area_struct *vma, 427 unsigned long address, pte_t *ptep) 428 { 429 } 430 #define __HAVE_ARCH_UPDATE_MMU_TLB 431 #endif 432 433 /* 434 * Some architectures may be able to avoid expensive synchronization 435 * primitives when modifications are made to PTE's which are already 436 * not present, or in the process of an address space destruction. 437 */ 438 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL 439 static inline void pte_clear_not_present_full(struct mm_struct *mm, 440 unsigned long address, 441 pte_t *ptep, 442 int full) 443 { 444 pte_clear(mm, address, ptep); 445 } 446 #endif 447 448 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH 449 extern pte_t ptep_clear_flush(struct vm_area_struct *vma, 450 unsigned long address, 451 pte_t *ptep); 452 #endif 453 454 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH 455 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma, 456 unsigned long address, 457 pmd_t *pmdp); 458 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma, 459 unsigned long address, 460 pud_t *pudp); 461 #endif 462 463 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT 464 struct mm_struct; 465 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) 466 { 467 pte_t old_pte = *ptep; 468 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); 469 } 470 #endif 471 472 /* 473 * On some architectures hardware does not set page access bit when accessing 474 * memory page, it is responsibility of software setting this bit. It brings 475 * out extra page fault penalty to track page access bit. For optimization page 476 * access bit can be set during all page fault flow on these arches. 477 * To be differentiate with macro pte_mkyoung, this macro is used on platforms 478 * where software maintains page access bit. 479 */ 480 #ifndef pte_sw_mkyoung 481 static inline pte_t pte_sw_mkyoung(pte_t pte) 482 { 483 return pte; 484 } 485 #define pte_sw_mkyoung pte_sw_mkyoung 486 #endif 487 488 #ifndef pte_savedwrite 489 #define pte_savedwrite pte_write 490 #endif 491 492 #ifndef pte_mk_savedwrite 493 #define pte_mk_savedwrite pte_mkwrite 494 #endif 495 496 #ifndef pte_clear_savedwrite 497 #define pte_clear_savedwrite pte_wrprotect 498 #endif 499 500 #ifndef pmd_savedwrite 501 #define pmd_savedwrite pmd_write 502 #endif 503 504 #ifndef pmd_mk_savedwrite 505 #define pmd_mk_savedwrite pmd_mkwrite 506 #endif 507 508 #ifndef pmd_clear_savedwrite 509 #define pmd_clear_savedwrite pmd_wrprotect 510 #endif 511 512 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT 513 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 514 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 515 unsigned long address, pmd_t *pmdp) 516 { 517 pmd_t old_pmd = *pmdp; 518 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd)); 519 } 520 #else 521 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 522 unsigned long address, pmd_t *pmdp) 523 { 524 BUILD_BUG(); 525 } 526 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 527 #endif 528 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT 529 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 530 static inline void pudp_set_wrprotect(struct mm_struct *mm, 531 unsigned long address, pud_t *pudp) 532 { 533 pud_t old_pud = *pudp; 534 535 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud)); 536 } 537 #else 538 static inline void pudp_set_wrprotect(struct mm_struct *mm, 539 unsigned long address, pud_t *pudp) 540 { 541 BUILD_BUG(); 542 } 543 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */ 544 #endif 545 546 #ifndef pmdp_collapse_flush 547 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 548 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 549 unsigned long address, pmd_t *pmdp); 550 #else 551 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 552 unsigned long address, 553 pmd_t *pmdp) 554 { 555 BUILD_BUG(); 556 return *pmdp; 557 } 558 #define pmdp_collapse_flush pmdp_collapse_flush 559 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 560 #endif 561 562 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT 563 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 564 pgtable_t pgtable); 565 #endif 566 567 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW 568 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); 569 #endif 570 571 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 572 /* 573 * This is an implementation of pmdp_establish() that is only suitable for an 574 * architecture that doesn't have hardware dirty/accessed bits. In this case we 575 * can't race with CPU which sets these bits and non-atomic approach is fine. 576 */ 577 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma, 578 unsigned long address, pmd_t *pmdp, pmd_t pmd) 579 { 580 pmd_t old_pmd = *pmdp; 581 set_pmd_at(vma->vm_mm, address, pmdp, pmd); 582 return old_pmd; 583 } 584 #endif 585 586 #ifndef __HAVE_ARCH_PMDP_INVALIDATE 587 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, 588 pmd_t *pmdp); 589 #endif 590 591 #ifndef __HAVE_ARCH_PMDP_INVALIDATE_AD 592 593 /* 594 * pmdp_invalidate_ad() invalidates the PMD while changing a transparent 595 * hugepage mapping in the page tables. This function is similar to 596 * pmdp_invalidate(), but should only be used if the access and dirty bits would 597 * not be cleared by the software in the new PMD value. The function ensures 598 * that hardware changes of the access and dirty bits updates would not be lost. 599 * 600 * Doing so can allow in certain architectures to avoid a TLB flush in most 601 * cases. Yet, another TLB flush might be necessary later if the PMD update 602 * itself requires such flush (e.g., if protection was set to be stricter). Yet, 603 * even when a TLB flush is needed because of the update, the caller may be able 604 * to batch these TLB flushing operations, so fewer TLB flush operations are 605 * needed. 606 */ 607 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, 608 unsigned long address, pmd_t *pmdp); 609 #endif 610 611 #ifndef __HAVE_ARCH_PTE_SAME 612 static inline int pte_same(pte_t pte_a, pte_t pte_b) 613 { 614 return pte_val(pte_a) == pte_val(pte_b); 615 } 616 #endif 617 618 #ifndef __HAVE_ARCH_PTE_UNUSED 619 /* 620 * Some architectures provide facilities to virtualization guests 621 * so that they can flag allocated pages as unused. This allows the 622 * host to transparently reclaim unused pages. This function returns 623 * whether the pte's page is unused. 624 */ 625 static inline int pte_unused(pte_t pte) 626 { 627 return 0; 628 } 629 #endif 630 631 #ifndef pte_access_permitted 632 #define pte_access_permitted(pte, write) \ 633 (pte_present(pte) && (!(write) || pte_write(pte))) 634 #endif 635 636 #ifndef pmd_access_permitted 637 #define pmd_access_permitted(pmd, write) \ 638 (pmd_present(pmd) && (!(write) || pmd_write(pmd))) 639 #endif 640 641 #ifndef pud_access_permitted 642 #define pud_access_permitted(pud, write) \ 643 (pud_present(pud) && (!(write) || pud_write(pud))) 644 #endif 645 646 #ifndef p4d_access_permitted 647 #define p4d_access_permitted(p4d, write) \ 648 (p4d_present(p4d) && (!(write) || p4d_write(p4d))) 649 #endif 650 651 #ifndef pgd_access_permitted 652 #define pgd_access_permitted(pgd, write) \ 653 (pgd_present(pgd) && (!(write) || pgd_write(pgd))) 654 #endif 655 656 #ifndef __HAVE_ARCH_PMD_SAME 657 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) 658 { 659 return pmd_val(pmd_a) == pmd_val(pmd_b); 660 } 661 662 static inline int pud_same(pud_t pud_a, pud_t pud_b) 663 { 664 return pud_val(pud_a) == pud_val(pud_b); 665 } 666 #endif 667 668 #ifndef __HAVE_ARCH_P4D_SAME 669 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b) 670 { 671 return p4d_val(p4d_a) == p4d_val(p4d_b); 672 } 673 #endif 674 675 #ifndef __HAVE_ARCH_PGD_SAME 676 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b) 677 { 678 return pgd_val(pgd_a) == pgd_val(pgd_b); 679 } 680 #endif 681 682 /* 683 * Use set_p*_safe(), and elide TLB flushing, when confident that *no* 684 * TLB flush will be required as a result of the "set". For example, use 685 * in scenarios where it is known ahead of time that the routine is 686 * setting non-present entries, or re-setting an existing entry to the 687 * same value. Otherwise, use the typical "set" helpers and flush the 688 * TLB. 689 */ 690 #define set_pte_safe(ptep, pte) \ 691 ({ \ 692 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \ 693 set_pte(ptep, pte); \ 694 }) 695 696 #define set_pmd_safe(pmdp, pmd) \ 697 ({ \ 698 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \ 699 set_pmd(pmdp, pmd); \ 700 }) 701 702 #define set_pud_safe(pudp, pud) \ 703 ({ \ 704 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \ 705 set_pud(pudp, pud); \ 706 }) 707 708 #define set_p4d_safe(p4dp, p4d) \ 709 ({ \ 710 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \ 711 set_p4d(p4dp, p4d); \ 712 }) 713 714 #define set_pgd_safe(pgdp, pgd) \ 715 ({ \ 716 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \ 717 set_pgd(pgdp, pgd); \ 718 }) 719 720 #ifndef __HAVE_ARCH_DO_SWAP_PAGE 721 /* 722 * Some architectures support metadata associated with a page. When a 723 * page is being swapped out, this metadata must be saved so it can be 724 * restored when the page is swapped back in. SPARC M7 and newer 725 * processors support an ADI (Application Data Integrity) tag for the 726 * page as metadata for the page. arch_do_swap_page() can restore this 727 * metadata when a page is swapped back in. 728 */ 729 static inline void arch_do_swap_page(struct mm_struct *mm, 730 struct vm_area_struct *vma, 731 unsigned long addr, 732 pte_t pte, pte_t oldpte) 733 { 734 735 } 736 #endif 737 738 #ifndef __HAVE_ARCH_UNMAP_ONE 739 /* 740 * Some architectures support metadata associated with a page. When a 741 * page is being swapped out, this metadata must be saved so it can be 742 * restored when the page is swapped back in. SPARC M7 and newer 743 * processors support an ADI (Application Data Integrity) tag for the 744 * page as metadata for the page. arch_unmap_one() can save this 745 * metadata on a swap-out of a page. 746 */ 747 static inline int arch_unmap_one(struct mm_struct *mm, 748 struct vm_area_struct *vma, 749 unsigned long addr, 750 pte_t orig_pte) 751 { 752 return 0; 753 } 754 #endif 755 756 /* 757 * Allow architectures to preserve additional metadata associated with 758 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function 759 * prototypes must be defined in the arch-specific asm/pgtable.h file. 760 */ 761 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP 762 static inline int arch_prepare_to_swap(struct page *page) 763 { 764 return 0; 765 } 766 #endif 767 768 #ifndef __HAVE_ARCH_SWAP_INVALIDATE 769 static inline void arch_swap_invalidate_page(int type, pgoff_t offset) 770 { 771 } 772 773 static inline void arch_swap_invalidate_area(int type) 774 { 775 } 776 #endif 777 778 #ifndef __HAVE_ARCH_SWAP_RESTORE 779 static inline void arch_swap_restore(swp_entry_t entry, struct folio *folio) 780 { 781 } 782 #endif 783 784 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE 785 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) 786 #endif 787 788 #ifndef __HAVE_ARCH_MOVE_PTE 789 #define move_pte(pte, prot, old_addr, new_addr) (pte) 790 #endif 791 792 #ifndef pte_accessible 793 # define pte_accessible(mm, pte) ((void)(pte), 1) 794 #endif 795 796 #ifndef flush_tlb_fix_spurious_fault 797 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address) 798 #endif 799 800 /* 801 * When walking page tables, get the address of the next boundary, 802 * or the end address of the range if that comes earlier. Although no 803 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. 804 */ 805 806 #define pgd_addr_end(addr, end) \ 807 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ 808 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 809 }) 810 811 #ifndef p4d_addr_end 812 #define p4d_addr_end(addr, end) \ 813 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \ 814 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 815 }) 816 #endif 817 818 #ifndef pud_addr_end 819 #define pud_addr_end(addr, end) \ 820 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ 821 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 822 }) 823 #endif 824 825 #ifndef pmd_addr_end 826 #define pmd_addr_end(addr, end) \ 827 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ 828 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 829 }) 830 #endif 831 832 /* 833 * When walking page tables, we usually want to skip any p?d_none entries; 834 * and any p?d_bad entries - reporting the error before resetting to none. 835 * Do the tests inline, but report and clear the bad entry in mm/memory.c. 836 */ 837 void pgd_clear_bad(pgd_t *); 838 839 #ifndef __PAGETABLE_P4D_FOLDED 840 void p4d_clear_bad(p4d_t *); 841 #else 842 #define p4d_clear_bad(p4d) do { } while (0) 843 #endif 844 845 #ifndef __PAGETABLE_PUD_FOLDED 846 void pud_clear_bad(pud_t *); 847 #else 848 #define pud_clear_bad(p4d) do { } while (0) 849 #endif 850 851 void pmd_clear_bad(pmd_t *); 852 853 static inline int pgd_none_or_clear_bad(pgd_t *pgd) 854 { 855 if (pgd_none(*pgd)) 856 return 1; 857 if (unlikely(pgd_bad(*pgd))) { 858 pgd_clear_bad(pgd); 859 return 1; 860 } 861 return 0; 862 } 863 864 static inline int p4d_none_or_clear_bad(p4d_t *p4d) 865 { 866 if (p4d_none(*p4d)) 867 return 1; 868 if (unlikely(p4d_bad(*p4d))) { 869 p4d_clear_bad(p4d); 870 return 1; 871 } 872 return 0; 873 } 874 875 static inline int pud_none_or_clear_bad(pud_t *pud) 876 { 877 if (pud_none(*pud)) 878 return 1; 879 if (unlikely(pud_bad(*pud))) { 880 pud_clear_bad(pud); 881 return 1; 882 } 883 return 0; 884 } 885 886 static inline int pmd_none_or_clear_bad(pmd_t *pmd) 887 { 888 if (pmd_none(*pmd)) 889 return 1; 890 if (unlikely(pmd_bad(*pmd))) { 891 pmd_clear_bad(pmd); 892 return 1; 893 } 894 return 0; 895 } 896 897 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma, 898 unsigned long addr, 899 pte_t *ptep) 900 { 901 /* 902 * Get the current pte state, but zero it out to make it 903 * non-present, preventing the hardware from asynchronously 904 * updating it. 905 */ 906 return ptep_get_and_clear(vma->vm_mm, addr, ptep); 907 } 908 909 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma, 910 unsigned long addr, 911 pte_t *ptep, pte_t pte) 912 { 913 /* 914 * The pte is non-present, so there's no hardware state to 915 * preserve. 916 */ 917 set_pte_at(vma->vm_mm, addr, ptep, pte); 918 } 919 920 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION 921 /* 922 * Start a pte protection read-modify-write transaction, which 923 * protects against asynchronous hardware modifications to the pte. 924 * The intention is not to prevent the hardware from making pte 925 * updates, but to prevent any updates it may make from being lost. 926 * 927 * This does not protect against other software modifications of the 928 * pte; the appropriate pte lock must be held over the transaction. 929 * 930 * Note that this interface is intended to be batchable, meaning that 931 * ptep_modify_prot_commit may not actually update the pte, but merely 932 * queue the update to be done at some later time. The update must be 933 * actually committed before the pte lock is released, however. 934 */ 935 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, 936 unsigned long addr, 937 pte_t *ptep) 938 { 939 return __ptep_modify_prot_start(vma, addr, ptep); 940 } 941 942 /* 943 * Commit an update to a pte, leaving any hardware-controlled bits in 944 * the PTE unmodified. 945 */ 946 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, 947 unsigned long addr, 948 pte_t *ptep, pte_t old_pte, pte_t pte) 949 { 950 __ptep_modify_prot_commit(vma, addr, ptep, pte); 951 } 952 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ 953 #endif /* CONFIG_MMU */ 954 955 /* 956 * No-op macros that just return the current protection value. Defined here 957 * because these macros can be used even if CONFIG_MMU is not defined. 958 */ 959 960 #ifndef pgprot_nx 961 #define pgprot_nx(prot) (prot) 962 #endif 963 964 #ifndef pgprot_noncached 965 #define pgprot_noncached(prot) (prot) 966 #endif 967 968 #ifndef pgprot_writecombine 969 #define pgprot_writecombine pgprot_noncached 970 #endif 971 972 #ifndef pgprot_writethrough 973 #define pgprot_writethrough pgprot_noncached 974 #endif 975 976 #ifndef pgprot_device 977 #define pgprot_device pgprot_noncached 978 #endif 979 980 #ifndef pgprot_mhp 981 #define pgprot_mhp(prot) (prot) 982 #endif 983 984 #ifdef CONFIG_MMU 985 #ifndef pgprot_modify 986 #define pgprot_modify pgprot_modify 987 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 988 { 989 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot))) 990 newprot = pgprot_noncached(newprot); 991 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot))) 992 newprot = pgprot_writecombine(newprot); 993 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot))) 994 newprot = pgprot_device(newprot); 995 return newprot; 996 } 997 #endif 998 #endif /* CONFIG_MMU */ 999 1000 #ifndef pgprot_encrypted 1001 #define pgprot_encrypted(prot) (prot) 1002 #endif 1003 1004 #ifndef pgprot_decrypted 1005 #define pgprot_decrypted(prot) (prot) 1006 #endif 1007 1008 /* 1009 * A facility to provide lazy MMU batching. This allows PTE updates and 1010 * page invalidations to be delayed until a call to leave lazy MMU mode 1011 * is issued. Some architectures may benefit from doing this, and it is 1012 * beneficial for both shadow and direct mode hypervisors, which may batch 1013 * the PTE updates which happen during this window. Note that using this 1014 * interface requires that read hazards be removed from the code. A read 1015 * hazard could result in the direct mode hypervisor case, since the actual 1016 * write to the page tables may not yet have taken place, so reads though 1017 * a raw PTE pointer after it has been modified are not guaranteed to be 1018 * up to date. This mode can only be entered and left under the protection of 1019 * the page table locks for all page tables which may be modified. In the UP 1020 * case, this is required so that preemption is disabled, and in the SMP case, 1021 * it must synchronize the delayed page table writes properly on other CPUs. 1022 */ 1023 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE 1024 #define arch_enter_lazy_mmu_mode() do {} while (0) 1025 #define arch_leave_lazy_mmu_mode() do {} while (0) 1026 #define arch_flush_lazy_mmu_mode() do {} while (0) 1027 #endif 1028 1029 /* 1030 * A facility to provide batching of the reload of page tables and 1031 * other process state with the actual context switch code for 1032 * paravirtualized guests. By convention, only one of the batched 1033 * update (lazy) modes (CPU, MMU) should be active at any given time, 1034 * entry should never be nested, and entry and exits should always be 1035 * paired. This is for sanity of maintaining and reasoning about the 1036 * kernel code. In this case, the exit (end of the context switch) is 1037 * in architecture-specific code, and so doesn't need a generic 1038 * definition. 1039 */ 1040 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH 1041 #define arch_start_context_switch(prev) do {} while (0) 1042 #endif 1043 1044 /* 1045 * When replacing an anonymous page by a real (!non) swap entry, we clear 1046 * PG_anon_exclusive from the page and instead remember whether the flag was 1047 * set in the swp pte. During fork(), we have to mark the entry as !exclusive 1048 * (possibly shared). On swapin, we use that information to restore 1049 * PG_anon_exclusive, which is very helpful in cases where we might have 1050 * additional (e.g., FOLL_GET) references on a page and wouldn't be able to 1051 * detect exclusivity. 1052 * 1053 * These functions don't apply to non-swap entries (e.g., migration, hwpoison, 1054 * ...). 1055 */ 1056 #ifndef __HAVE_ARCH_PTE_SWP_EXCLUSIVE 1057 static inline pte_t pte_swp_mkexclusive(pte_t pte) 1058 { 1059 return pte; 1060 } 1061 1062 static inline int pte_swp_exclusive(pte_t pte) 1063 { 1064 return false; 1065 } 1066 1067 static inline pte_t pte_swp_clear_exclusive(pte_t pte) 1068 { 1069 return pte; 1070 } 1071 #endif 1072 1073 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1074 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION 1075 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1076 { 1077 return pmd; 1078 } 1079 1080 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1081 { 1082 return 0; 1083 } 1084 1085 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1086 { 1087 return pmd; 1088 } 1089 #endif 1090 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */ 1091 static inline int pte_soft_dirty(pte_t pte) 1092 { 1093 return 0; 1094 } 1095 1096 static inline int pmd_soft_dirty(pmd_t pmd) 1097 { 1098 return 0; 1099 } 1100 1101 static inline pte_t pte_mksoft_dirty(pte_t pte) 1102 { 1103 return pte; 1104 } 1105 1106 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 1107 { 1108 return pmd; 1109 } 1110 1111 static inline pte_t pte_clear_soft_dirty(pte_t pte) 1112 { 1113 return pte; 1114 } 1115 1116 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 1117 { 1118 return pmd; 1119 } 1120 1121 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1122 { 1123 return pte; 1124 } 1125 1126 static inline int pte_swp_soft_dirty(pte_t pte) 1127 { 1128 return 0; 1129 } 1130 1131 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1132 { 1133 return pte; 1134 } 1135 1136 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1137 { 1138 return pmd; 1139 } 1140 1141 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1142 { 1143 return 0; 1144 } 1145 1146 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1147 { 1148 return pmd; 1149 } 1150 #endif 1151 1152 #ifndef __HAVE_PFNMAP_TRACKING 1153 /* 1154 * Interfaces that can be used by architecture code to keep track of 1155 * memory type of pfn mappings specified by the remap_pfn_range, 1156 * vmf_insert_pfn. 1157 */ 1158 1159 /* 1160 * track_pfn_remap is called when a _new_ pfn mapping is being established 1161 * by remap_pfn_range() for physical range indicated by pfn and size. 1162 */ 1163 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1164 unsigned long pfn, unsigned long addr, 1165 unsigned long size) 1166 { 1167 return 0; 1168 } 1169 1170 /* 1171 * track_pfn_insert is called when a _new_ single pfn is established 1172 * by vmf_insert_pfn(). 1173 */ 1174 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1175 pfn_t pfn) 1176 { 1177 } 1178 1179 /* 1180 * track_pfn_copy is called when vma that is covering the pfnmap gets 1181 * copied through copy_page_range(). 1182 */ 1183 static inline int track_pfn_copy(struct vm_area_struct *vma) 1184 { 1185 return 0; 1186 } 1187 1188 /* 1189 * untrack_pfn is called while unmapping a pfnmap for a region. 1190 * untrack can be called for a specific region indicated by pfn and size or 1191 * can be for the entire vma (in which case pfn, size are zero). 1192 */ 1193 static inline void untrack_pfn(struct vm_area_struct *vma, 1194 unsigned long pfn, unsigned long size) 1195 { 1196 } 1197 1198 /* 1199 * untrack_pfn_moved is called while mremapping a pfnmap for a new region. 1200 */ 1201 static inline void untrack_pfn_moved(struct vm_area_struct *vma) 1202 { 1203 } 1204 #else 1205 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1206 unsigned long pfn, unsigned long addr, 1207 unsigned long size); 1208 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1209 pfn_t pfn); 1210 extern int track_pfn_copy(struct vm_area_struct *vma); 1211 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, 1212 unsigned long size); 1213 extern void untrack_pfn_moved(struct vm_area_struct *vma); 1214 #endif 1215 1216 #ifdef CONFIG_MMU 1217 #ifdef __HAVE_COLOR_ZERO_PAGE 1218 static inline int is_zero_pfn(unsigned long pfn) 1219 { 1220 extern unsigned long zero_pfn; 1221 unsigned long offset_from_zero_pfn = pfn - zero_pfn; 1222 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT); 1223 } 1224 1225 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr)) 1226 1227 #else 1228 static inline int is_zero_pfn(unsigned long pfn) 1229 { 1230 extern unsigned long zero_pfn; 1231 return pfn == zero_pfn; 1232 } 1233 1234 static inline unsigned long my_zero_pfn(unsigned long addr) 1235 { 1236 extern unsigned long zero_pfn; 1237 return zero_pfn; 1238 } 1239 #endif 1240 #else 1241 static inline int is_zero_pfn(unsigned long pfn) 1242 { 1243 return 0; 1244 } 1245 1246 static inline unsigned long my_zero_pfn(unsigned long addr) 1247 { 1248 return 0; 1249 } 1250 #endif /* CONFIG_MMU */ 1251 1252 #ifdef CONFIG_MMU 1253 1254 #ifndef CONFIG_TRANSPARENT_HUGEPAGE 1255 static inline int pmd_trans_huge(pmd_t pmd) 1256 { 1257 return 0; 1258 } 1259 #ifndef pmd_write 1260 static inline int pmd_write(pmd_t pmd) 1261 { 1262 BUG(); 1263 return 0; 1264 } 1265 #endif /* pmd_write */ 1266 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 1267 1268 #ifndef pud_write 1269 static inline int pud_write(pud_t pud) 1270 { 1271 BUG(); 1272 return 0; 1273 } 1274 #endif /* pud_write */ 1275 1276 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE) 1277 static inline int pmd_devmap(pmd_t pmd) 1278 { 1279 return 0; 1280 } 1281 static inline int pud_devmap(pud_t pud) 1282 { 1283 return 0; 1284 } 1285 static inline int pgd_devmap(pgd_t pgd) 1286 { 1287 return 0; 1288 } 1289 #endif 1290 1291 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \ 1292 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1293 static inline int pud_trans_huge(pud_t pud) 1294 { 1295 return 0; 1296 } 1297 #endif 1298 1299 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */ 1300 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud) 1301 { 1302 pud_t pudval = READ_ONCE(*pud); 1303 1304 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval)) 1305 return 1; 1306 if (unlikely(pud_bad(pudval))) { 1307 pud_clear_bad(pud); 1308 return 1; 1309 } 1310 return 0; 1311 } 1312 1313 /* See pmd_trans_unstable for discussion. */ 1314 static inline int pud_trans_unstable(pud_t *pud) 1315 { 1316 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \ 1317 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1318 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud); 1319 #else 1320 return 0; 1321 #endif 1322 } 1323 1324 #ifndef pmd_read_atomic 1325 static inline pmd_t pmd_read_atomic(pmd_t *pmdp) 1326 { 1327 /* 1328 * Depend on compiler for an atomic pmd read. NOTE: this is 1329 * only going to work, if the pmdval_t isn't larger than 1330 * an unsigned long. 1331 */ 1332 return *pmdp; 1333 } 1334 #endif 1335 1336 #ifndef arch_needs_pgtable_deposit 1337 #define arch_needs_pgtable_deposit() (false) 1338 #endif 1339 /* 1340 * This function is meant to be used by sites walking pagetables with 1341 * the mmap_lock held in read mode to protect against MADV_DONTNEED and 1342 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd 1343 * into a null pmd and the transhuge page fault can convert a null pmd 1344 * into an hugepmd or into a regular pmd (if the hugepage allocation 1345 * fails). While holding the mmap_lock in read mode the pmd becomes 1346 * stable and stops changing under us only if it's not null and not a 1347 * transhuge pmd. When those races occurs and this function makes a 1348 * difference vs the standard pmd_none_or_clear_bad, the result is 1349 * undefined so behaving like if the pmd was none is safe (because it 1350 * can return none anyway). The compiler level barrier() is critically 1351 * important to compute the two checks atomically on the same pmdval. 1352 * 1353 * For 32bit kernels with a 64bit large pmd_t this automatically takes 1354 * care of reading the pmd atomically to avoid SMP race conditions 1355 * against pmd_populate() when the mmap_lock is hold for reading by the 1356 * caller (a special atomic read not done by "gcc" as in the generic 1357 * version above, is also needed when THP is disabled because the page 1358 * fault can populate the pmd from under us). 1359 */ 1360 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd) 1361 { 1362 pmd_t pmdval = pmd_read_atomic(pmd); 1363 /* 1364 * The barrier will stabilize the pmdval in a register or on 1365 * the stack so that it will stop changing under the code. 1366 * 1367 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE, 1368 * pmd_read_atomic is allowed to return a not atomic pmdval 1369 * (for example pointing to an hugepage that has never been 1370 * mapped in the pmd). The below checks will only care about 1371 * the low part of the pmd with 32bit PAE x86 anyway, with the 1372 * exception of pmd_none(). So the important thing is that if 1373 * the low part of the pmd is found null, the high part will 1374 * be also null or the pmd_none() check below would be 1375 * confused. 1376 */ 1377 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1378 barrier(); 1379 #endif 1380 /* 1381 * !pmd_present() checks for pmd migration entries 1382 * 1383 * The complete check uses is_pmd_migration_entry() in linux/swapops.h 1384 * But using that requires moving current function and pmd_trans_unstable() 1385 * to linux/swapops.h to resolve dependency, which is too much code move. 1386 * 1387 * !pmd_present() is equivalent to is_pmd_migration_entry() currently, 1388 * because !pmd_present() pages can only be under migration not swapped 1389 * out. 1390 * 1391 * pmd_none() is preserved for future condition checks on pmd migration 1392 * entries and not confusing with this function name, although it is 1393 * redundant with !pmd_present(). 1394 */ 1395 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) || 1396 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval))) 1397 return 1; 1398 if (unlikely(pmd_bad(pmdval))) { 1399 pmd_clear_bad(pmd); 1400 return 1; 1401 } 1402 return 0; 1403 } 1404 1405 /* 1406 * This is a noop if Transparent Hugepage Support is not built into 1407 * the kernel. Otherwise it is equivalent to 1408 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in 1409 * places that already verified the pmd is not none and they want to 1410 * walk ptes while holding the mmap sem in read mode (write mode don't 1411 * need this). If THP is not enabled, the pmd can't go away under the 1412 * code even if MADV_DONTNEED runs, but if THP is enabled we need to 1413 * run a pmd_trans_unstable before walking the ptes after 1414 * split_huge_pmd returns (because it may have run when the pmd become 1415 * null, but then a page fault can map in a THP and not a regular page). 1416 */ 1417 static inline int pmd_trans_unstable(pmd_t *pmd) 1418 { 1419 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1420 return pmd_none_or_trans_huge_or_clear_bad(pmd); 1421 #else 1422 return 0; 1423 #endif 1424 } 1425 1426 /* 1427 * the ordering of these checks is important for pmds with _page_devmap set. 1428 * if we check pmd_trans_unstable() first we will trip the bad_pmd() check 1429 * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly 1430 * returning 1 but not before it spams dmesg with the pmd_clear_bad() output. 1431 */ 1432 static inline int pmd_devmap_trans_unstable(pmd_t *pmd) 1433 { 1434 return pmd_devmap(*pmd) || pmd_trans_unstable(pmd); 1435 } 1436 1437 #ifndef CONFIG_NUMA_BALANCING 1438 /* 1439 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but 1440 * the only case the kernel cares is for NUMA balancing and is only ever set 1441 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked 1442 * _PAGE_PROTNONE so by default, implement the helper as "always no". It 1443 * is the responsibility of the caller to distinguish between PROT_NONE 1444 * protections and NUMA hinting fault protections. 1445 */ 1446 static inline int pte_protnone(pte_t pte) 1447 { 1448 return 0; 1449 } 1450 1451 static inline int pmd_protnone(pmd_t pmd) 1452 { 1453 return 0; 1454 } 1455 #endif /* CONFIG_NUMA_BALANCING */ 1456 1457 #endif /* CONFIG_MMU */ 1458 1459 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP 1460 1461 #ifndef __PAGETABLE_P4D_FOLDED 1462 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot); 1463 void p4d_clear_huge(p4d_t *p4d); 1464 #else 1465 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1466 { 1467 return 0; 1468 } 1469 static inline void p4d_clear_huge(p4d_t *p4d) { } 1470 #endif /* !__PAGETABLE_P4D_FOLDED */ 1471 1472 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot); 1473 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot); 1474 int pud_clear_huge(pud_t *pud); 1475 int pmd_clear_huge(pmd_t *pmd); 1476 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr); 1477 int pud_free_pmd_page(pud_t *pud, unsigned long addr); 1478 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr); 1479 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */ 1480 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1481 { 1482 return 0; 1483 } 1484 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) 1485 { 1486 return 0; 1487 } 1488 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) 1489 { 1490 return 0; 1491 } 1492 static inline void p4d_clear_huge(p4d_t *p4d) { } 1493 static inline int pud_clear_huge(pud_t *pud) 1494 { 1495 return 0; 1496 } 1497 static inline int pmd_clear_huge(pmd_t *pmd) 1498 { 1499 return 0; 1500 } 1501 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) 1502 { 1503 return 0; 1504 } 1505 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr) 1506 { 1507 return 0; 1508 } 1509 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) 1510 { 1511 return 0; 1512 } 1513 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ 1514 1515 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE 1516 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1517 /* 1518 * ARCHes with special requirements for evicting THP backing TLB entries can 1519 * implement this. Otherwise also, it can help optimize normal TLB flush in 1520 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the 1521 * entire TLB if flush span is greater than a threshold, which will 1522 * likely be true for a single huge page. Thus a single THP flush will 1523 * invalidate the entire TLB which is not desirable. 1524 * e.g. see arch/arc: flush_pmd_tlb_range 1525 */ 1526 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1527 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1528 #else 1529 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG() 1530 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG() 1531 #endif 1532 #endif 1533 1534 struct file; 1535 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, 1536 unsigned long size, pgprot_t *vma_prot); 1537 1538 #ifndef CONFIG_X86_ESPFIX64 1539 static inline void init_espfix_bsp(void) { } 1540 #endif 1541 1542 extern void __init pgtable_cache_init(void); 1543 1544 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED 1545 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot) 1546 { 1547 return true; 1548 } 1549 1550 static inline bool arch_has_pfn_modify_check(void) 1551 { 1552 return false; 1553 } 1554 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */ 1555 1556 /* 1557 * Architecture PAGE_KERNEL_* fallbacks 1558 * 1559 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either 1560 * because they really don't support them, or the port needs to be updated to 1561 * reflect the required functionality. Below are a set of relatively safe 1562 * fallbacks, as best effort, which we can count on in lieu of the architectures 1563 * not defining them on their own yet. 1564 */ 1565 1566 #ifndef PAGE_KERNEL_RO 1567 # define PAGE_KERNEL_RO PAGE_KERNEL 1568 #endif 1569 1570 #ifndef PAGE_KERNEL_EXEC 1571 # define PAGE_KERNEL_EXEC PAGE_KERNEL 1572 #endif 1573 1574 /* 1575 * Page Table Modification bits for pgtbl_mod_mask. 1576 * 1577 * These are used by the p?d_alloc_track*() set of functions an in the generic 1578 * vmalloc/ioremap code to track at which page-table levels entries have been 1579 * modified. Based on that the code can better decide when vmalloc and ioremap 1580 * mapping changes need to be synchronized to other page-tables in the system. 1581 */ 1582 #define __PGTBL_PGD_MODIFIED 0 1583 #define __PGTBL_P4D_MODIFIED 1 1584 #define __PGTBL_PUD_MODIFIED 2 1585 #define __PGTBL_PMD_MODIFIED 3 1586 #define __PGTBL_PTE_MODIFIED 4 1587 1588 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED) 1589 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED) 1590 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED) 1591 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED) 1592 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED) 1593 1594 /* Page-Table Modification Mask */ 1595 typedef unsigned int pgtbl_mod_mask; 1596 1597 #endif /* !__ASSEMBLY__ */ 1598 1599 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT) 1600 #ifdef CONFIG_PHYS_ADDR_T_64BIT 1601 /* 1602 * ZSMALLOC needs to know the highest PFN on 32-bit architectures 1603 * with physical address space extension, but falls back to 1604 * BITS_PER_LONG otherwise. 1605 */ 1606 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition 1607 #else 1608 #define MAX_POSSIBLE_PHYSMEM_BITS 32 1609 #endif 1610 #endif 1611 1612 #ifndef has_transparent_hugepage 1613 #define has_transparent_hugepage() IS_BUILTIN(CONFIG_TRANSPARENT_HUGEPAGE) 1614 #endif 1615 1616 /* 1617 * On some architectures it depends on the mm if the p4d/pud or pmd 1618 * layer of the page table hierarchy is folded or not. 1619 */ 1620 #ifndef mm_p4d_folded 1621 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED) 1622 #endif 1623 1624 #ifndef mm_pud_folded 1625 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED) 1626 #endif 1627 1628 #ifndef mm_pmd_folded 1629 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED) 1630 #endif 1631 1632 #ifndef p4d_offset_lockless 1633 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address) 1634 #endif 1635 #ifndef pud_offset_lockless 1636 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address) 1637 #endif 1638 #ifndef pmd_offset_lockless 1639 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address) 1640 #endif 1641 1642 /* 1643 * p?d_leaf() - true if this entry is a final mapping to a physical address. 1644 * This differs from p?d_huge() by the fact that they are always available (if 1645 * the architecture supports large pages at the appropriate level) even 1646 * if CONFIG_HUGETLB_PAGE is not defined. 1647 * Only meaningful when called on a valid entry. 1648 */ 1649 #ifndef pgd_leaf 1650 #define pgd_leaf(x) 0 1651 #endif 1652 #ifndef p4d_leaf 1653 #define p4d_leaf(x) 0 1654 #endif 1655 #ifndef pud_leaf 1656 #define pud_leaf(x) 0 1657 #endif 1658 #ifndef pmd_leaf 1659 #define pmd_leaf(x) 0 1660 #endif 1661 1662 #ifndef pgd_leaf_size 1663 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT) 1664 #endif 1665 #ifndef p4d_leaf_size 1666 #define p4d_leaf_size(x) P4D_SIZE 1667 #endif 1668 #ifndef pud_leaf_size 1669 #define pud_leaf_size(x) PUD_SIZE 1670 #endif 1671 #ifndef pmd_leaf_size 1672 #define pmd_leaf_size(x) PMD_SIZE 1673 #endif 1674 #ifndef pte_leaf_size 1675 #define pte_leaf_size(x) PAGE_SIZE 1676 #endif 1677 1678 /* 1679 * Some architectures have MMUs that are configurable or selectable at boot 1680 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it 1681 * helps to have a static maximum value. 1682 */ 1683 1684 #ifndef MAX_PTRS_PER_PTE 1685 #define MAX_PTRS_PER_PTE PTRS_PER_PTE 1686 #endif 1687 1688 #ifndef MAX_PTRS_PER_PMD 1689 #define MAX_PTRS_PER_PMD PTRS_PER_PMD 1690 #endif 1691 1692 #ifndef MAX_PTRS_PER_PUD 1693 #define MAX_PTRS_PER_PUD PTRS_PER_PUD 1694 #endif 1695 1696 #ifndef MAX_PTRS_PER_P4D 1697 #define MAX_PTRS_PER_P4D PTRS_PER_P4D 1698 #endif 1699 1700 /* description of effects of mapping type and prot in current implementation. 1701 * this is due to the limited x86 page protection hardware. The expected 1702 * behavior is in parens: 1703 * 1704 * map_type prot 1705 * PROT_NONE PROT_READ PROT_WRITE PROT_EXEC 1706 * MAP_SHARED r: (no) no r: (yes) yes r: (no) yes r: (no) yes 1707 * w: (no) no w: (no) no w: (yes) yes w: (no) no 1708 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes 1709 * 1710 * MAP_PRIVATE r: (no) no r: (yes) yes r: (no) yes r: (no) yes 1711 * w: (no) no w: (no) no w: (copy) copy w: (no) no 1712 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes 1713 * 1714 * On arm64, PROT_EXEC has the following behaviour for both MAP_SHARED and 1715 * MAP_PRIVATE (with Enhanced PAN supported): 1716 * r: (no) no 1717 * w: (no) no 1718 * x: (yes) yes 1719 */ 1720 #define DECLARE_VM_GET_PAGE_PROT \ 1721 pgprot_t vm_get_page_prot(unsigned long vm_flags) \ 1722 { \ 1723 return protection_map[vm_flags & \ 1724 (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)]; \ 1725 } \ 1726 EXPORT_SYMBOL(vm_get_page_prot); 1727 1728 #endif /* _LINUX_PGTABLE_H */ 1729