xref: /linux/include/linux/usb/tegra_usb_phy.h (revision 44f57d78)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2010 Google, Inc.
4  *
5  * This software is licensed under the terms of the GNU General Public
6  * License version 2, as published by the Free Software Foundation, and
7  * may be copied, distributed, and modified under those terms.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  */
15 
16 #ifndef __TEGRA_USB_PHY_H
17 #define __TEGRA_USB_PHY_H
18 
19 #include <linux/clk.h>
20 #include <linux/reset.h>
21 #include <linux/usb/otg.h>
22 
23 /*
24  * utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers
25  *     should be set up by clk-tegra, false if by the PHY code
26  * has_hostpc: true if the USB controller has the HOSTPC extension, which
27  *     changes the location of the PHCD and PTS fields
28  * requires_usbmode_setup: true if the USBMODE register needs to be set to
29  *      enter host mode
30  * requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level
31  *      and hsdiscon_level should be set for adequate signal quality
32  */
33 
34 struct tegra_phy_soc_config {
35 	bool utmi_pll_config_in_car_module;
36 	bool has_hostpc;
37 	bool requires_usbmode_setup;
38 	bool requires_extra_tuning_parameters;
39 };
40 
41 struct tegra_utmip_config {
42 	u8 hssync_start_delay;
43 	u8 elastic_limit;
44 	u8 idle_wait_delay;
45 	u8 term_range_adj;
46 	bool xcvr_setup_use_fuses;
47 	u8 xcvr_setup;
48 	u8 xcvr_lsfslew;
49 	u8 xcvr_lsrslew;
50 	u8 xcvr_hsslew;
51 	u8 hssquelch_level;
52 	u8 hsdiscon_level;
53 };
54 
55 enum tegra_usb_phy_port_speed {
56 	TEGRA_USB_PHY_PORT_SPEED_FULL = 0,
57 	TEGRA_USB_PHY_PORT_SPEED_LOW,
58 	TEGRA_USB_PHY_PORT_SPEED_HIGH,
59 };
60 
61 struct tegra_xtal_freq;
62 
63 struct tegra_usb_phy {
64 	int instance;
65 	const struct tegra_xtal_freq *freq;
66 	void __iomem *regs;
67 	void __iomem *pad_regs;
68 	struct clk *clk;
69 	struct clk *pll_u;
70 	struct clk *pad_clk;
71 	struct regulator *vbus;
72 	enum usb_dr_mode mode;
73 	void *config;
74 	const struct tegra_phy_soc_config *soc_config;
75 	struct usb_phy *ulpi;
76 	struct usb_phy u_phy;
77 	bool is_legacy_phy;
78 	bool is_ulpi_phy;
79 	int reset_gpio;
80 	struct reset_control *pad_rst;
81 };
82 
83 void tegra_usb_phy_preresume(struct usb_phy *phy);
84 
85 void tegra_usb_phy_postresume(struct usb_phy *phy);
86 
87 void tegra_ehci_phy_restore_start(struct usb_phy *phy,
88 				 enum tegra_usb_phy_port_speed port_speed);
89 
90 void tegra_ehci_phy_restore_end(struct usb_phy *phy);
91 
92 #endif /* __TEGRA_USB_PHY_H */
93