1*3ced8d73SChristophe Lombard /* 2*3ced8d73SChristophe Lombard * Copyright 2017 IBM Corp. 3*3ced8d73SChristophe Lombard * 4*3ced8d73SChristophe Lombard * This program is free software; you can redistribute it and/or 5*3ced8d73SChristophe Lombard * modify it under the terms of the GNU General Public License 6*3ced8d73SChristophe Lombard * as published by the Free Software Foundation; either version 7*3ced8d73SChristophe Lombard * 2 of the License, or (at your option) any later version. 8*3ced8d73SChristophe Lombard */ 9*3ced8d73SChristophe Lombard 10*3ced8d73SChristophe Lombard #ifndef _MISC_CXLLIB_H 11*3ced8d73SChristophe Lombard #define _MISC_CXLLIB_H 12*3ced8d73SChristophe Lombard 13*3ced8d73SChristophe Lombard #include <linux/pci.h> 14*3ced8d73SChristophe Lombard #include <asm/reg.h> 15*3ced8d73SChristophe Lombard 16*3ced8d73SChristophe Lombard /* 17*3ced8d73SChristophe Lombard * cxl driver exports a in-kernel 'library' API which can be called by 18*3ced8d73SChristophe Lombard * other drivers to help interacting with an IBM XSL. 19*3ced8d73SChristophe Lombard */ 20*3ced8d73SChristophe Lombard 21*3ced8d73SChristophe Lombard /* 22*3ced8d73SChristophe Lombard * tells whether capi is supported on the PCIe slot where the 23*3ced8d73SChristophe Lombard * device is seated 24*3ced8d73SChristophe Lombard * 25*3ced8d73SChristophe Lombard * Input: 26*3ced8d73SChristophe Lombard * dev: device whose slot needs to be checked 27*3ced8d73SChristophe Lombard * flags: 0 for the time being 28*3ced8d73SChristophe Lombard */ 29*3ced8d73SChristophe Lombard bool cxllib_slot_is_supported(struct pci_dev *dev, unsigned long flags); 30*3ced8d73SChristophe Lombard 31*3ced8d73SChristophe Lombard 32*3ced8d73SChristophe Lombard /* 33*3ced8d73SChristophe Lombard * Returns the configuration parameters to be used by the XSL or device 34*3ced8d73SChristophe Lombard * 35*3ced8d73SChristophe Lombard * Input: 36*3ced8d73SChristophe Lombard * dev: device, used to find PHB 37*3ced8d73SChristophe Lombard * Output: 38*3ced8d73SChristophe Lombard * struct cxllib_xsl_config: 39*3ced8d73SChristophe Lombard * version 40*3ced8d73SChristophe Lombard * capi BAR address, i.e. 0x2000000000000-0x2FFFFFFFFFFFF 41*3ced8d73SChristophe Lombard * capi BAR size 42*3ced8d73SChristophe Lombard * data send control (XSL_DSNCTL) 43*3ced8d73SChristophe Lombard * dummy read address (XSL_DRA) 44*3ced8d73SChristophe Lombard */ 45*3ced8d73SChristophe Lombard #define CXL_XSL_CONFIG_VERSION1 1 46*3ced8d73SChristophe Lombard struct cxllib_xsl_config { 47*3ced8d73SChristophe Lombard u32 version; /* format version for register encoding */ 48*3ced8d73SChristophe Lombard u32 log_bar_size;/* log size of the capi_window */ 49*3ced8d73SChristophe Lombard u64 bar_addr; /* address of the start of capi window */ 50*3ced8d73SChristophe Lombard u64 dsnctl; /* matches definition of XSL_DSNCTL */ 51*3ced8d73SChristophe Lombard u64 dra; /* real address that can be used for dummy read */ 52*3ced8d73SChristophe Lombard }; 53*3ced8d73SChristophe Lombard 54*3ced8d73SChristophe Lombard int cxllib_get_xsl_config(struct pci_dev *dev, struct cxllib_xsl_config *cfg); 55*3ced8d73SChristophe Lombard 56*3ced8d73SChristophe Lombard 57*3ced8d73SChristophe Lombard /* 58*3ced8d73SChristophe Lombard * Activate capi for the pci host bridge associated with the device. 59*3ced8d73SChristophe Lombard * Can be extended to deactivate once we know how to do it. 60*3ced8d73SChristophe Lombard * Device must be ready to accept messages from the CAPP unit and 61*3ced8d73SChristophe Lombard * respond accordingly (TLB invalidates, ...) 62*3ced8d73SChristophe Lombard * 63*3ced8d73SChristophe Lombard * PHB is switched to capi mode through calls to skiboot. 64*3ced8d73SChristophe Lombard * CAPP snooping is activated 65*3ced8d73SChristophe Lombard * 66*3ced8d73SChristophe Lombard * Input: 67*3ced8d73SChristophe Lombard * dev: device whose PHB should switch mode 68*3ced8d73SChristophe Lombard * mode: mode to switch to i.e. CAPI or PCI 69*3ced8d73SChristophe Lombard * flags: options related to the mode 70*3ced8d73SChristophe Lombard */ 71*3ced8d73SChristophe Lombard enum cxllib_mode { 72*3ced8d73SChristophe Lombard CXL_MODE_CXL, 73*3ced8d73SChristophe Lombard CXL_MODE_PCI, 74*3ced8d73SChristophe Lombard }; 75*3ced8d73SChristophe Lombard 76*3ced8d73SChristophe Lombard #define CXL_MODE_NO_DMA 0 77*3ced8d73SChristophe Lombard #define CXL_MODE_DMA_TVT0 1 78*3ced8d73SChristophe Lombard #define CXL_MODE_DMA_TVT1 2 79*3ced8d73SChristophe Lombard 80*3ced8d73SChristophe Lombard int cxllib_switch_phb_mode(struct pci_dev *dev, enum cxllib_mode mode, 81*3ced8d73SChristophe Lombard unsigned long flags); 82*3ced8d73SChristophe Lombard 83*3ced8d73SChristophe Lombard 84*3ced8d73SChristophe Lombard /* 85*3ced8d73SChristophe Lombard * Set the device for capi DMA. 86*3ced8d73SChristophe Lombard * Define its dma_ops and dma offset so that allocations will be using TVT#1 87*3ced8d73SChristophe Lombard * 88*3ced8d73SChristophe Lombard * Input: 89*3ced8d73SChristophe Lombard * dev: device to set 90*3ced8d73SChristophe Lombard * flags: options. CXL_MODE_DMA_TVT1 should be used 91*3ced8d73SChristophe Lombard */ 92*3ced8d73SChristophe Lombard int cxllib_set_device_dma(struct pci_dev *dev, unsigned long flags); 93*3ced8d73SChristophe Lombard 94*3ced8d73SChristophe Lombard 95*3ced8d73SChristophe Lombard /* 96*3ced8d73SChristophe Lombard * Get the Process Element structure for the given thread 97*3ced8d73SChristophe Lombard * 98*3ced8d73SChristophe Lombard * Input: 99*3ced8d73SChristophe Lombard * task: task_struct for the context of the translation 100*3ced8d73SChristophe Lombard * translation_mode: whether addresses should be translated 101*3ced8d73SChristophe Lombard * Output: 102*3ced8d73SChristophe Lombard * attr: attributes to fill up the Process Element structure from CAIA 103*3ced8d73SChristophe Lombard */ 104*3ced8d73SChristophe Lombard struct cxllib_pe_attributes { 105*3ced8d73SChristophe Lombard u64 sr; 106*3ced8d73SChristophe Lombard u32 lpid; 107*3ced8d73SChristophe Lombard u32 tid; 108*3ced8d73SChristophe Lombard u32 pid; 109*3ced8d73SChristophe Lombard }; 110*3ced8d73SChristophe Lombard #define CXL_TRANSLATED_MODE 0 111*3ced8d73SChristophe Lombard #define CXL_REAL_MODE 1 112*3ced8d73SChristophe Lombard 113*3ced8d73SChristophe Lombard int cxllib_get_PE_attributes(struct task_struct *task, 114*3ced8d73SChristophe Lombard unsigned long translation_mode, struct cxllib_pe_attributes *attr); 115*3ced8d73SChristophe Lombard 116*3ced8d73SChristophe Lombard 117*3ced8d73SChristophe Lombard /* 118*3ced8d73SChristophe Lombard * Handle memory fault. 119*3ced8d73SChristophe Lombard * Fault in all the pages of the specified buffer for the permissions 120*3ced8d73SChristophe Lombard * provided in ‘flags’ 121*3ced8d73SChristophe Lombard * 122*3ced8d73SChristophe Lombard * Shouldn't be called from interrupt context 123*3ced8d73SChristophe Lombard * 124*3ced8d73SChristophe Lombard * Input: 125*3ced8d73SChristophe Lombard * mm: struct mm for the thread faulting the pages 126*3ced8d73SChristophe Lombard * addr: base address of the buffer to page in 127*3ced8d73SChristophe Lombard * size: size of the buffer to page in 128*3ced8d73SChristophe Lombard * flags: permission requested (DSISR_ISSTORE...) 129*3ced8d73SChristophe Lombard */ 130*3ced8d73SChristophe Lombard int cxllib_handle_fault(struct mm_struct *mm, u64 addr, u64 size, u64 flags); 131*3ced8d73SChristophe Lombard 132*3ced8d73SChristophe Lombard 133*3ced8d73SChristophe Lombard #endif /* _MISC_CXLLIB_H */ 134