1*6bf9d8f6SLeon Romanovsky /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 2d4ab3470SDennis Dalessandro /* 36d72344cSKaike Wan * Copyright (c) 2014-2020 Intel Corporation. All rights reserved. 4d4ab3470SDennis Dalessandro */ 5d4ab3470SDennis Dalessandro 6*6bf9d8f6SLeon Romanovsky #ifndef OPA_PORT_INFO_H 7d4ab3470SDennis Dalessandro #define OPA_PORT_INFO_H 8d4ab3470SDennis Dalessandro 939289bfcSJason Gunthorpe #include <rdma/opa_smi.h> 1039289bfcSJason Gunthorpe 11d4ab3470SDennis Dalessandro #define OPA_PORT_LINK_MODE_NOP 0 /* No change */ 12d4ab3470SDennis Dalessandro #define OPA_PORT_LINK_MODE_OPA 4 /* Port mode is OPA */ 13d4ab3470SDennis Dalessandro 14d4ab3470SDennis Dalessandro #define OPA_PORT_PACKET_FORMAT_NOP 0 /* No change */ 15d4ab3470SDennis Dalessandro #define OPA_PORT_PACKET_FORMAT_8B 1 /* Format 8B */ 16d4ab3470SDennis Dalessandro #define OPA_PORT_PACKET_FORMAT_9B 2 /* Format 9B */ 17d4ab3470SDennis Dalessandro #define OPA_PORT_PACKET_FORMAT_10B 4 /* Format 10B */ 18d4ab3470SDennis Dalessandro #define OPA_PORT_PACKET_FORMAT_16B 8 /* Format 16B */ 19d4ab3470SDennis Dalessandro 20d4ab3470SDennis Dalessandro #define OPA_PORT_LTP_CRC_MODE_NONE 0 /* No change */ 21d4ab3470SDennis Dalessandro #define OPA_PORT_LTP_CRC_MODE_14 1 /* 14-bit LTP CRC mode (optional) */ 22d4ab3470SDennis Dalessandro #define OPA_PORT_LTP_CRC_MODE_16 2 /* 16-bit LTP CRC mode */ 23d4ab3470SDennis Dalessandro #define OPA_PORT_LTP_CRC_MODE_48 4 /* 48-bit LTP CRC mode (optional) */ 24d4ab3470SDennis Dalessandro #define OPA_PORT_LTP_CRC_MODE_PER_LANE 8 /* 12/16-bit per lane LTP CRC mode */ 25d4ab3470SDennis Dalessandro 26d4ab3470SDennis Dalessandro /* Link Down / Neighbor Link Down Reason; indicated as follows: */ 27d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_NONE 0 /* No specified reason */ 28d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_0 1 29d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_PKT_LEN 2 30d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_PKT_TOO_LONG 3 31d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_PKT_TOO_SHORT 4 32d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_SLID 5 33d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_DLID 6 34d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_L2 7 35d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_SC 8 36d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_8 9 37d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_MID_TAIL 10 38d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_10 11 39d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_PREEMPT_ERROR 12 40d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_PREEMPT_VL15 13 41d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_VL_MARKER 14 42d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_14 15 43d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_15 16 44d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_HEAD_DIST 17 45d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_TAIL_DIST 18 46d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_CTRL_DIST 19 47d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_CREDIT_ACK 20 48d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_UNSUPPORTED_VL_MARKER 21 49d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_PREEMPT 22 50d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_BAD_CONTROL_FLIT 23 51d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_EXCEED_MULTICAST_LIMIT 24 52d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_24 25 53d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_25 26 54d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_26 27 55d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_27 28 56d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_28 29 57d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_29 30 58d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_RCV_ERROR_30 31 59d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_EXCESSIVE_BUFFER_OVERRUN 32 60d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_UNKNOWN 33 61d4ab3470SDennis Dalessandro /* 34 -reserved */ 62d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_REBOOT 35 63d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_NEIGHBOR_UNKNOWN 36 64d4ab3470SDennis Dalessandro /* 37-38 reserved */ 65d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_FM_BOUNCE 39 66d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_SPEED_POLICY 40 67d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_WIDTH_POLICY 41 68d4ab3470SDennis Dalessandro /* 42-48 reserved */ 69d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_DISCONNECTED 49 70e1bf0d5eSEaswar Hariharan #define OPA_LINKDOWN_REASON_LOCAL_MEDIA_NOT_INSTALLED 50 71d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_NOT_INSTALLED 51 72d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_CHASSIS_CONFIG 52 73d4ab3470SDennis Dalessandro /* 53 reserved */ 74d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_END_TO_END_NOT_INSTALLED 54 75d4ab3470SDennis Dalessandro /* 55 reserved */ 76d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_POWER_POLICY 56 77d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_LINKSPEED_POLICY 57 78d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_LINKWIDTH_POLICY 58 79d4ab3470SDennis Dalessandro /* 59 reserved */ 80d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_SWITCH_MGMT 60 81d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_SMA_DISABLED 61 82d4ab3470SDennis Dalessandro /* 62 reserved */ 83d4ab3470SDennis Dalessandro #define OPA_LINKDOWN_REASON_TRANSIENT 63 84d4ab3470SDennis Dalessandro /* 64-255 reserved */ 85d4ab3470SDennis Dalessandro 86d4ab3470SDennis Dalessandro /* OPA Link Init reason; indicated as follows: */ 87d4ab3470SDennis Dalessandro /* 3-7; 11-15 reserved; 8-15 cleared on Polling->LinkUp */ 88d4ab3470SDennis Dalessandro #define OPA_LINKINIT_REASON_NOP 0 89d4ab3470SDennis Dalessandro #define OPA_LINKINIT_REASON_LINKUP (1 << 4) 90d4ab3470SDennis Dalessandro #define OPA_LINKINIT_REASON_FLAPPING (2 << 4) 91d4ab3470SDennis Dalessandro #define OPA_LINKINIT_REASON_CLEAR (8 << 4) 92d4ab3470SDennis Dalessandro #define OPA_LINKINIT_OUTSIDE_POLICY (8 << 4) 93d4ab3470SDennis Dalessandro #define OPA_LINKINIT_QUARANTINED (9 << 4) 94d4ab3470SDennis Dalessandro #define OPA_LINKINIT_INSUFIC_CAPABILITY (10 << 4) 95d4ab3470SDennis Dalessandro 96d4ab3470SDennis Dalessandro #define OPA_LINK_SPEED_NOP 0x0000 /* Reserved (1-5 Gbps) */ 97d4ab3470SDennis Dalessandro #define OPA_LINK_SPEED_12_5G 0x0001 /* 12.5 Gbps */ 98d4ab3470SDennis Dalessandro #define OPA_LINK_SPEED_25G 0x0002 /* 25.78125? Gbps (EDR) */ 99d4ab3470SDennis Dalessandro 100d4ab3470SDennis Dalessandro #define OPA_LINK_WIDTH_1X 0x0001 101d4ab3470SDennis Dalessandro #define OPA_LINK_WIDTH_2X 0x0002 102d4ab3470SDennis Dalessandro #define OPA_LINK_WIDTH_3X 0x0004 103d4ab3470SDennis Dalessandro #define OPA_LINK_WIDTH_4X 0x0008 104d4ab3470SDennis Dalessandro 1052280740fSVishwanathapura, Niranjana #define OPA_CAP_MASK3_IsEthOnFabricSupported (1 << 13) 106d4ab3470SDennis Dalessandro #define OPA_CAP_MASK3_IsSnoopSupported (1 << 7) 107d4ab3470SDennis Dalessandro #define OPA_CAP_MASK3_IsAsyncSC2VLSupported (1 << 6) 108d4ab3470SDennis Dalessandro #define OPA_CAP_MASK3_IsAddrRangeConfigSupported (1 << 5) 109d4ab3470SDennis Dalessandro #define OPA_CAP_MASK3_IsPassThroughSupported (1 << 4) 110d4ab3470SDennis Dalessandro #define OPA_CAP_MASK3_IsSharedSpaceSupported (1 << 3) 111d4ab3470SDennis Dalessandro /* reserved (1 << 2) */ 112d4ab3470SDennis Dalessandro #define OPA_CAP_MASK3_IsVLMarkerSupported (1 << 1) 113d4ab3470SDennis Dalessandro #define OPA_CAP_MASK3_IsVLrSupported (1 << 0) 114d4ab3470SDennis Dalessandro 115d4ab3470SDennis Dalessandro enum { 116d4ab3470SDennis Dalessandro OPA_PORT_PHYS_CONF_DISCONNECTED = 0, 117d4ab3470SDennis Dalessandro OPA_PORT_PHYS_CONF_STANDARD = 1, 118d4ab3470SDennis Dalessandro OPA_PORT_PHYS_CONF_FIXED = 2, 119d4ab3470SDennis Dalessandro OPA_PORT_PHYS_CONF_VARIABLE = 3, 120d4ab3470SDennis Dalessandro OPA_PORT_PHYS_CONF_SI_PHOTO = 4 121d4ab3470SDennis Dalessandro }; 122d4ab3470SDennis Dalessandro 123d4ab3470SDennis Dalessandro enum port_info_field_masks { 124d4ab3470SDennis Dalessandro /* vl.cap */ 125d4ab3470SDennis Dalessandro OPA_PI_MASK_VL_CAP = 0x1F, 126d4ab3470SDennis Dalessandro /* port_states.ledenable_offlinereason */ 127d4ab3470SDennis Dalessandro OPA_PI_MASK_OFFLINE_REASON = 0x0F, 128d4ab3470SDennis Dalessandro OPA_PI_MASK_LED_ENABLE = 0x40, 129d4ab3470SDennis Dalessandro /* port_states.unsleepstate_downdefstate */ 130d4ab3470SDennis Dalessandro OPA_PI_MASK_UNSLEEP_STATE = 0xF0, 131d4ab3470SDennis Dalessandro OPA_PI_MASK_DOWNDEF_STATE = 0x0F, 132d4ab3470SDennis Dalessandro /* port_states.portphysstate_portstate */ 133d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_PHYSICAL_STATE = 0xF0, 134d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_STATE = 0x0F, 135d4ab3470SDennis Dalessandro /* port_phys_conf */ 136d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_PHYSICAL_CONF = 0x0F, 137d4ab3470SDennis Dalessandro /* collectivemask_multicastmask */ 138d4ab3470SDennis Dalessandro OPA_PI_MASK_COLLECT_MASK = 0x38, 139d4ab3470SDennis Dalessandro OPA_PI_MASK_MULTICAST_MASK = 0x07, 140d4ab3470SDennis Dalessandro /* mkeyprotect_lmc */ 141d4ab3470SDennis Dalessandro OPA_PI_MASK_MKEY_PROT_BIT = 0xC0, 142d4ab3470SDennis Dalessandro OPA_PI_MASK_LMC = 0x0F, 143d4ab3470SDennis Dalessandro /* smsl */ 144d4ab3470SDennis Dalessandro OPA_PI_MASK_SMSL = 0x1F, 145d4ab3470SDennis Dalessandro /* partenforce_filterraw */ 146d4ab3470SDennis Dalessandro /* Filter Raw In/Out bits 1 and 2 were removed */ 147d4ab3470SDennis Dalessandro OPA_PI_MASK_LINKINIT_REASON = 0xF0, 148d4ab3470SDennis Dalessandro OPA_PI_MASK_PARTITION_ENFORCE_IN = 0x08, 149d4ab3470SDennis Dalessandro OPA_PI_MASK_PARTITION_ENFORCE_OUT = 0x04, 150d4ab3470SDennis Dalessandro /* operational_vls */ 151d4ab3470SDennis Dalessandro OPA_PI_MASK_OPERATIONAL_VL = 0x1F, 152d4ab3470SDennis Dalessandro /* sa_qp */ 153d4ab3470SDennis Dalessandro OPA_PI_MASK_SA_QP = 0x00FFFFFF, 154d4ab3470SDennis Dalessandro /* sm_trap_qp */ 155d4ab3470SDennis Dalessandro OPA_PI_MASK_SM_TRAP_QP = 0x00FFFFFF, 156d4ab3470SDennis Dalessandro /* localphy_overrun_errors */ 157d4ab3470SDennis Dalessandro OPA_PI_MASK_LOCAL_PHY_ERRORS = 0xF0, 158d4ab3470SDennis Dalessandro OPA_PI_MASK_OVERRUN_ERRORS = 0x0F, 159d4ab3470SDennis Dalessandro /* clientrereg_subnettimeout */ 160d4ab3470SDennis Dalessandro OPA_PI_MASK_CLIENT_REREGISTER = 0x80, 161d4ab3470SDennis Dalessandro OPA_PI_MASK_SUBNET_TIMEOUT = 0x1F, 162d4ab3470SDennis Dalessandro /* port_link_mode */ 163d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_LINK_SUPPORTED = (0x001F << 10), 164d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_LINK_ENABLED = (0x001F << 5), 165d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_LINK_ACTIVE = (0x001F << 0), 166d4ab3470SDennis Dalessandro /* port_link_crc_mode */ 167d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_LINK_CRC_SUPPORTED = 0x0F00, 168d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_LINK_CRC_ENABLED = 0x00F0, 169d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_LINK_CRC_ACTIVE = 0x000F, 170d4ab3470SDennis Dalessandro /* port_mode */ 171d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_MODE_SECURITY_CHECK = 0x0001, 172d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_MODE_16B_TRAP_QUERY = 0x0002, 173d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_MODE_PKEY_CONVERT = 0x0004, 174d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_MODE_SC2SC_MAPPING = 0x0008, 175d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_MODE_VL_MARKER = 0x0010, 176d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_PASS_THROUGH = 0x0020, 177d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_ACTIVE_OPTOMIZE = 0x0040, 178d4ab3470SDennis Dalessandro /* flit_control.interleave */ 179d4ab3470SDennis Dalessandro OPA_PI_MASK_INTERLEAVE_DIST_SUP = (0x0003 << 12), 180d4ab3470SDennis Dalessandro OPA_PI_MASK_INTERLEAVE_DIST_ENABLE = (0x0003 << 10), 181d4ab3470SDennis Dalessandro OPA_PI_MASK_INTERLEAVE_MAX_NEST_TX = (0x001F << 5), 182d4ab3470SDennis Dalessandro OPA_PI_MASK_INTERLEAVE_MAX_NEST_RX = (0x001F << 0), 183d4ab3470SDennis Dalessandro 184d4ab3470SDennis Dalessandro /* port_error_action */ 185d4ab3470SDennis Dalessandro OPA_PI_MASK_EX_BUFFER_OVERRUN = 0x80000000, 186d4ab3470SDennis Dalessandro /* 7 bits reserved */ 187d4ab3470SDennis Dalessandro OPA_PI_MASK_FM_CFG_ERR_EXCEED_MULTICAST_LIMIT = 0x00800000, 188d4ab3470SDennis Dalessandro OPA_PI_MASK_FM_CFG_BAD_CONTROL_FLIT = 0x00400000, 189d4ab3470SDennis Dalessandro OPA_PI_MASK_FM_CFG_BAD_PREEMPT = 0x00200000, 190d4ab3470SDennis Dalessandro OPA_PI_MASK_FM_CFG_UNSUPPORTED_VL_MARKER = 0x00100000, 191d4ab3470SDennis Dalessandro OPA_PI_MASK_FM_CFG_BAD_CRDT_ACK = 0x00080000, 192d4ab3470SDennis Dalessandro OPA_PI_MASK_FM_CFG_BAD_CTRL_DIST = 0x00040000, 193d4ab3470SDennis Dalessandro OPA_PI_MASK_FM_CFG_BAD_TAIL_DIST = 0x00020000, 194d4ab3470SDennis Dalessandro OPA_PI_MASK_FM_CFG_BAD_HEAD_DIST = 0x00010000, 195d4ab3470SDennis Dalessandro /* 2 bits reserved */ 196d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_BAD_VL_MARKER = 0x00002000, 197d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_PREEMPT_VL15 = 0x00001000, 198d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_PREEMPT_ERROR = 0x00000800, 199d4ab3470SDennis Dalessandro /* 1 bit reserved */ 200d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_BAD_MidTail = 0x00000200, 201d4ab3470SDennis Dalessandro /* 1 bit reserved */ 202d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_BAD_SC = 0x00000080, 203d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_BAD_L2 = 0x00000040, 204d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_BAD_DLID = 0x00000020, 205d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_BAD_SLID = 0x00000010, 206d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_PKTLEN_TOOSHORT = 0x00000008, 207d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_PKTLEN_TOOLONG = 0x00000004, 208d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_BAD_PKTLEN = 0x00000002, 209d4ab3470SDennis Dalessandro OPA_PI_MASK_PORT_RCV_BAD_LT = 0x00000001, 210d4ab3470SDennis Dalessandro 211d4ab3470SDennis Dalessandro /* pass_through.res_drctl */ 212d4ab3470SDennis Dalessandro OPA_PI_MASK_PASS_THROUGH_DR_CONTROL = 0x01, 213d4ab3470SDennis Dalessandro 214d4ab3470SDennis Dalessandro /* buffer_units */ 215d4ab3470SDennis Dalessandro OPA_PI_MASK_BUF_UNIT_VL15_INIT = (0x00000FFF << 11), 216d4ab3470SDennis Dalessandro OPA_PI_MASK_BUF_UNIT_VL15_CREDIT_RATE = (0x0000001F << 6), 217d4ab3470SDennis Dalessandro OPA_PI_MASK_BUF_UNIT_CREDIT_ACK = (0x00000003 << 3), 218d4ab3470SDennis Dalessandro OPA_PI_MASK_BUF_UNIT_BUF_ALLOC = (0x00000003 << 0), 219d4ab3470SDennis Dalessandro 220d4ab3470SDennis Dalessandro /* neigh_mtu.pvlx_to_mtu */ 221d4ab3470SDennis Dalessandro OPA_PI_MASK_NEIGH_MTU_PVL0 = 0xF0, 222d4ab3470SDennis Dalessandro OPA_PI_MASK_NEIGH_MTU_PVL1 = 0x0F, 223d4ab3470SDennis Dalessandro 224d4ab3470SDennis Dalessandro /* neigh_mtu.vlstall_hoq_life */ 225d4ab3470SDennis Dalessandro OPA_PI_MASK_VL_STALL = (0x03 << 5), 226d4ab3470SDennis Dalessandro OPA_PI_MASK_HOQ_LIFE = (0x1F << 0), 227d4ab3470SDennis Dalessandro 228d4ab3470SDennis Dalessandro /* port_neigh_mode */ 229d4ab3470SDennis Dalessandro OPA_PI_MASK_NEIGH_MGMT_ALLOWED = (0x01 << 3), 230d4ab3470SDennis Dalessandro OPA_PI_MASK_NEIGH_FW_AUTH_BYPASS = (0x01 << 2), 231d4ab3470SDennis Dalessandro OPA_PI_MASK_NEIGH_NODE_TYPE = (0x03 << 0), 232d4ab3470SDennis Dalessandro 233d4ab3470SDennis Dalessandro /* resptime_value */ 234d4ab3470SDennis Dalessandro OPA_PI_MASK_RESPONSE_TIME_VALUE = 0x1F, 235d4ab3470SDennis Dalessandro 236d4ab3470SDennis Dalessandro /* mtucap */ 237d4ab3470SDennis Dalessandro OPA_PI_MASK_MTU_CAP = 0x0F, 238d4ab3470SDennis Dalessandro }; 239d4ab3470SDennis Dalessandro 240d4ab3470SDennis Dalessandro struct opa_port_states { 241d4ab3470SDennis Dalessandro u8 reserved; 242d4ab3470SDennis Dalessandro u8 ledenable_offlinereason; /* 1 res, 1 bit, 6 bits */ 243d4ab3470SDennis Dalessandro u8 reserved2; 244d4ab3470SDennis Dalessandro u8 portphysstate_portstate; /* 4 bits, 4 bits */ 245d4ab3470SDennis Dalessandro }; 246d4ab3470SDennis Dalessandro 247d4ab3470SDennis Dalessandro struct opa_port_state_info { 248d4ab3470SDennis Dalessandro struct opa_port_states port_states; 249aadfc3b2SIra Weiny __be16 link_width_downgrade_tx_active; 250aadfc3b2SIra Weiny __be16 link_width_downgrade_rx_active; 251d4ab3470SDennis Dalessandro }; 252d4ab3470SDennis Dalessandro 253d4ab3470SDennis Dalessandro struct opa_port_info { 254d4ab3470SDennis Dalessandro __be32 lid; 255d4ab3470SDennis Dalessandro __be32 flow_control_mask; 256d4ab3470SDennis Dalessandro 257d4ab3470SDennis Dalessandro struct { 258d4ab3470SDennis Dalessandro u8 res; /* was inittype */ 259d4ab3470SDennis Dalessandro u8 cap; /* 3 res, 5 bits */ 260d4ab3470SDennis Dalessandro __be16 high_limit; 261d4ab3470SDennis Dalessandro __be16 preempt_limit; 262d4ab3470SDennis Dalessandro u8 arb_high_cap; 263d4ab3470SDennis Dalessandro u8 arb_low_cap; 264d4ab3470SDennis Dalessandro } vl; 265d4ab3470SDennis Dalessandro 266d4ab3470SDennis Dalessandro struct opa_port_states port_states; 267d4ab3470SDennis Dalessandro u8 port_phys_conf; /* 4 res, 4 bits */ 268d4ab3470SDennis Dalessandro u8 collectivemask_multicastmask; /* 2 res, 3, 3 */ 269d4ab3470SDennis Dalessandro u8 mkeyprotect_lmc; /* 2 bits, 2 res, 4 bits */ 270d4ab3470SDennis Dalessandro u8 smsl; /* 3 res, 5 bits */ 271d4ab3470SDennis Dalessandro 272d4ab3470SDennis Dalessandro u8 partenforce_filterraw; /* bit fields */ 273d4ab3470SDennis Dalessandro u8 operational_vls; /* 3 res, 5 bits */ 274d4ab3470SDennis Dalessandro __be16 pkey_8b; 275d4ab3470SDennis Dalessandro __be16 pkey_10b; 276d4ab3470SDennis Dalessandro __be16 mkey_violations; 277d4ab3470SDennis Dalessandro 278d4ab3470SDennis Dalessandro __be16 pkey_violations; 279d4ab3470SDennis Dalessandro __be16 qkey_violations; 280d4ab3470SDennis Dalessandro __be32 sm_trap_qp; /* 8 bits, 24 bits */ 281d4ab3470SDennis Dalessandro 282d4ab3470SDennis Dalessandro __be32 sa_qp; /* 8 bits, 24 bits */ 283d4ab3470SDennis Dalessandro u8 neigh_port_num; 284d4ab3470SDennis Dalessandro u8 link_down_reason; 285d4ab3470SDennis Dalessandro u8 neigh_link_down_reason; 286d4ab3470SDennis Dalessandro u8 clientrereg_subnettimeout; /* 1 bit, 2 bits, 5 */ 287d4ab3470SDennis Dalessandro 288d4ab3470SDennis Dalessandro struct { 289d4ab3470SDennis Dalessandro __be16 supported; 290d4ab3470SDennis Dalessandro __be16 enabled; 291d4ab3470SDennis Dalessandro __be16 active; 292d4ab3470SDennis Dalessandro } link_speed; 293d4ab3470SDennis Dalessandro struct { 294d4ab3470SDennis Dalessandro __be16 supported; 295d4ab3470SDennis Dalessandro __be16 enabled; 296d4ab3470SDennis Dalessandro __be16 active; 297d4ab3470SDennis Dalessandro } link_width; 298d4ab3470SDennis Dalessandro struct { 299d4ab3470SDennis Dalessandro __be16 supported; 300d4ab3470SDennis Dalessandro __be16 enabled; 301d4ab3470SDennis Dalessandro __be16 tx_active; 302d4ab3470SDennis Dalessandro __be16 rx_active; 303d4ab3470SDennis Dalessandro } link_width_downgrade; 304d4ab3470SDennis Dalessandro __be16 port_link_mode; /* 1 res, 5 bits, 5 bits, 5 bits */ 305d4ab3470SDennis Dalessandro __be16 port_ltp_crc_mode; /* 4 res, 4 bits, 4 bits, 4 bits */ 306d4ab3470SDennis Dalessandro 307d4ab3470SDennis Dalessandro __be16 port_mode; /* 9 res, bit fields */ 308d4ab3470SDennis Dalessandro struct { 309d4ab3470SDennis Dalessandro __be16 supported; 310d4ab3470SDennis Dalessandro __be16 enabled; 311d4ab3470SDennis Dalessandro } port_packet_format; 312d4ab3470SDennis Dalessandro struct { 313d4ab3470SDennis Dalessandro __be16 interleave; /* 2 res, 2,2,5,5 */ 314d4ab3470SDennis Dalessandro struct { 315d4ab3470SDennis Dalessandro __be16 min_initial; 316d4ab3470SDennis Dalessandro __be16 min_tail; 317d4ab3470SDennis Dalessandro u8 large_pkt_limit; 318d4ab3470SDennis Dalessandro u8 small_pkt_limit; 319d4ab3470SDennis Dalessandro u8 max_small_pkt_limit; 320d4ab3470SDennis Dalessandro u8 preemption_limit; 321d4ab3470SDennis Dalessandro } preemption; 322d4ab3470SDennis Dalessandro } flit_control; 323d4ab3470SDennis Dalessandro 324d4ab3470SDennis Dalessandro __be32 reserved4; 325d4ab3470SDennis Dalessandro __be32 port_error_action; /* bit field */ 326d4ab3470SDennis Dalessandro 327d4ab3470SDennis Dalessandro struct { 328d4ab3470SDennis Dalessandro u8 egress_port; 329d4ab3470SDennis Dalessandro u8 res_drctl; /* 7 res, 1 */ 330d4ab3470SDennis Dalessandro } pass_through; 331d4ab3470SDennis Dalessandro __be16 mkey_lease_period; 332d4ab3470SDennis Dalessandro __be32 buffer_units; /* 9 res, 12, 5, 3, 3 */ 333d4ab3470SDennis Dalessandro 334d4ab3470SDennis Dalessandro __be32 reserved5; 335d4ab3470SDennis Dalessandro __be32 sm_lid; 336d4ab3470SDennis Dalessandro 337d4ab3470SDennis Dalessandro __be64 mkey; 338d4ab3470SDennis Dalessandro 339d4ab3470SDennis Dalessandro __be64 subnet_prefix; 340d4ab3470SDennis Dalessandro 341d4ab3470SDennis Dalessandro struct { 342d4ab3470SDennis Dalessandro u8 pvlx_to_mtu[OPA_MAX_VLS/2]; /* 4 bits, 4 bits */ 343d4ab3470SDennis Dalessandro } neigh_mtu; 344d4ab3470SDennis Dalessandro 345d4ab3470SDennis Dalessandro struct { 346d4ab3470SDennis Dalessandro u8 vlstall_hoqlife; /* 3 bits, 5 bits */ 347d4ab3470SDennis Dalessandro } xmit_q[OPA_MAX_VLS]; 348d4ab3470SDennis Dalessandro 349d4ab3470SDennis Dalessandro struct { 350d4ab3470SDennis Dalessandro u8 addr[16]; 351d4ab3470SDennis Dalessandro } ipaddr_ipv6; 352d4ab3470SDennis Dalessandro 353d4ab3470SDennis Dalessandro struct { 354d4ab3470SDennis Dalessandro u8 addr[4]; 355d4ab3470SDennis Dalessandro } ipaddr_ipv4; 356d4ab3470SDennis Dalessandro 357d4ab3470SDennis Dalessandro u32 reserved6; 358d4ab3470SDennis Dalessandro u32 reserved7; 359d4ab3470SDennis Dalessandro u32 reserved8; 360d4ab3470SDennis Dalessandro 361d4ab3470SDennis Dalessandro __be64 neigh_node_guid; 362d4ab3470SDennis Dalessandro 363d4ab3470SDennis Dalessandro __be32 ib_cap_mask; 364d4ab3470SDennis Dalessandro __be16 reserved9; /* was ib_cap_mask2 */ 365d4ab3470SDennis Dalessandro __be16 opa_cap_mask; 366d4ab3470SDennis Dalessandro 367d4ab3470SDennis Dalessandro __be32 reserved10; /* was link_roundtrip_latency */ 368d4ab3470SDennis Dalessandro __be16 overall_buffer_space; 369d4ab3470SDennis Dalessandro __be16 reserved11; /* was max_credit_hint */ 370d4ab3470SDennis Dalessandro 371d4ab3470SDennis Dalessandro __be16 diag_code; 372d4ab3470SDennis Dalessandro struct { 373d4ab3470SDennis Dalessandro u8 buffer; 374d4ab3470SDennis Dalessandro u8 wire; 375d4ab3470SDennis Dalessandro } replay_depth; 376d4ab3470SDennis Dalessandro u8 port_neigh_mode; 377d4ab3470SDennis Dalessandro u8 mtucap; /* 4 res, 4 bits */ 378d4ab3470SDennis Dalessandro 379d4ab3470SDennis Dalessandro u8 resptimevalue; /* 3 res, 5 bits */ 380d4ab3470SDennis Dalessandro u8 local_port_num; 381d4ab3470SDennis Dalessandro u8 reserved12; 382d4ab3470SDennis Dalessandro u8 reserved13; /* was guid_cap */ 38319b1a294SErez Alfasi } __packed; 384d4ab3470SDennis Dalessandro 385d4ab3470SDennis Dalessandro #endif /* OPA_PORT_INFO_H */ 386