16f6387aeSDennis Dalessandro #ifndef DEF_RDMAVT_INCCQ_H 26f6387aeSDennis Dalessandro #define DEF_RDMAVT_INCCQ_H 36f6387aeSDennis Dalessandro 46f6387aeSDennis Dalessandro /* 56f6387aeSDennis Dalessandro * 66f6387aeSDennis Dalessandro * This file is provided under a dual BSD/GPLv2 license. When using or 76f6387aeSDennis Dalessandro * redistributing this file, you may do so under either license. 86f6387aeSDennis Dalessandro * 96f6387aeSDennis Dalessandro * GPL LICENSE SUMMARY 106f6387aeSDennis Dalessandro * 115d18ee67SSebastian Sanchez * Copyright(c) 2016 - 2018 Intel Corporation. 126f6387aeSDennis Dalessandro * 136f6387aeSDennis Dalessandro * This program is free software; you can redistribute it and/or modify 146f6387aeSDennis Dalessandro * it under the terms of version 2 of the GNU General Public License as 156f6387aeSDennis Dalessandro * published by the Free Software Foundation. 166f6387aeSDennis Dalessandro * 176f6387aeSDennis Dalessandro * This program is distributed in the hope that it will be useful, but 186f6387aeSDennis Dalessandro * WITHOUT ANY WARRANTY; without even the implied warranty of 196f6387aeSDennis Dalessandro * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 206f6387aeSDennis Dalessandro * General Public License for more details. 216f6387aeSDennis Dalessandro * 226f6387aeSDennis Dalessandro * BSD LICENSE 236f6387aeSDennis Dalessandro * 246f6387aeSDennis Dalessandro * Copyright(c) 2015 Intel Corporation. 256f6387aeSDennis Dalessandro * 266f6387aeSDennis Dalessandro * Redistribution and use in source and binary forms, with or without 276f6387aeSDennis Dalessandro * modification, are permitted provided that the following conditions 286f6387aeSDennis Dalessandro * are met: 296f6387aeSDennis Dalessandro * 306f6387aeSDennis Dalessandro * - Redistributions of source code must retain the above copyright 316f6387aeSDennis Dalessandro * notice, this list of conditions and the following disclaimer. 326f6387aeSDennis Dalessandro * - Redistributions in binary form must reproduce the above copyright 336f6387aeSDennis Dalessandro * notice, this list of conditions and the following disclaimer in 346f6387aeSDennis Dalessandro * the documentation and/or other materials provided with the 356f6387aeSDennis Dalessandro * distribution. 366f6387aeSDennis Dalessandro * - Neither the name of Intel Corporation nor the names of its 376f6387aeSDennis Dalessandro * contributors may be used to endorse or promote products derived 386f6387aeSDennis Dalessandro * from this software without specific prior written permission. 396f6387aeSDennis Dalessandro * 406f6387aeSDennis Dalessandro * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 416f6387aeSDennis Dalessandro * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 426f6387aeSDennis Dalessandro * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 436f6387aeSDennis Dalessandro * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 446f6387aeSDennis Dalessandro * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 456f6387aeSDennis Dalessandro * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 466f6387aeSDennis Dalessandro * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 476f6387aeSDennis Dalessandro * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 486f6387aeSDennis Dalessandro * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 496f6387aeSDennis Dalessandro * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 506f6387aeSDennis Dalessandro * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 516f6387aeSDennis Dalessandro * 526f6387aeSDennis Dalessandro */ 536f6387aeSDennis Dalessandro 546f6387aeSDennis Dalessandro #include <linux/kthread.h> 556f6387aeSDennis Dalessandro #include <rdma/ib_user_verbs.h> 566f6387aeSDennis Dalessandro 576f6387aeSDennis Dalessandro /* 586f6387aeSDennis Dalessandro * Define an ib_cq_notify value that is not valid so we know when CQ 596f6387aeSDennis Dalessandro * notifications are armed. 606f6387aeSDennis Dalessandro */ 616f6387aeSDennis Dalessandro #define RVT_CQ_NONE (IB_CQ_NEXT_COMP + 1) 626f6387aeSDennis Dalessandro 636f6387aeSDennis Dalessandro /* 64239b0e52SKamenee Arumugam * Define read macro that apply smp_load_acquire memory barrier 65239b0e52SKamenee Arumugam * when reading indice of circular buffer that mmaped to user space. 66239b0e52SKamenee Arumugam */ 67239b0e52SKamenee Arumugam #define RDMA_READ_UAPI_ATOMIC(member) smp_load_acquire(&(member).val) 68239b0e52SKamenee Arumugam 69239b0e52SKamenee Arumugam /* 70239b0e52SKamenee Arumugam * Define write macro that uses smp_store_release memory barrier 71239b0e52SKamenee Arumugam * when writing indice of circular buffer that mmaped to user space. 72239b0e52SKamenee Arumugam */ 73239b0e52SKamenee Arumugam #define RDMA_WRITE_UAPI_ATOMIC(member, x) smp_store_release(&(member).val, x) 74239b0e52SKamenee Arumugam #include <rdma/rvt-abi.h> 75239b0e52SKamenee Arumugam 76239b0e52SKamenee Arumugam /* 776f6387aeSDennis Dalessandro * This structure is used to contain the head pointer, tail pointer, 786f6387aeSDennis Dalessandro * and completion queue entries as a single memory allocation so 796f6387aeSDennis Dalessandro * it can be mmap'ed into user space. 806f6387aeSDennis Dalessandro */ 81239b0e52SKamenee Arumugam struct rvt_k_cq_wc { 826f6387aeSDennis Dalessandro u32 head; /* index of next entry to fill */ 836f6387aeSDennis Dalessandro u32 tail; /* index of next ib_poll_cq() entry */ 84239b0e52SKamenee Arumugam struct ib_wc kqueue[]; 856f6387aeSDennis Dalessandro }; 866f6387aeSDennis Dalessandro 876f6387aeSDennis Dalessandro /* 886f6387aeSDennis Dalessandro * The completion queue structure. 896f6387aeSDennis Dalessandro */ 906f6387aeSDennis Dalessandro struct rvt_cq { 916f6387aeSDennis Dalessandro struct ib_cq ibcq; 925d18ee67SSebastian Sanchez struct work_struct comptask; 936f6387aeSDennis Dalessandro spinlock_t lock; /* protect changes in this struct */ 946f6387aeSDennis Dalessandro u8 notify; 956f6387aeSDennis Dalessandro u8 triggered; 96*5136bfeaSKamenee Arumugam u8 cq_full; 975d18ee67SSebastian Sanchez int comp_vector_cpu; 986f6387aeSDennis Dalessandro struct rvt_dev_info *rdi; 996f6387aeSDennis Dalessandro struct rvt_cq_wc *queue; 1006f6387aeSDennis Dalessandro struct rvt_mmap_info *ip; 101239b0e52SKamenee Arumugam struct rvt_k_cq_wc *kqueue; 1026f6387aeSDennis Dalessandro }; 1036f6387aeSDennis Dalessandro 1046f6387aeSDennis Dalessandro static inline struct rvt_cq *ibcq_to_rvtcq(struct ib_cq *ibcq) 1056f6387aeSDennis Dalessandro { 1066f6387aeSDennis Dalessandro return container_of(ibcq, struct rvt_cq, ibcq); 1076f6387aeSDennis Dalessandro } 1086f6387aeSDennis Dalessandro 109*5136bfeaSKamenee Arumugam bool rvt_cq_enter(struct rvt_cq *cq, struct ib_wc *entry, bool solicited); 1106f6387aeSDennis Dalessandro 1116f6387aeSDennis Dalessandro #endif /* DEF_RDMAVT_INCCQH */ 112