1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Common definitions for Cirrus Logic CS35L56 smart amp 4 * 5 * Copyright (C) 2023 Cirrus Logic, Inc. and 6 * Cirrus Logic International Semiconductor Ltd. 7 */ 8 9 #ifndef __CS35L56_H 10 #define __CS35L56_H 11 12 #include <linux/firmware/cirrus/cs_dsp.h> 13 #include <linux/regulator/consumer.h> 14 #include <linux/regmap.h> 15 16 #define CS35L56_DEVID 0x0000000 17 #define CS35L56_REVID 0x0000004 18 #define CS35L56_RELID 0x000000C 19 #define CS35L56_OTPID 0x0000010 20 #define CS35L56_SFT_RESET 0x0000020 21 #define CS35L56_GLOBAL_ENABLES 0x0002014 22 #define CS35L56_BLOCK_ENABLES 0x0002018 23 #define CS35L56_BLOCK_ENABLES2 0x000201C 24 #define CS35L56_REFCLK_INPUT 0x0002C04 25 #define CS35L56_GLOBAL_SAMPLE_RATE 0x0002C0C 26 #define CS35L56_ASP1_ENABLES1 0x0004800 27 #define CS35L56_ASP1_CONTROL1 0x0004804 28 #define CS35L56_ASP1_CONTROL2 0x0004808 29 #define CS35L56_ASP1_CONTROL3 0x000480C 30 #define CS35L56_ASP1_FRAME_CONTROL1 0x0004810 31 #define CS35L56_ASP1_FRAME_CONTROL5 0x0004820 32 #define CS35L56_ASP1_DATA_CONTROL1 0x0004830 33 #define CS35L56_ASP1_DATA_CONTROL5 0x0004840 34 #define CS35L56_DACPCM1_INPUT 0x0004C00 35 #define CS35L56_DACPCM2_INPUT 0x0004C08 36 #define CS35L56_ASP1TX1_INPUT 0x0004C20 37 #define CS35L56_ASP1TX2_INPUT 0x0004C24 38 #define CS35L56_ASP1TX3_INPUT 0x0004C28 39 #define CS35L56_ASP1TX4_INPUT 0x0004C2C 40 #define CS35L56_DSP1RX1_INPUT 0x0004C40 41 #define CS35L56_DSP1RX2_INPUT 0x0004C44 42 #define CS35L56_SWIRE_DP3_CH1_INPUT 0x0004C70 43 #define CS35L56_SWIRE_DP3_CH2_INPUT 0x0004C74 44 #define CS35L56_SWIRE_DP3_CH3_INPUT 0x0004C78 45 #define CS35L56_SWIRE_DP3_CH4_INPUT 0x0004C7C 46 #define CS35L56_IRQ1_CFG 0x000E000 47 #define CS35L56_IRQ1_STATUS 0x000E004 48 #define CS35L56_IRQ1_EINT_1 0x000E010 49 #define CS35L56_IRQ1_EINT_2 0x000E014 50 #define CS35L56_IRQ1_EINT_4 0x000E01C 51 #define CS35L56_IRQ1_EINT_8 0x000E02C 52 #define CS35L56_IRQ1_EINT_18 0x000E054 53 #define CS35L56_IRQ1_EINT_20 0x000E05C 54 #define CS35L56_IRQ1_MASK_1 0x000E090 55 #define CS35L56_IRQ1_MASK_2 0x000E094 56 #define CS35L56_IRQ1_MASK_4 0x000E09C 57 #define CS35L56_IRQ1_MASK_8 0x000E0AC 58 #define CS35L56_IRQ1_MASK_18 0x000E0D4 59 #define CS35L56_IRQ1_MASK_20 0x000E0DC 60 #define CS35L56_DSP_VIRTUAL1_MBOX_1 0x0011020 61 #define CS35L56_DSP_VIRTUAL1_MBOX_2 0x0011024 62 #define CS35L56_DSP_VIRTUAL1_MBOX_3 0x0011028 63 #define CS35L56_DSP_VIRTUAL1_MBOX_4 0x001102C 64 #define CS35L56_DSP_VIRTUAL1_MBOX_5 0x0011030 65 #define CS35L56_DSP_VIRTUAL1_MBOX_6 0x0011034 66 #define CS35L56_DSP_VIRTUAL1_MBOX_7 0x0011038 67 #define CS35L56_DSP_VIRTUAL1_MBOX_8 0x001103C 68 #define CS35L56_DSP_RESTRICT_STS1 0x00190F0 69 #define CS35L56_DSP1_XMEM_PACKED_0 0x2000000 70 #define CS35L56_DSP1_XMEM_PACKED_6143 0x2005FFC 71 #define CS35L56_DSP1_XMEM_UNPACKED32_0 0x2400000 72 #define CS35L56_DSP1_XMEM_UNPACKED32_4095 0x2403FFC 73 #define CS35L56_DSP1_SYS_INFO_ID 0x25E0000 74 #define CS35L56_DSP1_SYS_INFO_END 0x25E004C 75 #define CS35L56_DSP1_AHBM_WINDOW_DEBUG_0 0x25E2040 76 #define CS35L56_DSP1_AHBM_WINDOW_DEBUG_1 0x25E2044 77 #define CS35L56_DSP1_XMEM_UNPACKED24_0 0x2800000 78 #define CS35L56_DSP1_FW_VER 0x2800010 79 #define CS35L56_DSP1_HALO_STATE_A1 0x2801E58 80 #define CS35L56_DSP1_HALO_STATE 0x28021E0 81 #define CS35L56_DSP1_PM_CUR_STATE_A1 0x2804000 82 #define CS35L56_DSP1_PM_CUR_STATE 0x2804308 83 #define CS35L56_DSP1_XMEM_UNPACKED24_8191 0x2807FFC 84 #define CS35L56_DSP1_CORE_BASE 0x2B80000 85 #define CS35L56_DSP1_SCRATCH1 0x2B805C0 86 #define CS35L56_DSP1_SCRATCH2 0x2B805C8 87 #define CS35L56_DSP1_SCRATCH3 0x2B805D0 88 #define CS35L56_DSP1_SCRATCH4 0x2B805D8 89 #define CS35L56_DSP1_YMEM_PACKED_0 0x2C00000 90 #define CS35L56_DSP1_YMEM_PACKED_4604 0x2C047F0 91 #define CS35L56_DSP1_YMEM_UNPACKED32_0 0x3000000 92 #define CS35L56_DSP1_YMEM_UNPACKED32_3070 0x3002FF8 93 #define CS35L56_DSP1_YMEM_UNPACKED24_0 0x3400000 94 #define CS35L56_MAIN_RENDER_USER_MUTE 0x3400024 95 #define CS35L56_MAIN_RENDER_USER_VOLUME 0x340002C 96 #define CS35L56_MAIN_POSTURE_NUMBER 0x3400094 97 #define CS35L56_PROTECTION_STATUS 0x34000D8 98 #define CS35L56_TRANSDUCER_ACTUAL_PS 0x3400150 99 #define CS35L56_DSP1_YMEM_UNPACKED24_6141 0x3405FF4 100 #define CS35L56_DSP1_PMEM_0 0x3800000 101 #define CS35L56_DSP1_PMEM_5114 0x3804FE8 102 103 /* DEVID */ 104 #define CS35L56_DEVID_MASK 0x00FFFFFF 105 106 /* REVID */ 107 #define CS35L56_AREVID_MASK 0x000000F0 108 #define CS35L56_MTLREVID_MASK 0x0000000F 109 #define CS35L56_REVID_B0 0x000000B0 110 111 /* ASP_ENABLES1 */ 112 #define CS35L56_ASP_RX2_EN_SHIFT 17 113 #define CS35L56_ASP_RX1_EN_SHIFT 16 114 #define CS35L56_ASP_TX4_EN_SHIFT 3 115 #define CS35L56_ASP_TX3_EN_SHIFT 2 116 #define CS35L56_ASP_TX2_EN_SHIFT 1 117 #define CS35L56_ASP_TX1_EN_SHIFT 0 118 119 /* ASP_CONTROL1 */ 120 #define CS35L56_ASP_BCLK_FREQ_MASK 0x0000003F 121 #define CS35L56_ASP_BCLK_FREQ_SHIFT 0 122 123 /* ASP_CONTROL2 */ 124 #define CS35L56_ASP_RX_WIDTH_MASK 0xFF000000 125 #define CS35L56_ASP_RX_WIDTH_SHIFT 24 126 #define CS35L56_ASP_TX_WIDTH_MASK 0x00FF0000 127 #define CS35L56_ASP_TX_WIDTH_SHIFT 16 128 #define CS35L56_ASP_FMT_MASK 0x00000700 129 #define CS35L56_ASP_FMT_SHIFT 8 130 #define CS35L56_ASP_BCLK_INV_MASK 0x00000040 131 #define CS35L56_ASP_FSYNC_INV_MASK 0x00000004 132 133 /* ASP_CONTROL3 */ 134 #define CS35L56_ASP1_DOUT_HIZ_CTRL_MASK 0x00000003 135 136 /* ASP_DATA_CONTROL1 */ 137 #define CS35L56_ASP_TX_WL_MASK 0x0000003F 138 139 /* ASP_DATA_CONTROL5 */ 140 #define CS35L56_ASP_RX_WL_MASK 0x0000003F 141 142 /* ASPTXn_INPUT */ 143 #define CS35L56_ASP_TXn_SRC_MASK 0x0000007F 144 145 /* SWIRETX[1..7]_SRC SDWTXn INPUT */ 146 #define CS35L56_SWIRETXn_SRC_MASK 0x0000007F 147 148 /* IRQ1_STATUS */ 149 #define CS35L56_IRQ1_STS_MASK 0x00000001 150 151 /* IRQ1_EINT_1 */ 152 #define CS35L56_AMP_SHORT_ERR_EINT1_MASK 0x80000000 153 154 /* IRQ1_EINT_2 */ 155 #define CS35L56_DSP_VIRTUAL2_MBOX_WR_EINT1_MASK 0x00200000 156 157 /* IRQ1_EINT_4 */ 158 #define CS35L56_OTP_BOOT_DONE_MASK 0x00000002 159 160 /* IRQ1_EINT_8 */ 161 #define CS35L56_TEMP_ERR_EINT1_MASK 0x80000000 162 163 /* Mixer input sources */ 164 #define CS35L56_INPUT_SRC_NONE 0x00 165 #define CS35L56_INPUT_SRC_ASP1RX1 0x08 166 #define CS35L56_INPUT_SRC_ASP1RX2 0x09 167 #define CS35L56_INPUT_SRC_VMON 0x18 168 #define CS35L56_INPUT_SRC_IMON 0x19 169 #define CS35L56_INPUT_SRC_ERR_VOL 0x20 170 #define CS35L56_INPUT_SRC_CLASSH 0x21 171 #define CS35L56_INPUT_SRC_VDDBMON 0x28 172 #define CS35L56_INPUT_SRC_VBSTMON 0x29 173 #define CS35L56_INPUT_SRC_DSP1TX1 0x32 174 #define CS35L56_INPUT_SRC_DSP1TX2 0x33 175 #define CS35L56_INPUT_SRC_DSP1TX3 0x34 176 #define CS35L56_INPUT_SRC_DSP1TX4 0x35 177 #define CS35L56_INPUT_SRC_DSP1TX5 0x36 178 #define CS35L56_INPUT_SRC_DSP1TX6 0x37 179 #define CS35L56_INPUT_SRC_DSP1TX7 0x38 180 #define CS35L56_INPUT_SRC_DSP1TX8 0x39 181 #define CS35L56_INPUT_SRC_TEMPMON 0x3A 182 #define CS35L56_INPUT_SRC_INTERPOLATOR 0x40 183 #define CS35L56_INPUT_SRC_SWIRE_DP1_CHANNEL1 0x44 184 #define CS35L56_INPUT_SRC_SWIRE_DP1_CHANNEL2 0x45 185 #define CS35L56_INPUT_MASK 0x7F 186 187 #define CS35L56_NUM_INPUT_SRC 21 188 189 /* ASP formats */ 190 #define CS35L56_ASP_FMT_DSP_A 0 191 #define CS35L56_ASP_FMT_I2S 2 192 193 /* ASP HiZ modes */ 194 #define CS35L56_ASP_UNUSED_HIZ_OFF_HIZ 3 195 196 /* MAIN_RENDER_ACTUAL_PS */ 197 #define CS35L56_PS0 0 198 #define CS35L56_PS3 3 199 200 /* CS35L56_DSP_RESTRICT_STS1 */ 201 #define CS35L56_RESTRICTED_MASK 0x7 202 203 /* CS35L56_MAIN_RENDER_USER_MUTE */ 204 #define CS35L56_MAIN_RENDER_USER_MUTE_MASK 1 205 206 /* CS35L56_MAIN_RENDER_USER_VOLUME */ 207 #define CS35L56_MAIN_RENDER_USER_VOLUME_MIN -400 208 #define CS35L56_MAIN_RENDER_USER_VOLUME_MAX 400 209 #define CS35L56_MAIN_RENDER_USER_VOLUME_MASK 0x0000FFC0 210 #define CS35L56_MAIN_RENDER_USER_VOLUME_SHIFT 6 211 #define CS35L56_MAIN_RENDER_USER_VOLUME_SIGNBIT 9 212 213 /* CS35L56_MAIN_POSTURE_NUMBER */ 214 #define CS35L56_MAIN_POSTURE_MIN 0 215 #define CS35L56_MAIN_POSTURE_MAX 255 216 #define CS35L56_MAIN_POSTURE_MASK CS35L56_MAIN_POSTURE_MAX 217 218 /* CS35L56_PROTECTION_STATUS */ 219 #define CS35L56_FIRMWARE_MISSING BIT(0) 220 221 /* Software Values */ 222 #define CS35L56_HALO_STATE_SHUTDOWN 1 223 #define CS35L56_HALO_STATE_BOOT_DONE 2 224 225 #define CS35L56_MBOX_CMD_AUDIO_PLAY 0x0B000001 226 #define CS35L56_MBOX_CMD_AUDIO_PAUSE 0x0B000002 227 #define CS35L56_MBOX_CMD_AUDIO_REINIT 0x0B000003 228 #define CS35L56_MBOX_CMD_HIBERNATE_NOW 0x02000001 229 #define CS35L56_MBOX_CMD_WAKEUP 0x02000002 230 #define CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE 0x02000003 231 #define CS35L56_MBOX_CMD_ALLOW_AUTO_HIBERNATE 0x02000004 232 #define CS35L56_MBOX_CMD_SHUTDOWN 0x02000005 233 #define CS35L56_MBOX_CMD_SYSTEM_RESET 0x02000007 234 235 #define CS35L56_MBOX_TIMEOUT_US 5000 236 #define CS35L56_MBOX_POLL_US 250 237 238 #define CS35L56_PS0_POLL_US 500 239 #define CS35L56_PS0_TIMEOUT_US 50000 240 #define CS35L56_PS3_POLL_US 500 241 #define CS35L56_PS3_TIMEOUT_US 300000 242 243 #define CS35L56_CONTROL_PORT_READY_US 2200 244 #define CS35L56_HALO_STATE_POLL_US 1000 245 #define CS35L56_HALO_STATE_TIMEOUT_US 250000 246 #define CS35L56_RESET_PULSE_MIN_US 1100 247 #define CS35L56_WAKE_HOLD_TIME_US 1000 248 249 #define CS35L56_SDW1_PLAYBACK_PORT 1 250 #define CS35L56_SDW1_CAPTURE_PORT 3 251 252 #define CS35L56_NUM_BULK_SUPPLIES 3 253 #define CS35L56_NUM_DSP_REGIONS 5 254 255 struct cs35l56_base { 256 struct device *dev; 257 struct regmap *regmap; 258 int irq; 259 struct mutex irq_lock; 260 u8 rev; 261 bool init_done; 262 bool fw_patched; 263 bool secured; 264 bool can_hibernate; 265 struct gpio_desc *reset_gpio; 266 }; 267 268 extern struct regmap_config cs35l56_regmap_i2c; 269 extern struct regmap_config cs35l56_regmap_spi; 270 extern struct regmap_config cs35l56_regmap_sdw; 271 272 extern const char * const cs35l56_tx_input_texts[CS35L56_NUM_INPUT_SRC]; 273 extern const unsigned int cs35l56_tx_input_values[CS35L56_NUM_INPUT_SRC]; 274 275 int cs35l56_set_patch(struct cs35l56_base *cs35l56_base); 276 int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base); 277 int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command); 278 int cs35l56_firmware_shutdown(struct cs35l56_base *cs35l56_base); 279 int cs35l56_wait_for_firmware_boot(struct cs35l56_base *cs35l56_base); 280 void cs35l56_wait_control_port_ready(void); 281 void cs35l56_wait_min_reset_pulse(void); 282 void cs35l56_system_reset(struct cs35l56_base *cs35l56_base, bool is_soundwire); 283 int cs35l56_irq_request(struct cs35l56_base *cs35l56_base, int irq); 284 irqreturn_t cs35l56_irq(int irq, void *data); 285 int cs35l56_is_fw_reload_needed(struct cs35l56_base *cs35l56_base); 286 int cs35l56_runtime_suspend_common(struct cs35l56_base *cs35l56_base); 287 int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_soundwire); 288 void cs35l56_init_cs_dsp(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_dsp); 289 int cs35l56_read_prot_status(struct cs35l56_base *cs35l56_base, 290 bool *fw_missing, unsigned int *fw_version); 291 int cs35l56_hw_init(struct cs35l56_base *cs35l56_base); 292 int cs35l56_get_speaker_id(struct cs35l56_base *cs35l56_base); 293 int cs35l56_get_bclk_freq_id(unsigned int freq); 294 void cs35l56_fill_supply_names(struct regulator_bulk_data *data); 295 296 #endif /* ifndef __CS35L56_H */ 297