1e2be04c7SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 2718dceddSDavid Howells /* exynos_drm.h 3718dceddSDavid Howells * 4718dceddSDavid Howells * Copyright (c) 2011 Samsung Electronics Co., Ltd. 5718dceddSDavid Howells * Authors: 6718dceddSDavid Howells * Inki Dae <inki.dae@samsung.com> 7718dceddSDavid Howells * Joonyoung Shim <jy0922.shim@samsung.com> 8718dceddSDavid Howells * Seung-Woo Kim <sw0312.kim@samsung.com> 9718dceddSDavid Howells * 10d81aecb5SInki Dae * This program is free software; you can redistribute it and/or modify it 11d81aecb5SInki Dae * under the terms of the GNU General Public License as published by the 12d81aecb5SInki Dae * Free Software Foundation; either version 2 of the License, or (at your 13d81aecb5SInki Dae * option) any later version. 14718dceddSDavid Howells */ 15718dceddSDavid Howells 16718dceddSDavid Howells #ifndef _UAPI_EXYNOS_DRM_H_ 17718dceddSDavid Howells #define _UAPI_EXYNOS_DRM_H_ 18718dceddSDavid Howells 1919b1e97aSGabriel Laskar #include "drm.h" 20718dceddSDavid Howells 2137a96bedSEmil Velikov #if defined(__cplusplus) 2237a96bedSEmil Velikov extern "C" { 2337a96bedSEmil Velikov #endif 2437a96bedSEmil Velikov 25718dceddSDavid Howells /** 26718dceddSDavid Howells * User-desired buffer creation information structure. 27718dceddSDavid Howells * 28718dceddSDavid Howells * @size: user-desired memory allocation size. 29718dceddSDavid Howells * - this size value would be page-aligned internally. 30718dceddSDavid Howells * @flags: user request for setting memory type or cache attributes. 31718dceddSDavid Howells * @handle: returned a handle to created gem object. 32718dceddSDavid Howells * - this handle will be set by gem module of kernel side. 33718dceddSDavid Howells */ 34718dceddSDavid Howells struct drm_exynos_gem_create { 356615b20fSMikko Rapeli __u64 size; 36cbf0acefSAndrzej Hajda __u32 flags; 37cbf0acefSAndrzej Hajda __u32 handle; 38718dceddSDavid Howells }; 39718dceddSDavid Howells 40718dceddSDavid Howells /** 416564c65fSJoonyoung Shim * A structure for getting a fake-offset that can be used with mmap. 426564c65fSJoonyoung Shim * 436564c65fSJoonyoung Shim * @handle: handle of gem object. 446564c65fSJoonyoung Shim * @reserved: just padding to be 64-bit aligned. 456564c65fSJoonyoung Shim * @offset: a fake-offset of gem object. 466564c65fSJoonyoung Shim */ 476564c65fSJoonyoung Shim struct drm_exynos_gem_map { 486564c65fSJoonyoung Shim __u32 handle; 496564c65fSJoonyoung Shim __u32 reserved; 506564c65fSJoonyoung Shim __u64 offset; 516564c65fSJoonyoung Shim }; 526564c65fSJoonyoung Shim 536564c65fSJoonyoung Shim /** 54718dceddSDavid Howells * A structure to gem information. 55718dceddSDavid Howells * 56718dceddSDavid Howells * @handle: a handle to gem object created. 57718dceddSDavid Howells * @flags: flag value including memory type and cache attribute and 58718dceddSDavid Howells * this value would be set by driver. 59718dceddSDavid Howells * @size: size to memory region allocated by gem and this size would 60718dceddSDavid Howells * be set by driver. 61718dceddSDavid Howells */ 62718dceddSDavid Howells struct drm_exynos_gem_info { 63cbf0acefSAndrzej Hajda __u32 handle; 64cbf0acefSAndrzej Hajda __u32 flags; 656615b20fSMikko Rapeli __u64 size; 66718dceddSDavid Howells }; 67718dceddSDavid Howells 68718dceddSDavid Howells /** 69718dceddSDavid Howells * A structure for user connection request of virtual display. 70718dceddSDavid Howells * 713f4bb9f7SGeert Uytterhoeven * @connection: indicate whether doing connection or not by user. 72718dceddSDavid Howells * @extensions: if this value is 1 then the vidi driver would need additional 73718dceddSDavid Howells * 128bytes edid data. 74718dceddSDavid Howells * @edid: the edid data pointer from user side. 75718dceddSDavid Howells */ 76718dceddSDavid Howells struct drm_exynos_vidi_connection { 77cbf0acefSAndrzej Hajda __u32 connection; 78cbf0acefSAndrzej Hajda __u32 extensions; 796615b20fSMikko Rapeli __u64 edid; 80718dceddSDavid Howells }; 81718dceddSDavid Howells 82718dceddSDavid Howells /* memory type definitions. */ 83718dceddSDavid Howells enum e_drm_exynos_gem_mem_type { 84718dceddSDavid Howells /* Physically Continuous memory and used as default. */ 85718dceddSDavid Howells EXYNOS_BO_CONTIG = 0 << 0, 86718dceddSDavid Howells /* Physically Non-Continuous memory. */ 87718dceddSDavid Howells EXYNOS_BO_NONCONTIG = 1 << 0, 88718dceddSDavid Howells /* non-cachable mapping and used as default. */ 89718dceddSDavid Howells EXYNOS_BO_NONCACHABLE = 0 << 1, 90718dceddSDavid Howells /* cachable mapping. */ 91718dceddSDavid Howells EXYNOS_BO_CACHABLE = 1 << 1, 92718dceddSDavid Howells /* write-combine mapping. */ 93718dceddSDavid Howells EXYNOS_BO_WC = 1 << 2, 94718dceddSDavid Howells EXYNOS_BO_MASK = EXYNOS_BO_NONCONTIG | EXYNOS_BO_CACHABLE | 95718dceddSDavid Howells EXYNOS_BO_WC 96718dceddSDavid Howells }; 97718dceddSDavid Howells 98718dceddSDavid Howells struct drm_exynos_g2d_get_ver { 99718dceddSDavid Howells __u32 major; 100718dceddSDavid Howells __u32 minor; 101718dceddSDavid Howells }; 102718dceddSDavid Howells 103718dceddSDavid Howells struct drm_exynos_g2d_cmd { 104718dceddSDavid Howells __u32 offset; 105718dceddSDavid Howells __u32 data; 106718dceddSDavid Howells }; 107718dceddSDavid Howells 1082a3098ffSInki Dae enum drm_exynos_g2d_buf_type { 1092a3098ffSInki Dae G2D_BUF_USERPTR = 1 << 31, 1102a3098ffSInki Dae }; 1112a3098ffSInki Dae 112718dceddSDavid Howells enum drm_exynos_g2d_event_type { 113718dceddSDavid Howells G2D_EVENT_NOT, 114718dceddSDavid Howells G2D_EVENT_NONSTOP, 115718dceddSDavid Howells G2D_EVENT_STOP, /* not yet */ 116718dceddSDavid Howells }; 117718dceddSDavid Howells 1182a3098ffSInki Dae struct drm_exynos_g2d_userptr { 1192a3098ffSInki Dae unsigned long userptr; 1202a3098ffSInki Dae unsigned long size; 1212a3098ffSInki Dae }; 1222a3098ffSInki Dae 123718dceddSDavid Howells struct drm_exynos_g2d_set_cmdlist { 124718dceddSDavid Howells __u64 cmd; 1252a3098ffSInki Dae __u64 cmd_buf; 126718dceddSDavid Howells __u32 cmd_nr; 1272a3098ffSInki Dae __u32 cmd_buf_nr; 128718dceddSDavid Howells 129718dceddSDavid Howells /* for g2d event */ 130718dceddSDavid Howells __u64 event_type; 131718dceddSDavid Howells __u64 user_data; 132718dceddSDavid Howells }; 133718dceddSDavid Howells 134718dceddSDavid Howells struct drm_exynos_g2d_exec { 135718dceddSDavid Howells __u64 async; 136718dceddSDavid Howells }; 137718dceddSDavid Howells 1389913f74fSMarek Szyprowski /* Exynos DRM IPP v2 API */ 1399913f74fSMarek Szyprowski 1409913f74fSMarek Szyprowski /** 1419913f74fSMarek Szyprowski * Enumerate available IPP hardware modules. 1429913f74fSMarek Szyprowski * 1439913f74fSMarek Szyprowski * @count_ipps: size of ipp_id array / number of ipp modules (set by driver) 1449913f74fSMarek Szyprowski * @reserved: padding 1459913f74fSMarek Szyprowski * @ipp_id_ptr: pointer to ipp_id array or NULL 1469913f74fSMarek Szyprowski */ 1479913f74fSMarek Szyprowski struct drm_exynos_ioctl_ipp_get_res { 1489913f74fSMarek Szyprowski __u32 count_ipps; 1499913f74fSMarek Szyprowski __u32 reserved; 1509913f74fSMarek Szyprowski __u64 ipp_id_ptr; 1519913f74fSMarek Szyprowski }; 1529913f74fSMarek Szyprowski 1539913f74fSMarek Szyprowski enum drm_exynos_ipp_format_type { 1549913f74fSMarek Szyprowski DRM_EXYNOS_IPP_FORMAT_SOURCE = 0x01, 1559913f74fSMarek Szyprowski DRM_EXYNOS_IPP_FORMAT_DESTINATION = 0x02, 1569913f74fSMarek Szyprowski }; 1579913f74fSMarek Szyprowski 1589913f74fSMarek Szyprowski struct drm_exynos_ipp_format { 1599913f74fSMarek Szyprowski __u32 fourcc; 1609913f74fSMarek Szyprowski __u32 type; 1619913f74fSMarek Szyprowski __u64 modifier; 1629913f74fSMarek Szyprowski }; 1639913f74fSMarek Szyprowski 1649913f74fSMarek Szyprowski enum drm_exynos_ipp_capability { 1659913f74fSMarek Szyprowski DRM_EXYNOS_IPP_CAP_CROP = 0x01, 1669913f74fSMarek Szyprowski DRM_EXYNOS_IPP_CAP_ROTATE = 0x02, 1679913f74fSMarek Szyprowski DRM_EXYNOS_IPP_CAP_SCALE = 0x04, 1689913f74fSMarek Szyprowski DRM_EXYNOS_IPP_CAP_CONVERT = 0x08, 1699913f74fSMarek Szyprowski }; 1709913f74fSMarek Szyprowski 1719913f74fSMarek Szyprowski /** 1729913f74fSMarek Szyprowski * Get IPP hardware capabilities and supported image formats. 1739913f74fSMarek Szyprowski * 1749913f74fSMarek Szyprowski * @ipp_id: id of IPP module to query 1759913f74fSMarek Szyprowski * @capabilities: bitmask of drm_exynos_ipp_capability (set by driver) 1769913f74fSMarek Szyprowski * @reserved: padding 1779913f74fSMarek Szyprowski * @formats_count: size of formats array (in entries) / number of filled 1789913f74fSMarek Szyprowski * formats (set by driver) 1799913f74fSMarek Szyprowski * @formats_ptr: pointer to formats array or NULL 1809913f74fSMarek Szyprowski */ 1819913f74fSMarek Szyprowski struct drm_exynos_ioctl_ipp_get_caps { 1829913f74fSMarek Szyprowski __u32 ipp_id; 1839913f74fSMarek Szyprowski __u32 capabilities; 1849913f74fSMarek Szyprowski __u32 reserved; 1859913f74fSMarek Szyprowski __u32 formats_count; 1869913f74fSMarek Szyprowski __u64 formats_ptr; 1879913f74fSMarek Szyprowski }; 1889913f74fSMarek Szyprowski 1899913f74fSMarek Szyprowski enum drm_exynos_ipp_limit_type { 1909913f74fSMarek Szyprowski /* size (horizontal/vertial) limits, in pixels (min, max, alignment) */ 1919913f74fSMarek Szyprowski DRM_EXYNOS_IPP_LIMIT_TYPE_SIZE = 0x0001, 1929913f74fSMarek Szyprowski /* scale ratio (horizonta/vertial), 16.16 fixed point (min, max) */ 1939913f74fSMarek Szyprowski DRM_EXYNOS_IPP_LIMIT_TYPE_SCALE = 0x0002, 1949913f74fSMarek Szyprowski 1959913f74fSMarek Szyprowski /* image buffer area */ 1969913f74fSMarek Szyprowski DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER = 0x0001 << 16, 1979913f74fSMarek Szyprowski /* src/dst rectangle area */ 1989913f74fSMarek Szyprowski DRM_EXYNOS_IPP_LIMIT_SIZE_AREA = 0x0002 << 16, 1999913f74fSMarek Szyprowski /* src/dst rectangle area when rotation enabled */ 2009913f74fSMarek Szyprowski DRM_EXYNOS_IPP_LIMIT_SIZE_ROTATED = 0x0003 << 16, 2019913f74fSMarek Szyprowski 2029913f74fSMarek Szyprowski DRM_EXYNOS_IPP_LIMIT_TYPE_MASK = 0x000f, 2039913f74fSMarek Szyprowski DRM_EXYNOS_IPP_LIMIT_SIZE_MASK = 0x000f << 16, 2049913f74fSMarek Szyprowski }; 2059913f74fSMarek Szyprowski 2069913f74fSMarek Szyprowski struct drm_exynos_ipp_limit_val { 2079913f74fSMarek Szyprowski __u32 min; 2089913f74fSMarek Szyprowski __u32 max; 2099913f74fSMarek Szyprowski __u32 align; 2109913f74fSMarek Szyprowski __u32 reserved; 2119913f74fSMarek Szyprowski }; 2129913f74fSMarek Szyprowski 2139913f74fSMarek Szyprowski /** 2149913f74fSMarek Szyprowski * IPP module limitation. 2159913f74fSMarek Szyprowski * 2169913f74fSMarek Szyprowski * @type: limit type (see drm_exynos_ipp_limit_type enum) 2179913f74fSMarek Szyprowski * @reserved: padding 2189913f74fSMarek Szyprowski * @h: horizontal limits 2199913f74fSMarek Szyprowski * @v: vertical limits 2209913f74fSMarek Szyprowski */ 2219913f74fSMarek Szyprowski struct drm_exynos_ipp_limit { 2229913f74fSMarek Szyprowski __u32 type; 2239913f74fSMarek Szyprowski __u32 reserved; 2249913f74fSMarek Szyprowski struct drm_exynos_ipp_limit_val h; 2259913f74fSMarek Szyprowski struct drm_exynos_ipp_limit_val v; 2269913f74fSMarek Szyprowski }; 2279913f74fSMarek Szyprowski 2289913f74fSMarek Szyprowski /** 2299913f74fSMarek Szyprowski * Get IPP limits for given image format. 2309913f74fSMarek Szyprowski * 2319913f74fSMarek Szyprowski * @ipp_id: id of IPP module to query 2329913f74fSMarek Szyprowski * @fourcc: image format code (see DRM_FORMAT_* in drm_fourcc.h) 2339913f74fSMarek Szyprowski * @modifier: image format modifier (see DRM_FORMAT_MOD_* in drm_fourcc.h) 2349913f74fSMarek Szyprowski * @type: source/destination identifier (drm_exynos_ipp_format_flag enum) 2359913f74fSMarek Szyprowski * @limits_count: size of limits array (in entries) / number of filled entries 2369913f74fSMarek Szyprowski * (set by driver) 2379913f74fSMarek Szyprowski * @limits_ptr: pointer to limits array or NULL 2389913f74fSMarek Szyprowski */ 2399913f74fSMarek Szyprowski struct drm_exynos_ioctl_ipp_get_limits { 2409913f74fSMarek Szyprowski __u32 ipp_id; 2419913f74fSMarek Szyprowski __u32 fourcc; 2429913f74fSMarek Szyprowski __u64 modifier; 2439913f74fSMarek Szyprowski __u32 type; 2449913f74fSMarek Szyprowski __u32 limits_count; 2459913f74fSMarek Szyprowski __u64 limits_ptr; 2469913f74fSMarek Szyprowski }; 2479913f74fSMarek Szyprowski 2489913f74fSMarek Szyprowski enum drm_exynos_ipp_task_id { 2499913f74fSMarek Szyprowski /* buffer described by struct drm_exynos_ipp_task_buffer */ 2509913f74fSMarek Szyprowski DRM_EXYNOS_IPP_TASK_BUFFER = 0x0001, 2519913f74fSMarek Szyprowski /* rectangle described by struct drm_exynos_ipp_task_rect */ 2529913f74fSMarek Szyprowski DRM_EXYNOS_IPP_TASK_RECTANGLE = 0x0002, 2539913f74fSMarek Szyprowski /* transformation described by struct drm_exynos_ipp_task_transform */ 2549913f74fSMarek Szyprowski DRM_EXYNOS_IPP_TASK_TRANSFORM = 0x0003, 2559913f74fSMarek Szyprowski /* alpha configuration described by struct drm_exynos_ipp_task_alpha */ 2569913f74fSMarek Szyprowski DRM_EXYNOS_IPP_TASK_ALPHA = 0x0004, 2579913f74fSMarek Szyprowski 2589913f74fSMarek Szyprowski /* source image data (for buffer and rectangle chunks) */ 2599913f74fSMarek Szyprowski DRM_EXYNOS_IPP_TASK_TYPE_SOURCE = 0x0001 << 16, 2609913f74fSMarek Szyprowski /* destination image data (for buffer and rectangle chunks) */ 2619913f74fSMarek Szyprowski DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION = 0x0002 << 16, 2629913f74fSMarek Szyprowski }; 2639913f74fSMarek Szyprowski 2649913f74fSMarek Szyprowski /** 2659913f74fSMarek Szyprowski * Memory buffer with image data. 2669913f74fSMarek Szyprowski * 2679913f74fSMarek Szyprowski * @id: must be DRM_EXYNOS_IPP_TASK_BUFFER 2689913f74fSMarek Szyprowski * other parameters are same as for AddFB2 generic DRM ioctl 2699913f74fSMarek Szyprowski */ 2709913f74fSMarek Szyprowski struct drm_exynos_ipp_task_buffer { 2719913f74fSMarek Szyprowski __u32 id; 2729913f74fSMarek Szyprowski __u32 fourcc; 2739913f74fSMarek Szyprowski __u32 width, height; 2749913f74fSMarek Szyprowski __u32 gem_id[4]; 2759913f74fSMarek Szyprowski __u32 offset[4]; 2769913f74fSMarek Szyprowski __u32 pitch[4]; 2779913f74fSMarek Szyprowski __u64 modifier; 2789913f74fSMarek Szyprowski }; 2799913f74fSMarek Szyprowski 2809913f74fSMarek Szyprowski /** 2819913f74fSMarek Szyprowski * Rectangle for processing. 2829913f74fSMarek Szyprowski * 2839913f74fSMarek Szyprowski * @id: must be DRM_EXYNOS_IPP_TASK_RECTANGLE 2849913f74fSMarek Szyprowski * @reserved: padding 2859913f74fSMarek Szyprowski * @x,@y: left corner in pixels 2869913f74fSMarek Szyprowski * @w,@h: width/height in pixels 2879913f74fSMarek Szyprowski */ 2889913f74fSMarek Szyprowski struct drm_exynos_ipp_task_rect { 2899913f74fSMarek Szyprowski __u32 id; 2909913f74fSMarek Szyprowski __u32 reserved; 2919913f74fSMarek Szyprowski __u32 x; 2929913f74fSMarek Szyprowski __u32 y; 2939913f74fSMarek Szyprowski __u32 w; 2949913f74fSMarek Szyprowski __u32 h; 2959913f74fSMarek Szyprowski }; 2969913f74fSMarek Szyprowski 2979913f74fSMarek Szyprowski /** 2989913f74fSMarek Szyprowski * Image tranformation description. 2999913f74fSMarek Szyprowski * 3009913f74fSMarek Szyprowski * @id: must be DRM_EXYNOS_IPP_TASK_TRANSFORM 3019913f74fSMarek Szyprowski * @rotation: DRM_MODE_ROTATE_* and DRM_MODE_REFLECT_* values 3029913f74fSMarek Szyprowski */ 3039913f74fSMarek Szyprowski struct drm_exynos_ipp_task_transform { 3049913f74fSMarek Szyprowski __u32 id; 3059913f74fSMarek Szyprowski __u32 rotation; 3069913f74fSMarek Szyprowski }; 3079913f74fSMarek Szyprowski 3089913f74fSMarek Szyprowski /** 3099913f74fSMarek Szyprowski * Image global alpha configuration for formats without alpha values. 3109913f74fSMarek Szyprowski * 3119913f74fSMarek Szyprowski * @id: must be DRM_EXYNOS_IPP_TASK_ALPHA 3129913f74fSMarek Szyprowski * @value: global alpha value (0-255) 3139913f74fSMarek Szyprowski */ 3149913f74fSMarek Szyprowski struct drm_exynos_ipp_task_alpha { 3159913f74fSMarek Szyprowski __u32 id; 3169913f74fSMarek Szyprowski __u32 value; 3179913f74fSMarek Szyprowski }; 3189913f74fSMarek Szyprowski 3199913f74fSMarek Szyprowski enum drm_exynos_ipp_flag { 3209913f74fSMarek Szyprowski /* generate DRM event after processing */ 3219913f74fSMarek Szyprowski DRM_EXYNOS_IPP_FLAG_EVENT = 0x01, 3229913f74fSMarek Szyprowski /* dry run, only check task parameters */ 3239913f74fSMarek Szyprowski DRM_EXYNOS_IPP_FLAG_TEST_ONLY = 0x02, 3249913f74fSMarek Szyprowski /* non-blocking processing */ 3259913f74fSMarek Szyprowski DRM_EXYNOS_IPP_FLAG_NONBLOCK = 0x04, 3269913f74fSMarek Szyprowski }; 3279913f74fSMarek Szyprowski 3289913f74fSMarek Szyprowski #define DRM_EXYNOS_IPP_FLAGS (DRM_EXYNOS_IPP_FLAG_EVENT |\ 3299913f74fSMarek Szyprowski DRM_EXYNOS_IPP_FLAG_TEST_ONLY | DRM_EXYNOS_IPP_FLAG_NONBLOCK) 3309913f74fSMarek Szyprowski 3319913f74fSMarek Szyprowski /** 3329913f74fSMarek Szyprowski * Perform image processing described by array of drm_exynos_ipp_task_* 3339913f74fSMarek Szyprowski * structures (parameters array). 3349913f74fSMarek Szyprowski * 3359913f74fSMarek Szyprowski * @ipp_id: id of IPP module to run the task 3369913f74fSMarek Szyprowski * @flags: bitmask of drm_exynos_ipp_flag values 3379913f74fSMarek Szyprowski * @reserved: padding 3389913f74fSMarek Szyprowski * @params_size: size of parameters array (in bytes) 3399913f74fSMarek Szyprowski * @params_ptr: pointer to parameters array or NULL 3409913f74fSMarek Szyprowski * @user_data: (optional) data for drm event 3419913f74fSMarek Szyprowski */ 3429913f74fSMarek Szyprowski struct drm_exynos_ioctl_ipp_commit { 3439913f74fSMarek Szyprowski __u32 ipp_id; 3449913f74fSMarek Szyprowski __u32 flags; 3459913f74fSMarek Szyprowski __u32 reserved; 3469913f74fSMarek Szyprowski __u32 params_size; 3479913f74fSMarek Szyprowski __u64 params_ptr; 3489913f74fSMarek Szyprowski __u64 user_data; 3499913f74fSMarek Szyprowski }; 3509913f74fSMarek Szyprowski 351718dceddSDavid Howells #define DRM_EXYNOS_GEM_CREATE 0x00 3526564c65fSJoonyoung Shim #define DRM_EXYNOS_GEM_MAP 0x01 353718dceddSDavid Howells /* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */ 354718dceddSDavid Howells #define DRM_EXYNOS_GEM_GET 0x04 355718dceddSDavid Howells #define DRM_EXYNOS_VIDI_CONNECTION 0x07 356718dceddSDavid Howells 357718dceddSDavid Howells /* G2D */ 358718dceddSDavid Howells #define DRM_EXYNOS_G2D_GET_VER 0x20 359718dceddSDavid Howells #define DRM_EXYNOS_G2D_SET_CMDLIST 0x21 360718dceddSDavid Howells #define DRM_EXYNOS_G2D_EXEC 0x22 361718dceddSDavid Howells 3628ded5941SMarek Szyprowski /* Reserved 0x30 ~ 0x33 for obsolete Exynos IPP ioctls */ 3639913f74fSMarek Szyprowski /* IPP - Image Post Processing */ 3649913f74fSMarek Szyprowski #define DRM_EXYNOS_IPP_GET_RESOURCES 0x40 3659913f74fSMarek Szyprowski #define DRM_EXYNOS_IPP_GET_CAPS 0x41 3669913f74fSMarek Szyprowski #define DRM_EXYNOS_IPP_GET_LIMITS 0x42 3679913f74fSMarek Szyprowski #define DRM_EXYNOS_IPP_COMMIT 0x43 368cb471f14SEunchul Kim 369718dceddSDavid Howells #define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \ 370718dceddSDavid Howells DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create) 3716564c65fSJoonyoung Shim #define DRM_IOCTL_EXYNOS_GEM_MAP DRM_IOWR(DRM_COMMAND_BASE + \ 3726564c65fSJoonyoung Shim DRM_EXYNOS_GEM_MAP, struct drm_exynos_gem_map) 373718dceddSDavid Howells #define DRM_IOCTL_EXYNOS_GEM_GET DRM_IOWR(DRM_COMMAND_BASE + \ 374718dceddSDavid Howells DRM_EXYNOS_GEM_GET, struct drm_exynos_gem_info) 375718dceddSDavid Howells 376718dceddSDavid Howells #define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \ 377718dceddSDavid Howells DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection) 378718dceddSDavid Howells 379718dceddSDavid Howells #define DRM_IOCTL_EXYNOS_G2D_GET_VER DRM_IOWR(DRM_COMMAND_BASE + \ 380718dceddSDavid Howells DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver) 381718dceddSDavid Howells #define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + \ 382718dceddSDavid Howells DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist) 383718dceddSDavid Howells #define DRM_IOCTL_EXYNOS_G2D_EXEC DRM_IOWR(DRM_COMMAND_BASE + \ 384718dceddSDavid Howells DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec) 385718dceddSDavid Howells 3869913f74fSMarek Szyprowski #define DRM_IOCTL_EXYNOS_IPP_GET_RESOURCES DRM_IOWR(DRM_COMMAND_BASE + \ 3879913f74fSMarek Szyprowski DRM_EXYNOS_IPP_GET_RESOURCES, \ 3889913f74fSMarek Szyprowski struct drm_exynos_ioctl_ipp_get_res) 3899913f74fSMarek Szyprowski #define DRM_IOCTL_EXYNOS_IPP_GET_CAPS DRM_IOWR(DRM_COMMAND_BASE + \ 3909913f74fSMarek Szyprowski DRM_EXYNOS_IPP_GET_CAPS, struct drm_exynos_ioctl_ipp_get_caps) 3919913f74fSMarek Szyprowski #define DRM_IOCTL_EXYNOS_IPP_GET_LIMITS DRM_IOWR(DRM_COMMAND_BASE + \ 3929913f74fSMarek Szyprowski DRM_EXYNOS_IPP_GET_LIMITS, \ 3939913f74fSMarek Szyprowski struct drm_exynos_ioctl_ipp_get_limits) 3949913f74fSMarek Szyprowski #define DRM_IOCTL_EXYNOS_IPP_COMMIT DRM_IOWR(DRM_COMMAND_BASE + \ 3959913f74fSMarek Szyprowski DRM_EXYNOS_IPP_COMMIT, struct drm_exynos_ioctl_ipp_commit) 3969913f74fSMarek Szyprowski 397*c0bf499fSKrzysztof Kozlowski /* Exynos specific events */ 398718dceddSDavid Howells #define DRM_EXYNOS_G2D_EVENT 0x80000000 3999913f74fSMarek Szyprowski #define DRM_EXYNOS_IPP_EVENT 0x80000002 400718dceddSDavid Howells 401718dceddSDavid Howells struct drm_exynos_g2d_event { 402718dceddSDavid Howells struct drm_event base; 403718dceddSDavid Howells __u64 user_data; 404718dceddSDavid Howells __u32 tv_sec; 405718dceddSDavid Howells __u32 tv_usec; 406718dceddSDavid Howells __u32 cmdlist_no; 407718dceddSDavid Howells __u32 reserved; 408718dceddSDavid Howells }; 409718dceddSDavid Howells 4109913f74fSMarek Szyprowski struct drm_exynos_ipp_event { 4119913f74fSMarek Szyprowski struct drm_event base; 4129913f74fSMarek Szyprowski __u64 user_data; 4139913f74fSMarek Szyprowski __u32 tv_sec; 4149913f74fSMarek Szyprowski __u32 tv_usec; 4159913f74fSMarek Szyprowski __u32 ipp_id; 4169913f74fSMarek Szyprowski __u32 sequence; 4179913f74fSMarek Szyprowski __u64 reserved; 4189913f74fSMarek Szyprowski }; 4199913f74fSMarek Szyprowski 42037a96bedSEmil Velikov #if defined(__cplusplus) 42137a96bedSEmil Velikov } 42237a96bedSEmil Velikov #endif 42337a96bedSEmil Velikov 424718dceddSDavid Howells #endif /* _UAPI_EXYNOS_DRM_H_ */ 425