1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ALSA driver for RME Digi9652 audio interfaces 4 * 5 * Copyright (c) 1999 IEM - Winfried Ritsch 6 * Copyright (c) 1999-2001 Paul Davis 7 */ 8 9 #include <linux/delay.h> 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/pci.h> 13 #include <linux/module.h> 14 #include <linux/io.h> 15 #include <linux/nospec.h> 16 17 #include <sound/core.h> 18 #include <sound/control.h> 19 #include <sound/pcm.h> 20 #include <sound/info.h> 21 #include <sound/asoundef.h> 22 #include <sound/initval.h> 23 24 #include <asm/current.h> 25 26 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 27 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 28 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 29 static bool precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */ 30 31 module_param_array(index, int, NULL, 0444); 32 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard."); 33 module_param_array(id, charp, NULL, 0444); 34 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard."); 35 module_param_array(enable, bool, NULL, 0444); 36 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards."); 37 module_param_array(precise_ptr, bool, NULL, 0444); 38 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably)."); 39 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch"); 40 MODULE_DESCRIPTION("RME Digi9652/Digi9636"); 41 MODULE_LICENSE("GPL"); 42 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall}," 43 "{RME,Hammerfall-Light}}"); 44 45 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for 46 capture, one for playback. Both the ADAT and S/PDIF channels appear 47 to the host CPU in the same block of memory. There is no functional 48 difference between them in terms of access. 49 50 The Hammerfall Light is identical to the Hammerfall, except that it 51 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback. 52 */ 53 54 #define RME9652_NCHANNELS 26 55 #define RME9636_NCHANNELS 18 56 57 /* Preferred sync source choices - used by "sync_pref" control switch */ 58 59 #define RME9652_SYNC_FROM_SPDIF 0 60 #define RME9652_SYNC_FROM_ADAT1 1 61 #define RME9652_SYNC_FROM_ADAT2 2 62 #define RME9652_SYNC_FROM_ADAT3 3 63 64 /* Possible sources of S/PDIF input */ 65 66 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */ 67 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */ 68 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */ 69 70 /* ------------- Status-Register bits --------------------- */ 71 72 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */ 73 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */ 74 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */ 75 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */ 76 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */ 77 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */ 78 /* bits 6-15 encode h/w buffer pointer position */ 79 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */ 80 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */ 81 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */ 82 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */ 83 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */ 84 #define RME9652_tc_out (1<<21) /* time-code out bit */ 85 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */ 86 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */ 87 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */ 88 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */ 89 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */ 90 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */ 91 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */ 92 93 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2) 94 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2) 95 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2) 96 #define rme9652_decode_spdif_rate(x) ((x)>>22) 97 98 /* Bit 6..15 : h/w buffer pointer */ 99 100 #define RME9652_buf_pos 0x000FFC0 101 102 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later 103 Rev G EEPROMS and Rev 1.5 cards or later. 104 */ 105 106 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos)) 107 108 /* amount of io space we remap for register access. i'm not sure we 109 even need this much, but 1K is nice round number :) 110 */ 111 112 #define RME9652_IO_EXTENT 1024 113 114 #define RME9652_init_buffer 0 115 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */ 116 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */ 117 #define RME9652_control_register 64 118 #define RME9652_irq_clear 96 119 #define RME9652_time_code 100 /* useful if used with alesis adat */ 120 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */ 121 122 /* Read-only registers */ 123 124 /* Writing to any of the register locations writes to the status 125 register. We'll use the first location as our point of access. 126 */ 127 128 #define RME9652_status_register 0 129 130 /* --------- Control-Register Bits ---------------- */ 131 132 133 #define RME9652_start_bit (1<<0) /* start record/play */ 134 /* bits 1-3 encode buffersize/latency */ 135 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */ 136 #define RME9652_IE (1<<5) /* Interrupt Enable */ 137 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */ 138 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */ 139 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */ 140 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */ 141 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */ 142 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */ 143 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */ 144 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */ 145 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */ 146 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */ 147 #define RME9652_SyncPref_ADAT2 (1<<16) 148 #define RME9652_SyncPref_ADAT3 (1<<17) 149 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */ 150 #define RME9652_SPDIF_SELECT (1<<19) 151 #define RME9652_SPDIF_CLOCK (1<<20) 152 #define RME9652_SPDIF_WRITE (1<<21) 153 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */ 154 155 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */ 156 157 #define RME9652_latency 0x0e 158 #define rme9652_encode_latency(x) (((x)&0x7)<<1) 159 #define rme9652_decode_latency(x) (((x)>>1)&0x7) 160 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS) 161 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1) 162 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14) 163 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3) 164 165 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) 166 #define RME9652_SyncPref_ADAT1 0 167 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) 168 169 /* the size of a substream (1 mono data stream) */ 170 171 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024) 172 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES) 173 174 /* the size of the area we need to allocate for DMA transfers. the 175 size is the same regardless of the number of channels - the 176 9636 still uses the same memory area. 177 178 Note that we allocate 1 more channel than is apparently needed 179 because the h/w seems to write 1 byte beyond the end of the last 180 page. Sigh. 181 */ 182 183 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES) 184 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024) 185 186 struct snd_rme9652 { 187 int dev; 188 189 spinlock_t lock; 190 int irq; 191 unsigned long port; 192 void __iomem *iobase; 193 194 int precise_ptr; 195 196 u32 control_register; /* cached value */ 197 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */ 198 199 u32 creg_spdif; 200 u32 creg_spdif_stream; 201 202 char *card_name; /* hammerfall or hammerfall light names */ 203 204 size_t hw_offsetmask; /* &-with status register to get real hw_offset */ 205 size_t prev_hw_offset; /* previous hw offset */ 206 size_t max_jitter; /* maximum jitter in frames for 207 hw pointer */ 208 size_t period_bytes; /* guess what this is */ 209 210 unsigned char ds_channels; 211 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */ 212 213 struct snd_dma_buffer playback_dma_buf; 214 struct snd_dma_buffer capture_dma_buf; 215 216 unsigned char *capture_buffer; /* suitably aligned address */ 217 unsigned char *playback_buffer; /* suitably aligned address */ 218 219 pid_t capture_pid; 220 pid_t playback_pid; 221 222 struct snd_pcm_substream *capture_substream; 223 struct snd_pcm_substream *playback_substream; 224 int running; 225 226 int passthru; /* non-zero if doing pass-thru */ 227 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */ 228 229 int last_spdif_sample_rate; /* so that we can catch externally ... */ 230 int last_adat_sample_rate; /* ... induced rate changes */ 231 232 char *channel_map; 233 234 struct snd_card *card; 235 struct snd_pcm *pcm; 236 struct pci_dev *pci; 237 struct snd_kcontrol *spdif_ctl; 238 239 }; 240 241 /* These tables map the ALSA channels 1..N to the channels that we 242 need to use in order to find the relevant channel buffer. RME 243 refer to this kind of mapping as between "the ADAT channel and 244 the DMA channel." We index it using the logical audio channel, 245 and the value is the DMA channel (i.e. channel buffer number) 246 where the data for that channel can be read/written from/to. 247 */ 248 249 static char channel_map_9652_ss[26] = { 250 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 251 18, 19, 20, 21, 22, 23, 24, 25 252 }; 253 254 static char channel_map_9636_ss[26] = { 255 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 256 /* channels 16 and 17 are S/PDIF */ 257 24, 25, 258 /* channels 18-25 don't exist */ 259 -1, -1, -1, -1, -1, -1, -1, -1 260 }; 261 262 static char channel_map_9652_ds[26] = { 263 /* ADAT channels are remapped */ 264 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 265 /* channels 12 and 13 are S/PDIF */ 266 24, 25, 267 /* others don't exist */ 268 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 269 }; 270 271 static char channel_map_9636_ds[26] = { 272 /* ADAT channels are remapped */ 273 1, 3, 5, 7, 9, 11, 13, 15, 274 /* channels 8 and 9 are S/PDIF */ 275 24, 25, 276 /* others don't exist */ 277 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 278 }; 279 280 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size) 281 { 282 dmab->dev.type = SNDRV_DMA_TYPE_DEV; 283 dmab->dev.dev = snd_dma_pci_data(pci); 284 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 285 size, dmab) < 0) 286 return -ENOMEM; 287 return 0; 288 } 289 290 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) 291 { 292 if (dmab->area) 293 snd_dma_free_pages(dmab); 294 } 295 296 297 static const struct pci_device_id snd_rme9652_ids[] = { 298 { 299 .vendor = 0x10ee, 300 .device = 0x3fc4, 301 .subvendor = PCI_ANY_ID, 302 .subdevice = PCI_ANY_ID, 303 }, /* RME Digi9652 */ 304 { 0, }, 305 }; 306 307 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids); 308 309 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val) 310 { 311 writel(val, rme9652->iobase + reg); 312 } 313 314 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg) 315 { 316 return readl(rme9652->iobase + reg); 317 } 318 319 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652) 320 { 321 unsigned long flags; 322 int ret = 1; 323 324 spin_lock_irqsave(&rme9652->lock, flags); 325 if ((rme9652->playback_pid != rme9652->capture_pid) && 326 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) { 327 ret = 0; 328 } 329 spin_unlock_irqrestore(&rme9652->lock, flags); 330 return ret; 331 } 332 333 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652) 334 { 335 if (rme9652_running_double_speed(rme9652)) { 336 return (rme9652_read(rme9652, RME9652_status_register) & 337 RME9652_fs48) ? 96000 : 88200; 338 } else { 339 return (rme9652_read(rme9652, RME9652_status_register) & 340 RME9652_fs48) ? 48000 : 44100; 341 } 342 } 343 344 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652) 345 { 346 unsigned int i; 347 348 i = rme9652->control_register & RME9652_latency; 349 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8)); 350 rme9652->hw_offsetmask = 351 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos; 352 rme9652->max_jitter = 80; 353 } 354 355 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652) 356 { 357 int status; 358 unsigned int offset, frag; 359 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4; 360 snd_pcm_sframes_t delta; 361 362 status = rme9652_read(rme9652, RME9652_status_register); 363 if (!rme9652->precise_ptr) 364 return (status & RME9652_buffer_id) ? period_size : 0; 365 offset = status & RME9652_buf_pos; 366 367 /* The hardware may give a backward movement for up to 80 frames 368 Martin Kirst <martin.kirst@freenet.de> knows the details. 369 */ 370 371 delta = rme9652->prev_hw_offset - offset; 372 delta &= 0xffff; 373 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4) 374 offset = rme9652->prev_hw_offset; 375 else 376 rme9652->prev_hw_offset = offset; 377 offset &= rme9652->hw_offsetmask; 378 offset /= 4; 379 frag = status & RME9652_buffer_id; 380 381 if (offset < period_size) { 382 if (offset > rme9652->max_jitter) { 383 if (frag) 384 dev_err(rme9652->card->dev, 385 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", 386 status, offset); 387 } else if (!frag) 388 return 0; 389 offset -= rme9652->max_jitter; 390 if ((int)offset < 0) 391 offset += period_size * 2; 392 } else { 393 if (offset > period_size + rme9652->max_jitter) { 394 if (!frag) 395 dev_err(rme9652->card->dev, 396 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", 397 status, offset); 398 } else if (frag) 399 return period_size; 400 offset -= rme9652->max_jitter; 401 } 402 403 return offset; 404 } 405 406 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652) 407 { 408 int i; 409 410 /* reset the FIFO pointer to zero. We do this by writing to 8 411 registers, each of which is a 32bit wide register, and set 412 them all to zero. Note that s->iobase is a pointer to 413 int32, not pointer to char. 414 */ 415 416 for (i = 0; i < 8; i++) { 417 rme9652_write(rme9652, i * 4, 0); 418 udelay(10); 419 } 420 rme9652->prev_hw_offset = 0; 421 } 422 423 static inline void rme9652_start(struct snd_rme9652 *s) 424 { 425 s->control_register |= (RME9652_IE | RME9652_start_bit); 426 rme9652_write(s, RME9652_control_register, s->control_register); 427 } 428 429 static inline void rme9652_stop(struct snd_rme9652 *s) 430 { 431 s->control_register &= ~(RME9652_start_bit | RME9652_IE); 432 rme9652_write(s, RME9652_control_register, s->control_register); 433 } 434 435 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s, 436 unsigned int frames) 437 { 438 int restart = 0; 439 int n; 440 441 spin_lock_irq(&s->lock); 442 443 if ((restart = s->running)) { 444 rme9652_stop(s); 445 } 446 447 frames >>= 7; 448 n = 0; 449 while (frames) { 450 n++; 451 frames >>= 1; 452 } 453 454 s->control_register &= ~RME9652_latency; 455 s->control_register |= rme9652_encode_latency(n); 456 457 rme9652_write(s, RME9652_control_register, s->control_register); 458 459 rme9652_compute_period_size(s); 460 461 if (restart) 462 rme9652_start(s); 463 464 spin_unlock_irq(&s->lock); 465 466 return 0; 467 } 468 469 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate) 470 { 471 int restart; 472 int reject_if_open = 0; 473 int xrate; 474 475 if (!snd_rme9652_use_is_exclusive (rme9652)) { 476 return -EBUSY; 477 } 478 479 /* Changing from a "single speed" to a "double speed" rate is 480 not allowed if any substreams are open. This is because 481 such a change causes a shift in the location of 482 the DMA buffers and a reduction in the number of available 483 buffers. 484 485 Note that a similar but essentially insoluble problem 486 exists for externally-driven rate changes. All we can do 487 is to flag rate changes in the read/write routines. 488 */ 489 490 spin_lock_irq(&rme9652->lock); 491 xrate = rme9652_adat_sample_rate(rme9652); 492 493 switch (rate) { 494 case 44100: 495 if (xrate > 48000) { 496 reject_if_open = 1; 497 } 498 rate = 0; 499 break; 500 case 48000: 501 if (xrate > 48000) { 502 reject_if_open = 1; 503 } 504 rate = RME9652_freq; 505 break; 506 case 88200: 507 if (xrate < 48000) { 508 reject_if_open = 1; 509 } 510 rate = RME9652_DS; 511 break; 512 case 96000: 513 if (xrate < 48000) { 514 reject_if_open = 1; 515 } 516 rate = RME9652_DS | RME9652_freq; 517 break; 518 default: 519 spin_unlock_irq(&rme9652->lock); 520 return -EINVAL; 521 } 522 523 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) { 524 spin_unlock_irq(&rme9652->lock); 525 return -EBUSY; 526 } 527 528 if ((restart = rme9652->running)) { 529 rme9652_stop(rme9652); 530 } 531 rme9652->control_register &= ~(RME9652_freq | RME9652_DS); 532 rme9652->control_register |= rate; 533 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 534 535 if (restart) { 536 rme9652_start(rme9652); 537 } 538 539 if (rate & RME9652_DS) { 540 if (rme9652->ss_channels == RME9652_NCHANNELS) { 541 rme9652->channel_map = channel_map_9652_ds; 542 } else { 543 rme9652->channel_map = channel_map_9636_ds; 544 } 545 } else { 546 if (rme9652->ss_channels == RME9652_NCHANNELS) { 547 rme9652->channel_map = channel_map_9652_ss; 548 } else { 549 rme9652->channel_map = channel_map_9636_ss; 550 } 551 } 552 553 spin_unlock_irq(&rme9652->lock); 554 return 0; 555 } 556 557 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable) 558 { 559 int i; 560 561 rme9652->passthru = 0; 562 563 if (channel < 0) { 564 565 /* set thru for all channels */ 566 567 if (enable) { 568 for (i = 0; i < RME9652_NCHANNELS; i++) { 569 rme9652->thru_bits |= (1 << i); 570 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1); 571 } 572 } else { 573 for (i = 0; i < RME9652_NCHANNELS; i++) { 574 rme9652->thru_bits &= ~(1 << i); 575 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0); 576 } 577 } 578 579 } else { 580 int mapped_channel; 581 582 mapped_channel = rme9652->channel_map[channel]; 583 584 if (enable) { 585 rme9652->thru_bits |= (1 << mapped_channel); 586 } else { 587 rme9652->thru_bits &= ~(1 << mapped_channel); 588 } 589 590 rme9652_write(rme9652, 591 RME9652_thru_base + mapped_channel * 4, 592 enable ? 1 : 0); 593 } 594 } 595 596 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff) 597 { 598 if (onoff) { 599 rme9652_set_thru(rme9652, -1, 1); 600 601 /* we don't want interrupts, so do a 602 custom version of rme9652_start(). 603 */ 604 605 rme9652->control_register = 606 RME9652_inp_0 | 607 rme9652_encode_latency(7) | 608 RME9652_start_bit; 609 610 rme9652_reset_hw_pointer(rme9652); 611 612 rme9652_write(rme9652, RME9652_control_register, 613 rme9652->control_register); 614 rme9652->passthru = 1; 615 } else { 616 rme9652_set_thru(rme9652, -1, 0); 617 rme9652_stop(rme9652); 618 rme9652->passthru = 0; 619 } 620 621 return 0; 622 } 623 624 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff) 625 { 626 if (onoff) 627 rme9652->control_register |= mask; 628 else 629 rme9652->control_register &= ~mask; 630 631 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 632 } 633 634 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val) 635 { 636 long mask; 637 long i; 638 639 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { 640 if (val & mask) 641 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1); 642 else 643 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0); 644 645 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); 646 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); 647 } 648 } 649 650 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652) 651 { 652 long mask; 653 long val; 654 long i; 655 656 val = 0; 657 658 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { 659 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); 660 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ) 661 val |= mask; 662 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); 663 } 664 665 return val; 666 } 667 668 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data) 669 { 670 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 671 rme9652_spdif_write_byte (rme9652, 0x20); 672 rme9652_spdif_write_byte (rme9652, address); 673 rme9652_spdif_write_byte (rme9652, data); 674 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 675 } 676 677 678 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address) 679 { 680 int ret; 681 682 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 683 rme9652_spdif_write_byte (rme9652, 0x20); 684 rme9652_spdif_write_byte (rme9652, address); 685 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 686 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 687 688 rme9652_spdif_write_byte (rme9652, 0x21); 689 ret = rme9652_spdif_read_byte (rme9652); 690 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 691 692 return ret; 693 } 694 695 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652) 696 { 697 /* XXX what unsets this ? */ 698 699 rme9652->control_register |= RME9652_SPDIF_RESET; 700 701 rme9652_write_spdif_codec (rme9652, 4, 0x40); 702 rme9652_write_spdif_codec (rme9652, 17, 0x13); 703 rme9652_write_spdif_codec (rme9652, 6, 0x02); 704 } 705 706 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s) 707 { 708 unsigned int rate_bits; 709 710 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) { 711 return -1; /* error condition */ 712 } 713 714 if (s->hw_rev == 15) { 715 716 int x, y, ret; 717 718 x = rme9652_spdif_read_codec (s, 30); 719 720 if (x != 0) 721 y = 48000 * 64 / x; 722 else 723 y = 0; 724 725 if (y > 30400 && y < 33600) ret = 32000; 726 else if (y > 41900 && y < 46000) ret = 44100; 727 else if (y > 46000 && y < 50400) ret = 48000; 728 else if (y > 60800 && y < 67200) ret = 64000; 729 else if (y > 83700 && y < 92000) ret = 88200; 730 else if (y > 92000 && y < 100000) ret = 96000; 731 else ret = 0; 732 return ret; 733 } 734 735 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F; 736 737 switch (rme9652_decode_spdif_rate(rate_bits)) { 738 case 0x7: 739 return 32000; 740 break; 741 742 case 0x6: 743 return 44100; 744 break; 745 746 case 0x5: 747 return 48000; 748 break; 749 750 case 0x4: 751 return 88200; 752 break; 753 754 case 0x3: 755 return 96000; 756 break; 757 758 case 0x0: 759 return 64000; 760 break; 761 762 default: 763 dev_err(s->card->dev, 764 "%s: unknown S/PDIF input rate (bits = 0x%x)\n", 765 s->card_name, rate_bits); 766 return 0; 767 break; 768 } 769 } 770 771 /*----------------------------------------------------------------------------- 772 Control Interface 773 ----------------------------------------------------------------------------*/ 774 775 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes) 776 { 777 u32 val = 0; 778 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0; 779 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0; 780 if (val & RME9652_PRO) 781 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0; 782 else 783 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0; 784 return val; 785 } 786 787 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val) 788 { 789 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) | 790 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0); 791 if (val & RME9652_PRO) 792 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0; 793 else 794 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0; 795 } 796 797 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 798 { 799 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 800 uinfo->count = 1; 801 return 0; 802 } 803 804 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 805 { 806 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 807 808 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif); 809 return 0; 810 } 811 812 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 813 { 814 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 815 int change; 816 u32 val; 817 818 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); 819 spin_lock_irq(&rme9652->lock); 820 change = val != rme9652->creg_spdif; 821 rme9652->creg_spdif = val; 822 spin_unlock_irq(&rme9652->lock); 823 return change; 824 } 825 826 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 827 { 828 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 829 uinfo->count = 1; 830 return 0; 831 } 832 833 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 834 { 835 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 836 837 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream); 838 return 0; 839 } 840 841 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 842 { 843 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 844 int change; 845 u32 val; 846 847 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); 848 spin_lock_irq(&rme9652->lock); 849 change = val != rme9652->creg_spdif_stream; 850 rme9652->creg_spdif_stream = val; 851 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); 852 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val); 853 spin_unlock_irq(&rme9652->lock); 854 return change; 855 } 856 857 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 858 { 859 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 860 uinfo->count = 1; 861 return 0; 862 } 863 864 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 865 { 866 ucontrol->value.iec958.status[0] = kcontrol->private_value; 867 return 0; 868 } 869 870 #define RME9652_ADAT1_IN(xname, xindex) \ 871 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 872 .info = snd_rme9652_info_adat1_in, \ 873 .get = snd_rme9652_get_adat1_in, \ 874 .put = snd_rme9652_put_adat1_in } 875 876 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652) 877 { 878 if (rme9652->control_register & RME9652_ADAT1_INTERNAL) 879 return 1; 880 return 0; 881 } 882 883 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal) 884 { 885 int restart = 0; 886 887 if (internal) { 888 rme9652->control_register |= RME9652_ADAT1_INTERNAL; 889 } else { 890 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL; 891 } 892 893 /* XXX do we actually need to stop the card when we do this ? */ 894 895 if ((restart = rme9652->running)) { 896 rme9652_stop(rme9652); 897 } 898 899 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 900 901 if (restart) { 902 rme9652_start(rme9652); 903 } 904 905 return 0; 906 } 907 908 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 909 { 910 static const char * const texts[2] = {"ADAT1", "Internal"}; 911 912 return snd_ctl_enum_info(uinfo, 1, 2, texts); 913 } 914 915 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 916 { 917 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 918 919 spin_lock_irq(&rme9652->lock); 920 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652); 921 spin_unlock_irq(&rme9652->lock); 922 return 0; 923 } 924 925 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 926 { 927 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 928 int change; 929 unsigned int val; 930 931 if (!snd_rme9652_use_is_exclusive(rme9652)) 932 return -EBUSY; 933 val = ucontrol->value.enumerated.item[0] % 2; 934 spin_lock_irq(&rme9652->lock); 935 change = val != rme9652_adat1_in(rme9652); 936 if (change) 937 rme9652_set_adat1_input(rme9652, val); 938 spin_unlock_irq(&rme9652->lock); 939 return change; 940 } 941 942 #define RME9652_SPDIF_IN(xname, xindex) \ 943 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 944 .info = snd_rme9652_info_spdif_in, \ 945 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in } 946 947 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652) 948 { 949 return rme9652_decode_spdif_in(rme9652->control_register & 950 RME9652_inp); 951 } 952 953 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in) 954 { 955 int restart = 0; 956 957 rme9652->control_register &= ~RME9652_inp; 958 rme9652->control_register |= rme9652_encode_spdif_in(in); 959 960 if ((restart = rme9652->running)) { 961 rme9652_stop(rme9652); 962 } 963 964 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 965 966 if (restart) { 967 rme9652_start(rme9652); 968 } 969 970 return 0; 971 } 972 973 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 974 { 975 static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"}; 976 977 return snd_ctl_enum_info(uinfo, 1, 3, texts); 978 } 979 980 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 981 { 982 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 983 984 spin_lock_irq(&rme9652->lock); 985 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652); 986 spin_unlock_irq(&rme9652->lock); 987 return 0; 988 } 989 990 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 991 { 992 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 993 int change; 994 unsigned int val; 995 996 if (!snd_rme9652_use_is_exclusive(rme9652)) 997 return -EBUSY; 998 val = ucontrol->value.enumerated.item[0] % 3; 999 spin_lock_irq(&rme9652->lock); 1000 change = val != rme9652_spdif_in(rme9652); 1001 if (change) 1002 rme9652_set_spdif_input(rme9652, val); 1003 spin_unlock_irq(&rme9652->lock); 1004 return change; 1005 } 1006 1007 #define RME9652_SPDIF_OUT(xname, xindex) \ 1008 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1009 .info = snd_rme9652_info_spdif_out, \ 1010 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out } 1011 1012 static int rme9652_spdif_out(struct snd_rme9652 *rme9652) 1013 { 1014 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0; 1015 } 1016 1017 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out) 1018 { 1019 int restart = 0; 1020 1021 if (out) { 1022 rme9652->control_register |= RME9652_opt_out; 1023 } else { 1024 rme9652->control_register &= ~RME9652_opt_out; 1025 } 1026 1027 if ((restart = rme9652->running)) { 1028 rme9652_stop(rme9652); 1029 } 1030 1031 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1032 1033 if (restart) { 1034 rme9652_start(rme9652); 1035 } 1036 1037 return 0; 1038 } 1039 1040 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info 1041 1042 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1043 { 1044 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1045 1046 spin_lock_irq(&rme9652->lock); 1047 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652); 1048 spin_unlock_irq(&rme9652->lock); 1049 return 0; 1050 } 1051 1052 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1053 { 1054 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1055 int change; 1056 unsigned int val; 1057 1058 if (!snd_rme9652_use_is_exclusive(rme9652)) 1059 return -EBUSY; 1060 val = ucontrol->value.integer.value[0] & 1; 1061 spin_lock_irq(&rme9652->lock); 1062 change = (int)val != rme9652_spdif_out(rme9652); 1063 rme9652_set_spdif_output(rme9652, val); 1064 spin_unlock_irq(&rme9652->lock); 1065 return change; 1066 } 1067 1068 #define RME9652_SYNC_MODE(xname, xindex) \ 1069 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1070 .info = snd_rme9652_info_sync_mode, \ 1071 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode } 1072 1073 static int rme9652_sync_mode(struct snd_rme9652 *rme9652) 1074 { 1075 if (rme9652->control_register & RME9652_wsel) { 1076 return 2; 1077 } else if (rme9652->control_register & RME9652_Master) { 1078 return 1; 1079 } else { 1080 return 0; 1081 } 1082 } 1083 1084 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode) 1085 { 1086 int restart = 0; 1087 1088 switch (mode) { 1089 case 0: 1090 rme9652->control_register &= 1091 ~(RME9652_Master | RME9652_wsel); 1092 break; 1093 case 1: 1094 rme9652->control_register = 1095 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master; 1096 break; 1097 case 2: 1098 rme9652->control_register |= 1099 (RME9652_Master | RME9652_wsel); 1100 break; 1101 } 1102 1103 if ((restart = rme9652->running)) { 1104 rme9652_stop(rme9652); 1105 } 1106 1107 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1108 1109 if (restart) { 1110 rme9652_start(rme9652); 1111 } 1112 1113 return 0; 1114 } 1115 1116 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1117 { 1118 static const char * const texts[3] = { 1119 "AutoSync", "Master", "Word Clock" 1120 }; 1121 1122 return snd_ctl_enum_info(uinfo, 1, 3, texts); 1123 } 1124 1125 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1126 { 1127 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1128 1129 spin_lock_irq(&rme9652->lock); 1130 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652); 1131 spin_unlock_irq(&rme9652->lock); 1132 return 0; 1133 } 1134 1135 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1136 { 1137 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1138 int change; 1139 unsigned int val; 1140 1141 val = ucontrol->value.enumerated.item[0] % 3; 1142 spin_lock_irq(&rme9652->lock); 1143 change = (int)val != rme9652_sync_mode(rme9652); 1144 rme9652_set_sync_mode(rme9652, val); 1145 spin_unlock_irq(&rme9652->lock); 1146 return change; 1147 } 1148 1149 #define RME9652_SYNC_PREF(xname, xindex) \ 1150 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1151 .info = snd_rme9652_info_sync_pref, \ 1152 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref } 1153 1154 static int rme9652_sync_pref(struct snd_rme9652 *rme9652) 1155 { 1156 switch (rme9652->control_register & RME9652_SyncPref_Mask) { 1157 case RME9652_SyncPref_ADAT1: 1158 return RME9652_SYNC_FROM_ADAT1; 1159 case RME9652_SyncPref_ADAT2: 1160 return RME9652_SYNC_FROM_ADAT2; 1161 case RME9652_SyncPref_ADAT3: 1162 return RME9652_SYNC_FROM_ADAT3; 1163 case RME9652_SyncPref_SPDIF: 1164 return RME9652_SYNC_FROM_SPDIF; 1165 } 1166 /* Not reachable */ 1167 return 0; 1168 } 1169 1170 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref) 1171 { 1172 int restart; 1173 1174 rme9652->control_register &= ~RME9652_SyncPref_Mask; 1175 switch (pref) { 1176 case RME9652_SYNC_FROM_ADAT1: 1177 rme9652->control_register |= RME9652_SyncPref_ADAT1; 1178 break; 1179 case RME9652_SYNC_FROM_ADAT2: 1180 rme9652->control_register |= RME9652_SyncPref_ADAT2; 1181 break; 1182 case RME9652_SYNC_FROM_ADAT3: 1183 rme9652->control_register |= RME9652_SyncPref_ADAT3; 1184 break; 1185 case RME9652_SYNC_FROM_SPDIF: 1186 rme9652->control_register |= RME9652_SyncPref_SPDIF; 1187 break; 1188 } 1189 1190 if ((restart = rme9652->running)) { 1191 rme9652_stop(rme9652); 1192 } 1193 1194 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1195 1196 if (restart) { 1197 rme9652_start(rme9652); 1198 } 1199 1200 return 0; 1201 } 1202 1203 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1204 { 1205 static const char * const texts[4] = { 1206 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In" 1207 }; 1208 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1209 1210 return snd_ctl_enum_info(uinfo, 1, 1211 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3, 1212 texts); 1213 } 1214 1215 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1216 { 1217 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1218 1219 spin_lock_irq(&rme9652->lock); 1220 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652); 1221 spin_unlock_irq(&rme9652->lock); 1222 return 0; 1223 } 1224 1225 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1226 { 1227 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1228 int change, max; 1229 unsigned int val; 1230 1231 if (!snd_rme9652_use_is_exclusive(rme9652)) 1232 return -EBUSY; 1233 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; 1234 val = ucontrol->value.enumerated.item[0] % max; 1235 spin_lock_irq(&rme9652->lock); 1236 change = (int)val != rme9652_sync_pref(rme9652); 1237 rme9652_set_sync_pref(rme9652, val); 1238 spin_unlock_irq(&rme9652->lock); 1239 return change; 1240 } 1241 1242 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1243 { 1244 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1245 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1246 uinfo->count = rme9652->ss_channels; 1247 uinfo->value.integer.min = 0; 1248 uinfo->value.integer.max = 1; 1249 return 0; 1250 } 1251 1252 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1253 { 1254 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1255 unsigned int k; 1256 u32 thru_bits = rme9652->thru_bits; 1257 1258 for (k = 0; k < rme9652->ss_channels; ++k) { 1259 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k)); 1260 } 1261 return 0; 1262 } 1263 1264 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1265 { 1266 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1267 int change; 1268 unsigned int chn; 1269 u32 thru_bits = 0; 1270 1271 if (!snd_rme9652_use_is_exclusive(rme9652)) 1272 return -EBUSY; 1273 1274 for (chn = 0; chn < rme9652->ss_channels; ++chn) { 1275 if (ucontrol->value.integer.value[chn]) 1276 thru_bits |= 1 << chn; 1277 } 1278 1279 spin_lock_irq(&rme9652->lock); 1280 change = thru_bits ^ rme9652->thru_bits; 1281 if (change) { 1282 for (chn = 0; chn < rme9652->ss_channels; ++chn) { 1283 if (!(change & (1 << chn))) 1284 continue; 1285 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn)); 1286 } 1287 } 1288 spin_unlock_irq(&rme9652->lock); 1289 return !!change; 1290 } 1291 1292 #define RME9652_PASSTHRU(xname, xindex) \ 1293 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1294 .info = snd_rme9652_info_passthru, \ 1295 .put = snd_rme9652_put_passthru, \ 1296 .get = snd_rme9652_get_passthru } 1297 1298 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info 1299 1300 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1301 { 1302 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1303 1304 spin_lock_irq(&rme9652->lock); 1305 ucontrol->value.integer.value[0] = rme9652->passthru; 1306 spin_unlock_irq(&rme9652->lock); 1307 return 0; 1308 } 1309 1310 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1311 { 1312 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1313 int change; 1314 unsigned int val; 1315 int err = 0; 1316 1317 if (!snd_rme9652_use_is_exclusive(rme9652)) 1318 return -EBUSY; 1319 1320 val = ucontrol->value.integer.value[0] & 1; 1321 spin_lock_irq(&rme9652->lock); 1322 change = (ucontrol->value.integer.value[0] != rme9652->passthru); 1323 if (change) 1324 err = rme9652_set_passthru(rme9652, val); 1325 spin_unlock_irq(&rme9652->lock); 1326 return err ? err : change; 1327 } 1328 1329 /* Read-only switches */ 1330 1331 #define RME9652_SPDIF_RATE(xname, xindex) \ 1332 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1333 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1334 .info = snd_rme9652_info_spdif_rate, \ 1335 .get = snd_rme9652_get_spdif_rate } 1336 1337 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1338 { 1339 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1340 uinfo->count = 1; 1341 uinfo->value.integer.min = 0; 1342 uinfo->value.integer.max = 96000; 1343 return 0; 1344 } 1345 1346 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1347 { 1348 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1349 1350 spin_lock_irq(&rme9652->lock); 1351 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652); 1352 spin_unlock_irq(&rme9652->lock); 1353 return 0; 1354 } 1355 1356 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \ 1357 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1358 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1359 .info = snd_rme9652_info_adat_sync, \ 1360 .get = snd_rme9652_get_adat_sync, .private_value = xidx } 1361 1362 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1363 { 1364 static const char * const texts[4] = { 1365 "No Lock", "Lock", "No Lock Sync", "Lock Sync" 1366 }; 1367 1368 return snd_ctl_enum_info(uinfo, 1, 4, texts); 1369 } 1370 1371 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1372 { 1373 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1374 unsigned int mask1, mask2, val; 1375 1376 switch (kcontrol->private_value) { 1377 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break; 1378 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break; 1379 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break; 1380 default: return -EINVAL; 1381 } 1382 val = rme9652_read(rme9652, RME9652_status_register); 1383 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0; 1384 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0; 1385 return 0; 1386 } 1387 1388 #define RME9652_TC_VALID(xname, xindex) \ 1389 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1390 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1391 .info = snd_rme9652_info_tc_valid, \ 1392 .get = snd_rme9652_get_tc_valid } 1393 1394 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info 1395 1396 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1397 { 1398 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1399 1400 ucontrol->value.integer.value[0] = 1401 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0; 1402 return 0; 1403 } 1404 1405 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE 1406 1407 /* FIXME: this routine needs a port to the new control API --jk */ 1408 1409 static int snd_rme9652_get_tc_value(void *private_data, 1410 snd_kswitch_t *kswitch, 1411 snd_switch_t *uswitch) 1412 { 1413 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data; 1414 u32 value; 1415 int i; 1416 1417 uswitch->type = SNDRV_SW_TYPE_DWORD; 1418 1419 if ((rme9652_read(s, RME9652_status_register) & 1420 RME9652_tc_valid) == 0) { 1421 uswitch->value.data32[0] = 0; 1422 return 0; 1423 } 1424 1425 /* timecode request */ 1426 1427 rme9652_write(s, RME9652_time_code, 0); 1428 1429 /* XXX bug alert: loop-based timing !!!! */ 1430 1431 for (i = 0; i < 50; i++) { 1432 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) 1433 break; 1434 } 1435 1436 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) { 1437 return -EIO; 1438 } 1439 1440 value = 0; 1441 1442 for (i = 0; i < 32; i++) { 1443 value >>= 1; 1444 1445 if (rme9652_read(s, i * 4) & RME9652_tc_out) 1446 value |= 0x80000000; 1447 } 1448 1449 if (value > 2 * 60 * 48000) { 1450 value -= 2 * 60 * 48000; 1451 } else { 1452 value = 0; 1453 } 1454 1455 uswitch->value.data32[0] = value; 1456 1457 return 0; 1458 } 1459 1460 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */ 1461 1462 static struct snd_kcontrol_new snd_rme9652_controls[] = { 1463 { 1464 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1465 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1466 .info = snd_rme9652_control_spdif_info, 1467 .get = snd_rme9652_control_spdif_get, 1468 .put = snd_rme9652_control_spdif_put, 1469 }, 1470 { 1471 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1472 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1473 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1474 .info = snd_rme9652_control_spdif_stream_info, 1475 .get = snd_rme9652_control_spdif_stream_get, 1476 .put = snd_rme9652_control_spdif_stream_put, 1477 }, 1478 { 1479 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1480 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1481 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1482 .info = snd_rme9652_control_spdif_mask_info, 1483 .get = snd_rme9652_control_spdif_mask_get, 1484 .private_value = IEC958_AES0_NONAUDIO | 1485 IEC958_AES0_PROFESSIONAL | 1486 IEC958_AES0_CON_EMPHASIS, 1487 }, 1488 { 1489 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1490 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1491 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), 1492 .info = snd_rme9652_control_spdif_mask_info, 1493 .get = snd_rme9652_control_spdif_mask_get, 1494 .private_value = IEC958_AES0_NONAUDIO | 1495 IEC958_AES0_PROFESSIONAL | 1496 IEC958_AES0_PRO_EMPHASIS, 1497 }, 1498 RME9652_SPDIF_IN("IEC958 Input Connector", 0), 1499 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0), 1500 RME9652_SYNC_MODE("Sync Mode", 0), 1501 RME9652_SYNC_PREF("Preferred Sync Source", 0), 1502 { 1503 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1504 .name = "Channels Thru", 1505 .index = 0, 1506 .info = snd_rme9652_info_thru, 1507 .get = snd_rme9652_get_thru, 1508 .put = snd_rme9652_put_thru, 1509 }, 1510 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0), 1511 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0), 1512 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1), 1513 RME9652_TC_VALID("Timecode Valid", 0), 1514 RME9652_PASSTHRU("Passthru", 0) 1515 }; 1516 1517 static struct snd_kcontrol_new snd_rme9652_adat3_check = 1518 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2); 1519 1520 static struct snd_kcontrol_new snd_rme9652_adat1_input = 1521 RME9652_ADAT1_IN("ADAT1 Input Source", 0); 1522 1523 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652) 1524 { 1525 unsigned int idx; 1526 int err; 1527 struct snd_kcontrol *kctl; 1528 1529 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) { 1530 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0) 1531 return err; 1532 if (idx == 1) /* IEC958 (S/PDIF) Stream */ 1533 rme9652->spdif_ctl = kctl; 1534 } 1535 1536 if (rme9652->ss_channels == RME9652_NCHANNELS) 1537 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0) 1538 return err; 1539 1540 if (rme9652->hw_rev >= 15) 1541 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0) 1542 return err; 1543 1544 return 0; 1545 } 1546 1547 /*------------------------------------------------------------ 1548 /proc interface 1549 ------------------------------------------------------------*/ 1550 1551 static void 1552 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 1553 { 1554 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data; 1555 u32 thru_bits = rme9652->thru_bits; 1556 int show_auto_sync_source = 0; 1557 int i; 1558 unsigned int status; 1559 int x; 1560 1561 status = rme9652_read(rme9652, RME9652_status_register); 1562 1563 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1); 1564 snd_iprintf(buffer, "Buffers: capture %p playback %p\n", 1565 rme9652->capture_buffer, rme9652->playback_buffer); 1566 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", 1567 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase); 1568 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register); 1569 1570 snd_iprintf(buffer, "\n"); 1571 1572 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register & 1573 RME9652_latency)); 1574 1575 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n", 1576 x, (unsigned long) rme9652->period_bytes); 1577 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", 1578 rme9652_hw_pointer(rme9652)); 1579 snd_iprintf(buffer, "Passthru: %s\n", 1580 rme9652->passthru ? "yes" : "no"); 1581 1582 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) { 1583 snd_iprintf(buffer, "Clock mode: autosync\n"); 1584 show_auto_sync_source = 1; 1585 } else if (rme9652->control_register & RME9652_wsel) { 1586 if (status & RME9652_wsel_rd) { 1587 snd_iprintf(buffer, "Clock mode: word clock\n"); 1588 } else { 1589 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n"); 1590 } 1591 } else { 1592 snd_iprintf(buffer, "Clock mode: master\n"); 1593 } 1594 1595 if (show_auto_sync_source) { 1596 switch (rme9652->control_register & RME9652_SyncPref_Mask) { 1597 case RME9652_SyncPref_ADAT1: 1598 snd_iprintf(buffer, "Pref. sync source: ADAT1\n"); 1599 break; 1600 case RME9652_SyncPref_ADAT2: 1601 snd_iprintf(buffer, "Pref. sync source: ADAT2\n"); 1602 break; 1603 case RME9652_SyncPref_ADAT3: 1604 snd_iprintf(buffer, "Pref. sync source: ADAT3\n"); 1605 break; 1606 case RME9652_SyncPref_SPDIF: 1607 snd_iprintf(buffer, "Pref. sync source: IEC958\n"); 1608 break; 1609 default: 1610 snd_iprintf(buffer, "Pref. sync source: ???\n"); 1611 } 1612 } 1613 1614 if (rme9652->hw_rev >= 15) 1615 snd_iprintf(buffer, "\nADAT1 Input source: %s\n", 1616 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ? 1617 "Internal" : "ADAT1 optical"); 1618 1619 snd_iprintf(buffer, "\n"); 1620 1621 switch (rme9652_decode_spdif_in(rme9652->control_register & 1622 RME9652_inp)) { 1623 case RME9652_SPDIFIN_OPTICAL: 1624 snd_iprintf(buffer, "IEC958 input: ADAT1\n"); 1625 break; 1626 case RME9652_SPDIFIN_COAXIAL: 1627 snd_iprintf(buffer, "IEC958 input: Coaxial\n"); 1628 break; 1629 case RME9652_SPDIFIN_INTERN: 1630 snd_iprintf(buffer, "IEC958 input: Internal\n"); 1631 break; 1632 default: 1633 snd_iprintf(buffer, "IEC958 input: ???\n"); 1634 break; 1635 } 1636 1637 if (rme9652->control_register & RME9652_opt_out) { 1638 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n"); 1639 } else { 1640 snd_iprintf(buffer, "IEC958 output: Coaxial only\n"); 1641 } 1642 1643 if (rme9652->control_register & RME9652_PRO) { 1644 snd_iprintf(buffer, "IEC958 quality: Professional\n"); 1645 } else { 1646 snd_iprintf(buffer, "IEC958 quality: Consumer\n"); 1647 } 1648 1649 if (rme9652->control_register & RME9652_EMP) { 1650 snd_iprintf(buffer, "IEC958 emphasis: on\n"); 1651 } else { 1652 snd_iprintf(buffer, "IEC958 emphasis: off\n"); 1653 } 1654 1655 if (rme9652->control_register & RME9652_Dolby) { 1656 snd_iprintf(buffer, "IEC958 Dolby: on\n"); 1657 } else { 1658 snd_iprintf(buffer, "IEC958 Dolby: off\n"); 1659 } 1660 1661 i = rme9652_spdif_sample_rate(rme9652); 1662 1663 if (i < 0) { 1664 snd_iprintf(buffer, 1665 "IEC958 sample rate: error flag set\n"); 1666 } else if (i == 0) { 1667 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n"); 1668 } else { 1669 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i); 1670 } 1671 1672 snd_iprintf(buffer, "\n"); 1673 1674 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n", 1675 rme9652_adat_sample_rate(rme9652)); 1676 1677 /* Sync Check */ 1678 1679 x = status & RME9652_sync_0; 1680 if (status & RME9652_lock_0) { 1681 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock"); 1682 } else { 1683 snd_iprintf(buffer, "ADAT1: No Lock\n"); 1684 } 1685 1686 x = status & RME9652_sync_1; 1687 if (status & RME9652_lock_1) { 1688 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock"); 1689 } else { 1690 snd_iprintf(buffer, "ADAT2: No Lock\n"); 1691 } 1692 1693 x = status & RME9652_sync_2; 1694 if (status & RME9652_lock_2) { 1695 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock"); 1696 } else { 1697 snd_iprintf(buffer, "ADAT3: No Lock\n"); 1698 } 1699 1700 snd_iprintf(buffer, "\n"); 1701 1702 snd_iprintf(buffer, "Timecode signal: %s\n", 1703 (status & RME9652_tc_valid) ? "yes" : "no"); 1704 1705 /* thru modes */ 1706 1707 snd_iprintf(buffer, "Punch Status:\n\n"); 1708 1709 for (i = 0; i < rme9652->ss_channels; i++) { 1710 if (thru_bits & (1 << i)) { 1711 snd_iprintf(buffer, "%2d: on ", i + 1); 1712 } else { 1713 snd_iprintf(buffer, "%2d: off ", i + 1); 1714 } 1715 1716 if (((i + 1) % 8) == 0) { 1717 snd_iprintf(buffer, "\n"); 1718 } 1719 } 1720 1721 snd_iprintf(buffer, "\n"); 1722 } 1723 1724 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652) 1725 { 1726 snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652, 1727 snd_rme9652_proc_read); 1728 } 1729 1730 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652) 1731 { 1732 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci); 1733 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci); 1734 } 1735 1736 static int snd_rme9652_free(struct snd_rme9652 *rme9652) 1737 { 1738 if (rme9652->irq >= 0) 1739 rme9652_stop(rme9652); 1740 snd_rme9652_free_buffers(rme9652); 1741 1742 if (rme9652->irq >= 0) 1743 free_irq(rme9652->irq, (void *)rme9652); 1744 iounmap(rme9652->iobase); 1745 if (rme9652->port) 1746 pci_release_regions(rme9652->pci); 1747 1748 pci_disable_device(rme9652->pci); 1749 return 0; 1750 } 1751 1752 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652) 1753 { 1754 unsigned long pb_bus, cb_bus; 1755 1756 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 || 1757 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) { 1758 if (rme9652->capture_dma_buf.area) 1759 snd_dma_free_pages(&rme9652->capture_dma_buf); 1760 dev_err(rme9652->card->dev, 1761 "%s: no buffers available\n", rme9652->card_name); 1762 return -ENOMEM; 1763 } 1764 1765 /* Align to bus-space 64K boundary */ 1766 1767 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul); 1768 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul); 1769 1770 /* Tell the card where it is */ 1771 1772 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus); 1773 rme9652_write(rme9652, RME9652_play_buffer, pb_bus); 1774 1775 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr); 1776 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr); 1777 1778 return 0; 1779 } 1780 1781 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652) 1782 { 1783 unsigned int k; 1784 1785 /* ASSUMPTION: rme9652->lock is either held, or 1786 there is no need to hold it (e.g. during module 1787 initialization). 1788 */ 1789 1790 /* set defaults: 1791 1792 SPDIF Input via Coax 1793 autosync clock mode 1794 maximum latency (7 = 8192 samples, 64Kbyte buffer, 1795 which implies 2 4096 sample, 32Kbyte periods). 1796 1797 if rev 1.5, initialize the S/PDIF receiver. 1798 1799 */ 1800 1801 rme9652->control_register = 1802 RME9652_inp_0 | rme9652_encode_latency(7); 1803 1804 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1805 1806 rme9652_reset_hw_pointer(rme9652); 1807 rme9652_compute_period_size(rme9652); 1808 1809 /* default: thru off for all channels */ 1810 1811 for (k = 0; k < RME9652_NCHANNELS; ++k) 1812 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0); 1813 1814 rme9652->thru_bits = 0; 1815 rme9652->passthru = 0; 1816 1817 /* set a default rate so that the channel map is set up */ 1818 1819 rme9652_set_rate(rme9652, 48000); 1820 } 1821 1822 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id) 1823 { 1824 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id; 1825 1826 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) { 1827 return IRQ_NONE; 1828 } 1829 1830 rme9652_write(rme9652, RME9652_irq_clear, 0); 1831 1832 if (rme9652->capture_substream) { 1833 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream); 1834 } 1835 1836 if (rme9652->playback_substream) { 1837 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream); 1838 } 1839 return IRQ_HANDLED; 1840 } 1841 1842 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream) 1843 { 1844 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1845 return rme9652_hw_pointer(rme9652); 1846 } 1847 1848 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652, 1849 int stream, 1850 int channel) 1851 1852 { 1853 int mapped_channel; 1854 1855 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS)) 1856 return NULL; 1857 1858 if ((mapped_channel = rme9652->channel_map[channel]) < 0) { 1859 return NULL; 1860 } 1861 1862 if (stream == SNDRV_PCM_STREAM_CAPTURE) { 1863 return rme9652->capture_buffer + 1864 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); 1865 } else { 1866 return rme9652->playback_buffer + 1867 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); 1868 } 1869 } 1870 1871 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, 1872 int channel, unsigned long pos, 1873 void __user *src, unsigned long count) 1874 { 1875 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1876 char *channel_buf; 1877 1878 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES)) 1879 return -EINVAL; 1880 1881 channel_buf = rme9652_channel_buffer_location (rme9652, 1882 substream->pstr->stream, 1883 channel); 1884 if (snd_BUG_ON(!channel_buf)) 1885 return -EIO; 1886 if (copy_from_user(channel_buf + pos, src, count)) 1887 return -EFAULT; 1888 return 0; 1889 } 1890 1891 static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream, 1892 int channel, unsigned long pos, 1893 void *src, unsigned long count) 1894 { 1895 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1896 char *channel_buf; 1897 1898 channel_buf = rme9652_channel_buffer_location(rme9652, 1899 substream->pstr->stream, 1900 channel); 1901 if (snd_BUG_ON(!channel_buf)) 1902 return -EIO; 1903 memcpy(channel_buf + pos, src, count); 1904 return 0; 1905 } 1906 1907 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, 1908 int channel, unsigned long pos, 1909 void __user *dst, unsigned long count) 1910 { 1911 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1912 char *channel_buf; 1913 1914 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES)) 1915 return -EINVAL; 1916 1917 channel_buf = rme9652_channel_buffer_location (rme9652, 1918 substream->pstr->stream, 1919 channel); 1920 if (snd_BUG_ON(!channel_buf)) 1921 return -EIO; 1922 if (copy_to_user(dst, channel_buf + pos, count)) 1923 return -EFAULT; 1924 return 0; 1925 } 1926 1927 static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream, 1928 int channel, unsigned long pos, 1929 void *dst, unsigned long count) 1930 { 1931 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1932 char *channel_buf; 1933 1934 channel_buf = rme9652_channel_buffer_location(rme9652, 1935 substream->pstr->stream, 1936 channel); 1937 if (snd_BUG_ON(!channel_buf)) 1938 return -EIO; 1939 memcpy(dst, channel_buf + pos, count); 1940 return 0; 1941 } 1942 1943 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, 1944 int channel, unsigned long pos, 1945 unsigned long count) 1946 { 1947 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1948 char *channel_buf; 1949 1950 channel_buf = rme9652_channel_buffer_location (rme9652, 1951 substream->pstr->stream, 1952 channel); 1953 if (snd_BUG_ON(!channel_buf)) 1954 return -EIO; 1955 memset(channel_buf + pos, 0, count); 1956 return 0; 1957 } 1958 1959 static int snd_rme9652_reset(struct snd_pcm_substream *substream) 1960 { 1961 struct snd_pcm_runtime *runtime = substream->runtime; 1962 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1963 struct snd_pcm_substream *other; 1964 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 1965 other = rme9652->capture_substream; 1966 else 1967 other = rme9652->playback_substream; 1968 if (rme9652->running) 1969 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652); 1970 else 1971 runtime->status->hw_ptr = 0; 1972 if (other) { 1973 struct snd_pcm_substream *s; 1974 struct snd_pcm_runtime *oruntime = other->runtime; 1975 snd_pcm_group_for_each_entry(s, substream) { 1976 if (s == other) { 1977 oruntime->status->hw_ptr = runtime->status->hw_ptr; 1978 break; 1979 } 1980 } 1981 } 1982 return 0; 1983 } 1984 1985 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream, 1986 struct snd_pcm_hw_params *params) 1987 { 1988 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1989 int err; 1990 pid_t this_pid; 1991 pid_t other_pid; 1992 1993 spin_lock_irq(&rme9652->lock); 1994 1995 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1996 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); 1997 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream); 1998 this_pid = rme9652->playback_pid; 1999 other_pid = rme9652->capture_pid; 2000 } else { 2001 this_pid = rme9652->capture_pid; 2002 other_pid = rme9652->playback_pid; 2003 } 2004 2005 if ((other_pid > 0) && (this_pid != other_pid)) { 2006 2007 /* The other stream is open, and not by the same 2008 task as this one. Make sure that the parameters 2009 that matter are the same. 2010 */ 2011 2012 if ((int)params_rate(params) != 2013 rme9652_adat_sample_rate(rme9652)) { 2014 spin_unlock_irq(&rme9652->lock); 2015 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); 2016 return -EBUSY; 2017 } 2018 2019 if (params_period_size(params) != rme9652->period_bytes / 4) { 2020 spin_unlock_irq(&rme9652->lock); 2021 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2022 return -EBUSY; 2023 } 2024 2025 /* We're fine. */ 2026 2027 spin_unlock_irq(&rme9652->lock); 2028 return 0; 2029 2030 } else { 2031 spin_unlock_irq(&rme9652->lock); 2032 } 2033 2034 /* how to make sure that the rate matches an externally-set one ? 2035 */ 2036 2037 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) { 2038 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); 2039 return err; 2040 } 2041 2042 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) { 2043 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2044 return err; 2045 } 2046 2047 return 0; 2048 } 2049 2050 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream, 2051 struct snd_pcm_channel_info *info) 2052 { 2053 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2054 int chn; 2055 2056 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS)) 2057 return -EINVAL; 2058 2059 chn = rme9652->channel_map[array_index_nospec(info->channel, 2060 RME9652_NCHANNELS)]; 2061 if (chn < 0) 2062 return -EINVAL; 2063 2064 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES; 2065 info->first = 0; 2066 info->step = 32; 2067 return 0; 2068 } 2069 2070 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream, 2071 unsigned int cmd, void *arg) 2072 { 2073 switch (cmd) { 2074 case SNDRV_PCM_IOCTL1_RESET: 2075 { 2076 return snd_rme9652_reset(substream); 2077 } 2078 case SNDRV_PCM_IOCTL1_CHANNEL_INFO: 2079 { 2080 struct snd_pcm_channel_info *info = arg; 2081 return snd_rme9652_channel_info(substream, info); 2082 } 2083 default: 2084 break; 2085 } 2086 2087 return snd_pcm_lib_ioctl(substream, cmd, arg); 2088 } 2089 2090 static void rme9652_silence_playback(struct snd_rme9652 *rme9652) 2091 { 2092 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES); 2093 } 2094 2095 static int snd_rme9652_trigger(struct snd_pcm_substream *substream, 2096 int cmd) 2097 { 2098 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2099 struct snd_pcm_substream *other; 2100 int running; 2101 spin_lock(&rme9652->lock); 2102 running = rme9652->running; 2103 switch (cmd) { 2104 case SNDRV_PCM_TRIGGER_START: 2105 running |= 1 << substream->stream; 2106 break; 2107 case SNDRV_PCM_TRIGGER_STOP: 2108 running &= ~(1 << substream->stream); 2109 break; 2110 default: 2111 snd_BUG(); 2112 spin_unlock(&rme9652->lock); 2113 return -EINVAL; 2114 } 2115 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2116 other = rme9652->capture_substream; 2117 else 2118 other = rme9652->playback_substream; 2119 2120 if (other) { 2121 struct snd_pcm_substream *s; 2122 snd_pcm_group_for_each_entry(s, substream) { 2123 if (s == other) { 2124 snd_pcm_trigger_done(s, substream); 2125 if (cmd == SNDRV_PCM_TRIGGER_START) 2126 running |= 1 << s->stream; 2127 else 2128 running &= ~(1 << s->stream); 2129 goto _ok; 2130 } 2131 } 2132 if (cmd == SNDRV_PCM_TRIGGER_START) { 2133 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) && 2134 substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2135 rme9652_silence_playback(rme9652); 2136 } else { 2137 if (running && 2138 substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2139 rme9652_silence_playback(rme9652); 2140 } 2141 } else { 2142 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2143 rme9652_silence_playback(rme9652); 2144 } 2145 _ok: 2146 snd_pcm_trigger_done(substream, substream); 2147 if (!rme9652->running && running) 2148 rme9652_start(rme9652); 2149 else if (rme9652->running && !running) 2150 rme9652_stop(rme9652); 2151 rme9652->running = running; 2152 spin_unlock(&rme9652->lock); 2153 2154 return 0; 2155 } 2156 2157 static int snd_rme9652_prepare(struct snd_pcm_substream *substream) 2158 { 2159 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2160 unsigned long flags; 2161 int result = 0; 2162 2163 spin_lock_irqsave(&rme9652->lock, flags); 2164 if (!rme9652->running) 2165 rme9652_reset_hw_pointer(rme9652); 2166 spin_unlock_irqrestore(&rme9652->lock, flags); 2167 return result; 2168 } 2169 2170 static const struct snd_pcm_hardware snd_rme9652_playback_subinfo = 2171 { 2172 .info = (SNDRV_PCM_INFO_MMAP | 2173 SNDRV_PCM_INFO_MMAP_VALID | 2174 SNDRV_PCM_INFO_NONINTERLEAVED | 2175 SNDRV_PCM_INFO_SYNC_START | 2176 SNDRV_PCM_INFO_DOUBLE), 2177 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2178 .rates = (SNDRV_PCM_RATE_44100 | 2179 SNDRV_PCM_RATE_48000 | 2180 SNDRV_PCM_RATE_88200 | 2181 SNDRV_PCM_RATE_96000), 2182 .rate_min = 44100, 2183 .rate_max = 96000, 2184 .channels_min = 10, 2185 .channels_max = 26, 2186 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26, 2187 .period_bytes_min = (64 * 4) * 10, 2188 .period_bytes_max = (8192 * 4) * 26, 2189 .periods_min = 2, 2190 .periods_max = 2, 2191 .fifo_size = 0, 2192 }; 2193 2194 static const struct snd_pcm_hardware snd_rme9652_capture_subinfo = 2195 { 2196 .info = (SNDRV_PCM_INFO_MMAP | 2197 SNDRV_PCM_INFO_MMAP_VALID | 2198 SNDRV_PCM_INFO_NONINTERLEAVED | 2199 SNDRV_PCM_INFO_SYNC_START), 2200 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2201 .rates = (SNDRV_PCM_RATE_44100 | 2202 SNDRV_PCM_RATE_48000 | 2203 SNDRV_PCM_RATE_88200 | 2204 SNDRV_PCM_RATE_96000), 2205 .rate_min = 44100, 2206 .rate_max = 96000, 2207 .channels_min = 10, 2208 .channels_max = 26, 2209 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26, 2210 .period_bytes_min = (64 * 4) * 10, 2211 .period_bytes_max = (8192 * 4) * 26, 2212 .periods_min = 2, 2213 .periods_max = 2, 2214 .fifo_size = 0, 2215 }; 2216 2217 static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; 2218 2219 static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = { 2220 .count = ARRAY_SIZE(period_sizes), 2221 .list = period_sizes, 2222 .mask = 0 2223 }; 2224 2225 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params, 2226 struct snd_pcm_hw_rule *rule) 2227 { 2228 struct snd_rme9652 *rme9652 = rule->private; 2229 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2230 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels }; 2231 return snd_interval_list(c, 2, list, 0); 2232 } 2233 2234 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params, 2235 struct snd_pcm_hw_rule *rule) 2236 { 2237 struct snd_rme9652 *rme9652 = rule->private; 2238 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2239 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2240 if (r->min > 48000) { 2241 struct snd_interval t = { 2242 .min = rme9652->ds_channels, 2243 .max = rme9652->ds_channels, 2244 .integer = 1, 2245 }; 2246 return snd_interval_refine(c, &t); 2247 } else if (r->max < 88200) { 2248 struct snd_interval t = { 2249 .min = rme9652->ss_channels, 2250 .max = rme9652->ss_channels, 2251 .integer = 1, 2252 }; 2253 return snd_interval_refine(c, &t); 2254 } 2255 return 0; 2256 } 2257 2258 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params, 2259 struct snd_pcm_hw_rule *rule) 2260 { 2261 struct snd_rme9652 *rme9652 = rule->private; 2262 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2263 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2264 if (c->min >= rme9652->ss_channels) { 2265 struct snd_interval t = { 2266 .min = 44100, 2267 .max = 48000, 2268 .integer = 1, 2269 }; 2270 return snd_interval_refine(r, &t); 2271 } else if (c->max <= rme9652->ds_channels) { 2272 struct snd_interval t = { 2273 .min = 88200, 2274 .max = 96000, 2275 .integer = 1, 2276 }; 2277 return snd_interval_refine(r, &t); 2278 } 2279 return 0; 2280 } 2281 2282 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream) 2283 { 2284 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2285 struct snd_pcm_runtime *runtime = substream->runtime; 2286 2287 spin_lock_irq(&rme9652->lock); 2288 2289 snd_pcm_set_sync(substream); 2290 2291 runtime->hw = snd_rme9652_playback_subinfo; 2292 runtime->dma_area = rme9652->playback_buffer; 2293 runtime->dma_bytes = RME9652_DMA_AREA_BYTES; 2294 2295 if (rme9652->capture_substream == NULL) { 2296 rme9652_stop(rme9652); 2297 rme9652_set_thru(rme9652, -1, 0); 2298 } 2299 2300 rme9652->playback_pid = current->pid; 2301 rme9652->playback_substream = substream; 2302 2303 spin_unlock_irq(&rme9652->lock); 2304 2305 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 2306 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); 2307 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2308 snd_rme9652_hw_rule_channels, rme9652, 2309 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2310 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2311 snd_rme9652_hw_rule_channels_rate, rme9652, 2312 SNDRV_PCM_HW_PARAM_RATE, -1); 2313 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 2314 snd_rme9652_hw_rule_rate_channels, rme9652, 2315 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2316 2317 rme9652->creg_spdif_stream = rme9652->creg_spdif; 2318 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2319 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | 2320 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); 2321 return 0; 2322 } 2323 2324 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream) 2325 { 2326 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2327 2328 spin_lock_irq(&rme9652->lock); 2329 2330 rme9652->playback_pid = -1; 2331 rme9652->playback_substream = NULL; 2332 2333 spin_unlock_irq(&rme9652->lock); 2334 2335 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2336 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | 2337 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); 2338 return 0; 2339 } 2340 2341 2342 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream) 2343 { 2344 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2345 struct snd_pcm_runtime *runtime = substream->runtime; 2346 2347 spin_lock_irq(&rme9652->lock); 2348 2349 snd_pcm_set_sync(substream); 2350 2351 runtime->hw = snd_rme9652_capture_subinfo; 2352 runtime->dma_area = rme9652->capture_buffer; 2353 runtime->dma_bytes = RME9652_DMA_AREA_BYTES; 2354 2355 if (rme9652->playback_substream == NULL) { 2356 rme9652_stop(rme9652); 2357 rme9652_set_thru(rme9652, -1, 0); 2358 } 2359 2360 rme9652->capture_pid = current->pid; 2361 rme9652->capture_substream = substream; 2362 2363 spin_unlock_irq(&rme9652->lock); 2364 2365 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 2366 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); 2367 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2368 snd_rme9652_hw_rule_channels, rme9652, 2369 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2370 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2371 snd_rme9652_hw_rule_channels_rate, rme9652, 2372 SNDRV_PCM_HW_PARAM_RATE, -1); 2373 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 2374 snd_rme9652_hw_rule_rate_channels, rme9652, 2375 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2376 return 0; 2377 } 2378 2379 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream) 2380 { 2381 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2382 2383 spin_lock_irq(&rme9652->lock); 2384 2385 rme9652->capture_pid = -1; 2386 rme9652->capture_substream = NULL; 2387 2388 spin_unlock_irq(&rme9652->lock); 2389 return 0; 2390 } 2391 2392 static const struct snd_pcm_ops snd_rme9652_playback_ops = { 2393 .open = snd_rme9652_playback_open, 2394 .close = snd_rme9652_playback_release, 2395 .ioctl = snd_rme9652_ioctl, 2396 .hw_params = snd_rme9652_hw_params, 2397 .prepare = snd_rme9652_prepare, 2398 .trigger = snd_rme9652_trigger, 2399 .pointer = snd_rme9652_hw_pointer, 2400 .copy_user = snd_rme9652_playback_copy, 2401 .copy_kernel = snd_rme9652_playback_copy_kernel, 2402 .fill_silence = snd_rme9652_hw_silence, 2403 }; 2404 2405 static const struct snd_pcm_ops snd_rme9652_capture_ops = { 2406 .open = snd_rme9652_capture_open, 2407 .close = snd_rme9652_capture_release, 2408 .ioctl = snd_rme9652_ioctl, 2409 .hw_params = snd_rme9652_hw_params, 2410 .prepare = snd_rme9652_prepare, 2411 .trigger = snd_rme9652_trigger, 2412 .pointer = snd_rme9652_hw_pointer, 2413 .copy_user = snd_rme9652_capture_copy, 2414 .copy_kernel = snd_rme9652_capture_copy_kernel, 2415 }; 2416 2417 static int snd_rme9652_create_pcm(struct snd_card *card, 2418 struct snd_rme9652 *rme9652) 2419 { 2420 struct snd_pcm *pcm; 2421 int err; 2422 2423 if ((err = snd_pcm_new(card, 2424 rme9652->card_name, 2425 0, 1, 1, &pcm)) < 0) { 2426 return err; 2427 } 2428 2429 rme9652->pcm = pcm; 2430 pcm->private_data = rme9652; 2431 strcpy(pcm->name, rme9652->card_name); 2432 2433 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops); 2434 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops); 2435 2436 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 2437 2438 return 0; 2439 } 2440 2441 static int snd_rme9652_create(struct snd_card *card, 2442 struct snd_rme9652 *rme9652, 2443 int precise_ptr) 2444 { 2445 struct pci_dev *pci = rme9652->pci; 2446 int err; 2447 int status; 2448 unsigned short rev; 2449 2450 rme9652->irq = -1; 2451 rme9652->card = card; 2452 2453 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev); 2454 2455 switch (rev & 0xff) { 2456 case 3: 2457 case 4: 2458 case 8: 2459 case 9: 2460 break; 2461 2462 default: 2463 /* who knows? */ 2464 return -ENODEV; 2465 } 2466 2467 if ((err = pci_enable_device(pci)) < 0) 2468 return err; 2469 2470 spin_lock_init(&rme9652->lock); 2471 2472 if ((err = pci_request_regions(pci, "rme9652")) < 0) 2473 return err; 2474 rme9652->port = pci_resource_start(pci, 0); 2475 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT); 2476 if (rme9652->iobase == NULL) { 2477 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n", 2478 rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1); 2479 return -EBUSY; 2480 } 2481 2482 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED, 2483 KBUILD_MODNAME, rme9652)) { 2484 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq); 2485 return -EBUSY; 2486 } 2487 rme9652->irq = pci->irq; 2488 rme9652->precise_ptr = precise_ptr; 2489 2490 /* Determine the h/w rev level of the card. This seems like 2491 a particularly kludgy way to encode it, but its what RME 2492 chose to do, so we follow them ... 2493 */ 2494 2495 status = rme9652_read(rme9652, RME9652_status_register); 2496 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) { 2497 rme9652->hw_rev = 15; 2498 } else { 2499 rme9652->hw_rev = 11; 2500 } 2501 2502 /* Differentiate between the standard Hammerfall, and the 2503 "Light", which does not have the expansion board. This 2504 method comes from information received from Mathhias 2505 Clausen at RME. Display the EEPROM and h/w revID where 2506 relevant. 2507 */ 2508 2509 switch (rev) { 2510 case 8: /* original eprom */ 2511 strcpy(card->driver, "RME9636"); 2512 if (rme9652->hw_rev == 15) { 2513 rme9652->card_name = "RME Digi9636 (Rev 1.5)"; 2514 } else { 2515 rme9652->card_name = "RME Digi9636"; 2516 } 2517 rme9652->ss_channels = RME9636_NCHANNELS; 2518 break; 2519 case 9: /* W36_G EPROM */ 2520 strcpy(card->driver, "RME9636"); 2521 rme9652->card_name = "RME Digi9636 (Rev G)"; 2522 rme9652->ss_channels = RME9636_NCHANNELS; 2523 break; 2524 case 4: /* W52_G EPROM */ 2525 strcpy(card->driver, "RME9652"); 2526 rme9652->card_name = "RME Digi9652 (Rev G)"; 2527 rme9652->ss_channels = RME9652_NCHANNELS; 2528 break; 2529 case 3: /* original eprom */ 2530 strcpy(card->driver, "RME9652"); 2531 if (rme9652->hw_rev == 15) { 2532 rme9652->card_name = "RME Digi9652 (Rev 1.5)"; 2533 } else { 2534 rme9652->card_name = "RME Digi9652"; 2535 } 2536 rme9652->ss_channels = RME9652_NCHANNELS; 2537 break; 2538 } 2539 2540 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2; 2541 2542 pci_set_master(rme9652->pci); 2543 2544 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) { 2545 return err; 2546 } 2547 2548 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) { 2549 return err; 2550 } 2551 2552 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) { 2553 return err; 2554 } 2555 2556 snd_rme9652_proc_init(rme9652); 2557 2558 rme9652->last_spdif_sample_rate = -1; 2559 rme9652->last_adat_sample_rate = -1; 2560 rme9652->playback_pid = -1; 2561 rme9652->capture_pid = -1; 2562 rme9652->capture_substream = NULL; 2563 rme9652->playback_substream = NULL; 2564 2565 snd_rme9652_set_defaults(rme9652); 2566 2567 if (rme9652->hw_rev == 15) { 2568 rme9652_initialize_spdif_receiver (rme9652); 2569 } 2570 2571 return 0; 2572 } 2573 2574 static void snd_rme9652_card_free(struct snd_card *card) 2575 { 2576 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data; 2577 2578 if (rme9652) 2579 snd_rme9652_free(rme9652); 2580 } 2581 2582 static int snd_rme9652_probe(struct pci_dev *pci, 2583 const struct pci_device_id *pci_id) 2584 { 2585 static int dev; 2586 struct snd_rme9652 *rme9652; 2587 struct snd_card *card; 2588 int err; 2589 2590 if (dev >= SNDRV_CARDS) 2591 return -ENODEV; 2592 if (!enable[dev]) { 2593 dev++; 2594 return -ENOENT; 2595 } 2596 2597 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2598 sizeof(struct snd_rme9652), &card); 2599 2600 if (err < 0) 2601 return err; 2602 2603 rme9652 = (struct snd_rme9652 *) card->private_data; 2604 card->private_free = snd_rme9652_card_free; 2605 rme9652->dev = dev; 2606 rme9652->pci = pci; 2607 err = snd_rme9652_create(card, rme9652, precise_ptr[dev]); 2608 if (err) 2609 goto free_card; 2610 2611 strcpy(card->shortname, rme9652->card_name); 2612 2613 sprintf(card->longname, "%s at 0x%lx, irq %d", 2614 card->shortname, rme9652->port, rme9652->irq); 2615 err = snd_card_register(card); 2616 if (err) { 2617 free_card: 2618 snd_card_free(card); 2619 return err; 2620 } 2621 pci_set_drvdata(pci, card); 2622 dev++; 2623 return 0; 2624 } 2625 2626 static void snd_rme9652_remove(struct pci_dev *pci) 2627 { 2628 snd_card_free(pci_get_drvdata(pci)); 2629 } 2630 2631 static struct pci_driver rme9652_driver = { 2632 .name = KBUILD_MODNAME, 2633 .id_table = snd_rme9652_ids, 2634 .probe = snd_rme9652_probe, 2635 .remove = snd_rme9652_remove, 2636 }; 2637 2638 module_pci_driver(rme9652_driver); 2639