1 /* 2 * cht-bsw-max98090.c - ASoc Machine driver for Intel Cherryview-based 3 * platforms Cherrytrail and Braswell, with max98090 & TI codec. 4 * 5 * Copyright (C) 2015 Intel Corp 6 * Author: Fang, Yang A <yang.a.fang@intel.com> 7 * This file is modified from cht_bsw_rt5645.c 8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; version 2 of the License. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 20 */ 21 22 #include <linux/dmi.h> 23 #include <linux/module.h> 24 #include <linux/platform_device.h> 25 #include <linux/slab.h> 26 #include <linux/acpi.h> 27 #include <linux/clk.h> 28 #include <sound/pcm.h> 29 #include <sound/pcm_params.h> 30 #include <sound/soc.h> 31 #include <sound/soc-acpi.h> 32 #include <sound/jack.h> 33 #include "../../codecs/max98090.h" 34 #include "../atom/sst-atom-controls.h" 35 #include "../../codecs/ts3a227e.h" 36 37 #define CHT_PLAT_CLK_3_HZ 19200000 38 #define CHT_CODEC_DAI "HiFi" 39 40 #define QUIRK_PMC_PLT_CLK_0 0x01 41 42 struct cht_mc_private { 43 struct clk *mclk; 44 struct snd_soc_jack jack; 45 bool ts3a227e_present; 46 }; 47 48 static int platform_clock_control(struct snd_soc_dapm_widget *w, 49 struct snd_kcontrol *k, int event) 50 { 51 struct snd_soc_dapm_context *dapm = w->dapm; 52 struct snd_soc_card *card = dapm->card; 53 struct snd_soc_dai *codec_dai; 54 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); 55 int ret; 56 57 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI); 58 if (!codec_dai) { 59 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n"); 60 return -EIO; 61 } 62 63 if (SND_SOC_DAPM_EVENT_ON(event)) { 64 ret = clk_prepare_enable(ctx->mclk); 65 if (ret < 0) { 66 dev_err(card->dev, 67 "could not configure MCLK state"); 68 return ret; 69 } 70 } else { 71 clk_disable_unprepare(ctx->mclk); 72 } 73 74 return 0; 75 } 76 77 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = { 78 SND_SOC_DAPM_HP("Headphone", NULL), 79 SND_SOC_DAPM_MIC("Headset Mic", NULL), 80 SND_SOC_DAPM_MIC("Int Mic", NULL), 81 SND_SOC_DAPM_SPK("Ext Spk", NULL), 82 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, 83 platform_clock_control, SND_SOC_DAPM_PRE_PMU | 84 SND_SOC_DAPM_POST_PMD), 85 }; 86 87 static const struct snd_soc_dapm_route cht_audio_map[] = { 88 {"IN34", NULL, "Headset Mic"}, 89 {"Headset Mic", NULL, "MICBIAS"}, 90 {"DMICL", NULL, "Int Mic"}, 91 {"Headphone", NULL, "HPL"}, 92 {"Headphone", NULL, "HPR"}, 93 {"Ext Spk", NULL, "SPKL"}, 94 {"Ext Spk", NULL, "SPKR"}, 95 {"HiFi Playback", NULL, "ssp2 Tx"}, 96 {"ssp2 Tx", NULL, "codec_out0"}, 97 {"ssp2 Tx", NULL, "codec_out1"}, 98 {"codec_in0", NULL, "ssp2 Rx" }, 99 {"codec_in1", NULL, "ssp2 Rx" }, 100 {"ssp2 Rx", NULL, "HiFi Capture"}, 101 {"Headphone", NULL, "Platform Clock"}, 102 {"Headset Mic", NULL, "Platform Clock"}, 103 {"Int Mic", NULL, "Platform Clock"}, 104 {"Ext Spk", NULL, "Platform Clock"}, 105 }; 106 107 static const struct snd_kcontrol_new cht_mc_controls[] = { 108 SOC_DAPM_PIN_SWITCH("Headphone"), 109 SOC_DAPM_PIN_SWITCH("Headset Mic"), 110 SOC_DAPM_PIN_SWITCH("Int Mic"), 111 SOC_DAPM_PIN_SWITCH("Ext Spk"), 112 }; 113 114 static int cht_aif1_hw_params(struct snd_pcm_substream *substream, 115 struct snd_pcm_hw_params *params) 116 { 117 struct snd_soc_pcm_runtime *rtd = substream->private_data; 118 struct snd_soc_dai *codec_dai = rtd->codec_dai; 119 int ret; 120 121 ret = snd_soc_dai_set_sysclk(codec_dai, M98090_REG_SYSTEM_CLOCK, 122 CHT_PLAT_CLK_3_HZ, SND_SOC_CLOCK_IN); 123 if (ret < 0) { 124 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret); 125 return ret; 126 } 127 128 return 0; 129 } 130 131 static int cht_ti_jack_event(struct notifier_block *nb, 132 unsigned long event, void *data) 133 { 134 struct snd_soc_jack *jack = (struct snd_soc_jack *)data; 135 struct snd_soc_dapm_context *dapm = &jack->card->dapm; 136 137 if (event & SND_JACK_MICROPHONE) { 138 snd_soc_dapm_force_enable_pin(dapm, "SHDN"); 139 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS"); 140 snd_soc_dapm_sync(dapm); 141 } else { 142 snd_soc_dapm_disable_pin(dapm, "MICBIAS"); 143 snd_soc_dapm_disable_pin(dapm, "SHDN"); 144 snd_soc_dapm_sync(dapm); 145 } 146 147 return 0; 148 } 149 150 static struct notifier_block cht_jack_nb = { 151 .notifier_call = cht_ti_jack_event, 152 }; 153 154 static struct snd_soc_jack_pin hs_jack_pins[] = { 155 { 156 .pin = "Headphone", 157 .mask = SND_JACK_HEADPHONE, 158 }, 159 { 160 .pin = "Headset Mic", 161 .mask = SND_JACK_MICROPHONE, 162 }, 163 }; 164 165 static struct snd_soc_jack_gpio hs_jack_gpios[] = { 166 { 167 .name = "hp", 168 .report = SND_JACK_HEADPHONE | SND_JACK_LINEOUT, 169 .debounce_time = 200, 170 }, 171 { 172 .name = "mic", 173 .invert = 1, 174 .report = SND_JACK_MICROPHONE, 175 .debounce_time = 200, 176 }, 177 }; 178 179 static const struct acpi_gpio_params hp_gpios = { 0, 0, false }; 180 static const struct acpi_gpio_params mic_gpios = { 1, 0, false }; 181 182 static const struct acpi_gpio_mapping acpi_max98090_gpios[] = { 183 { "hp-gpios", &hp_gpios, 1 }, 184 { "mic-gpios", &mic_gpios, 1 }, 185 {}, 186 }; 187 188 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime) 189 { 190 int ret; 191 int jack_type; 192 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card); 193 struct snd_soc_jack *jack = &ctx->jack; 194 195 if (ctx->ts3a227e_present) { 196 /* 197 * The jack has already been created in the 198 * cht_max98090_headset_init() function. 199 */ 200 snd_soc_jack_notifier_register(jack, &cht_jack_nb); 201 return 0; 202 } 203 204 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE; 205 206 ret = snd_soc_card_jack_new(runtime->card, "Headset Jack", 207 jack_type, jack, 208 hs_jack_pins, ARRAY_SIZE(hs_jack_pins)); 209 if (ret) { 210 dev_err(runtime->dev, "Headset Jack creation failed %d\n", ret); 211 return ret; 212 } 213 214 ret = snd_soc_jack_add_gpiods(runtime->card->dev->parent, jack, 215 ARRAY_SIZE(hs_jack_gpios), 216 hs_jack_gpios); 217 if (ret) { 218 /* 219 * flag error but don't bail if jack detect is broken 220 * due to platform issues or bad BIOS/configuration 221 */ 222 dev_err(runtime->dev, 223 "jack detection gpios not added, error %d\n", ret); 224 } 225 226 /* 227 * The firmware might enable the clock at 228 * boot (this information may or may not 229 * be reflected in the enable clock register). 230 * To change the rate we must disable the clock 231 * first to cover these cases. Due to common 232 * clock framework restrictions that do not allow 233 * to disable a clock that has not been enabled, 234 * we need to enable the clock first. 235 */ 236 ret = clk_prepare_enable(ctx->mclk); 237 if (!ret) 238 clk_disable_unprepare(ctx->mclk); 239 240 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); 241 242 if (ret) 243 dev_err(runtime->dev, "unable to set MCLK rate\n"); 244 245 return ret; 246 } 247 248 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd, 249 struct snd_pcm_hw_params *params) 250 { 251 struct snd_interval *rate = hw_param_interval(params, 252 SNDRV_PCM_HW_PARAM_RATE); 253 struct snd_interval *channels = hw_param_interval(params, 254 SNDRV_PCM_HW_PARAM_CHANNELS); 255 int ret = 0; 256 unsigned int fmt = 0; 257 258 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16); 259 if (ret < 0) { 260 dev_err(rtd->dev, "can't set cpu_dai slot fmt: %d\n", ret); 261 return ret; 262 } 263 264 fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 265 | SND_SOC_DAIFMT_CBS_CFS; 266 267 ret = snd_soc_dai_set_fmt(rtd->cpu_dai, fmt); 268 if (ret < 0) { 269 dev_err(rtd->dev, "can't set cpu_dai set fmt: %d\n", ret); 270 return ret; 271 } 272 273 /* The DSP will covert the FE rate to 48k, stereo, 24bits */ 274 rate->min = rate->max = 48000; 275 channels->min = channels->max = 2; 276 277 /* set SSP2 to 16-bit */ 278 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE); 279 return 0; 280 } 281 282 static int cht_aif1_startup(struct snd_pcm_substream *substream) 283 { 284 return snd_pcm_hw_constraint_single(substream->runtime, 285 SNDRV_PCM_HW_PARAM_RATE, 48000); 286 } 287 288 static int cht_max98090_headset_init(struct snd_soc_component *component) 289 { 290 struct snd_soc_card *card = component->card; 291 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); 292 struct snd_soc_jack *jack = &ctx->jack; 293 int jack_type; 294 int ret; 295 296 /* 297 * TI supports 4 butons headset detection 298 * KEY_MEDIA 299 * KEY_VOICECOMMAND 300 * KEY_VOLUMEUP 301 * KEY_VOLUMEDOWN 302 */ 303 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE | 304 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 305 SND_JACK_BTN_2 | SND_JACK_BTN_3; 306 307 ret = snd_soc_card_jack_new(card, "Headset Jack", jack_type, 308 jack, NULL, 0); 309 if (ret) { 310 dev_err(card->dev, "Headset Jack creation failed %d\n", ret); 311 return ret; 312 } 313 314 return ts3a227e_enable_jack_detect(component, jack); 315 } 316 317 static const struct snd_soc_ops cht_aif1_ops = { 318 .startup = cht_aif1_startup, 319 }; 320 321 static const struct snd_soc_ops cht_be_ssp2_ops = { 322 .hw_params = cht_aif1_hw_params, 323 }; 324 325 static struct snd_soc_aux_dev cht_max98090_headset_dev = { 326 .name = "Headset Chip", 327 .init = cht_max98090_headset_init, 328 .codec_name = "i2c-104C227E:00", 329 }; 330 331 static struct snd_soc_dai_link cht_dailink[] = { 332 [MERR_DPCM_AUDIO] = { 333 .name = "Audio Port", 334 .stream_name = "Audio", 335 .cpu_dai_name = "media-cpu-dai", 336 .codec_dai_name = "snd-soc-dummy-dai", 337 .codec_name = "snd-soc-dummy", 338 .platform_name = "sst-mfld-platform", 339 .nonatomic = true, 340 .dynamic = 1, 341 .dpcm_playback = 1, 342 .dpcm_capture = 1, 343 .ops = &cht_aif1_ops, 344 }, 345 [MERR_DPCM_DEEP_BUFFER] = { 346 .name = "Deep-Buffer Audio Port", 347 .stream_name = "Deep-Buffer Audio", 348 .cpu_dai_name = "deepbuffer-cpu-dai", 349 .codec_dai_name = "snd-soc-dummy-dai", 350 .codec_name = "snd-soc-dummy", 351 .platform_name = "sst-mfld-platform", 352 .nonatomic = true, 353 .dynamic = 1, 354 .dpcm_playback = 1, 355 .ops = &cht_aif1_ops, 356 }, 357 /* back ends */ 358 { 359 .name = "SSP2-Codec", 360 .id = 0, 361 .cpu_dai_name = "ssp2-port", 362 .platform_name = "sst-mfld-platform", 363 .no_pcm = 1, 364 .codec_dai_name = "HiFi", 365 .codec_name = "i2c-193C9890:00", 366 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 367 | SND_SOC_DAIFMT_CBS_CFS, 368 .init = cht_codec_init, 369 .be_hw_params_fixup = cht_codec_fixup, 370 .dpcm_playback = 1, 371 .dpcm_capture = 1, 372 .ops = &cht_be_ssp2_ops, 373 }, 374 }; 375 376 /* SoC card */ 377 static struct snd_soc_card snd_soc_card_cht = { 378 .name = "chtmax98090", 379 .owner = THIS_MODULE, 380 .dai_link = cht_dailink, 381 .num_links = ARRAY_SIZE(cht_dailink), 382 .aux_dev = &cht_max98090_headset_dev, 383 .num_aux_devs = 1, 384 .dapm_widgets = cht_dapm_widgets, 385 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets), 386 .dapm_routes = cht_audio_map, 387 .num_dapm_routes = ARRAY_SIZE(cht_audio_map), 388 .controls = cht_mc_controls, 389 .num_controls = ARRAY_SIZE(cht_mc_controls), 390 }; 391 392 static const struct dmi_system_id cht_max98090_quirk_table[] = { 393 { 394 /* Clapper model Chromebook */ 395 .matches = { 396 DMI_MATCH(DMI_PRODUCT_NAME, "Clapper"), 397 }, 398 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 399 }, 400 { 401 /* Gnawty model Chromebook (Acer Chromebook CB3-111) */ 402 .matches = { 403 DMI_MATCH(DMI_PRODUCT_NAME, "Gnawty"), 404 }, 405 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 406 }, 407 { 408 /* Swanky model Chromebook (Toshiba Chromebook 2) */ 409 .matches = { 410 DMI_MATCH(DMI_PRODUCT_NAME, "Swanky"), 411 }, 412 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 413 }, 414 {} 415 }; 416 417 static int snd_cht_mc_probe(struct platform_device *pdev) 418 { 419 const struct dmi_system_id *dmi_id; 420 struct device *dev = &pdev->dev; 421 int ret_val = 0; 422 struct cht_mc_private *drv; 423 const char *mclk_name; 424 struct snd_soc_acpi_mach *mach; 425 const char *platform_name; 426 int quirks = 0; 427 428 dmi_id = dmi_first_match(cht_max98090_quirk_table); 429 if (dmi_id) 430 quirks = (unsigned long)dmi_id->driver_data; 431 432 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); 433 if (!drv) 434 return -ENOMEM; 435 436 drv->ts3a227e_present = acpi_dev_found("104C227E"); 437 if (!drv->ts3a227e_present) { 438 /* no need probe TI jack detection chip */ 439 snd_soc_card_cht.aux_dev = NULL; 440 snd_soc_card_cht.num_aux_devs = 0; 441 442 ret_val = devm_acpi_dev_add_driver_gpios(dev->parent, 443 acpi_max98090_gpios); 444 if (ret_val) 445 dev_dbg(dev, "Unable to add GPIO mapping table\n"); 446 } 447 448 /* override plaform name, if required */ 449 mach = (&pdev->dev)->platform_data; 450 platform_name = mach->mach_params.platform; 451 452 ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht, 453 platform_name); 454 if (ret_val) 455 return ret_val; 456 457 /* register the soc card */ 458 snd_soc_card_cht.dev = &pdev->dev; 459 snd_soc_card_set_drvdata(&snd_soc_card_cht, drv); 460 461 if (quirks & QUIRK_PMC_PLT_CLK_0) 462 mclk_name = "pmc_plt_clk_0"; 463 else 464 mclk_name = "pmc_plt_clk_3"; 465 466 drv->mclk = devm_clk_get(&pdev->dev, mclk_name); 467 if (IS_ERR(drv->mclk)) { 468 dev_err(&pdev->dev, 469 "Failed to get MCLK from %s: %ld\n", 470 mclk_name, PTR_ERR(drv->mclk)); 471 return PTR_ERR(drv->mclk); 472 } 473 474 ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht); 475 if (ret_val) { 476 dev_err(&pdev->dev, 477 "snd_soc_register_card failed %d\n", ret_val); 478 return ret_val; 479 } 480 platform_set_drvdata(pdev, &snd_soc_card_cht); 481 return ret_val; 482 } 483 484 static struct platform_driver snd_cht_mc_driver = { 485 .driver = { 486 .name = "cht-bsw-max98090", 487 }, 488 .probe = snd_cht_mc_probe, 489 }; 490 491 module_platform_driver(snd_cht_mc_driver) 492 493 MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver"); 494 MODULE_AUTHOR("Fang, Yang A <yang.a.fang@intel.com>"); 495 MODULE_LICENSE("GPL v2"); 496 MODULE_ALIAS("platform:cht-bsw-max98090"); 497