1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * mt8195-mt6359.c -- 4 * MT8195-MT6359 ALSA SoC machine driver code 5 * 6 * Copyright (c) 2022 MediaTek Inc. 7 * Author: Trevor Wu <trevor.wu@mediatek.com> 8 * YC Hung <yc.hung@mediatek.com> 9 */ 10 11 #include <linux/input.h> 12 #include <linux/module.h> 13 #include <linux/of_device.h> 14 #include <linux/pm_runtime.h> 15 #include <sound/jack.h> 16 #include <sound/pcm_params.h> 17 #include <sound/rt5682.h> 18 #include <sound/soc.h> 19 #include "../../codecs/mt6359.h" 20 #include "../../codecs/rt1011.h" 21 #include "../../codecs/rt5682.h" 22 #include "../common/mtk-afe-platform-driver.h" 23 #include "../common/mtk-dsp-sof-common.h" 24 #include "../common/mtk-soc-card.h" 25 #include "mt8195-afe-clk.h" 26 #include "mt8195-afe-common.h" 27 28 #define RT1011_SPEAKER_AMP_PRESENT BIT(0) 29 #define RT1019_SPEAKER_AMP_PRESENT BIT(1) 30 #define MAX98390_SPEAKER_AMP_PRESENT BIT(2) 31 32 #define RT1011_CODEC_DAI "rt1011-aif" 33 #define RT1011_DEV0_NAME "rt1011.2-0038" 34 #define RT1011_DEV1_NAME "rt1011.2-0039" 35 36 #define RT1019_CODEC_DAI "HiFi" 37 #define RT1019_DEV0_NAME "rt1019p" 38 39 #define MAX98390_CODEC_DAI "max98390-aif1" 40 #define MAX98390_DEV0_NAME "max98390.2-0038" /* right */ 41 #define MAX98390_DEV1_NAME "max98390.2-0039" /* left */ 42 43 #define RT5682_CODEC_DAI "rt5682-aif1" 44 #define RT5682_DEV0_NAME "rt5682.2-001a" 45 46 #define RT5682S_CODEC_DAI "rt5682s-aif1" 47 #define RT5682S_DEV0_NAME "rt5682s.2-001a" 48 49 #define SOF_DMA_DL2 "SOF_DMA_DL2" 50 #define SOF_DMA_DL3 "SOF_DMA_DL3" 51 #define SOF_DMA_UL4 "SOF_DMA_UL4" 52 #define SOF_DMA_UL5 "SOF_DMA_UL5" 53 54 struct mt8195_card_data { 55 const char *name; 56 unsigned long quirk; 57 }; 58 59 struct mt8195_mt6359_priv { 60 struct snd_soc_jack headset_jack; 61 struct snd_soc_jack dp_jack; 62 struct snd_soc_jack hdmi_jack; 63 struct clk *i2so1_mclk; 64 }; 65 66 /* Headset jack detection DAPM pins */ 67 static struct snd_soc_jack_pin mt8195_jack_pins[] = { 68 { 69 .pin = "Headphone", 70 .mask = SND_JACK_HEADPHONE, 71 }, 72 { 73 .pin = "Headset Mic", 74 .mask = SND_JACK_MICROPHONE, 75 }, 76 }; 77 78 static const struct snd_soc_dapm_widget mt8195_mt6359_widgets[] = { 79 SND_SOC_DAPM_HP("Headphone", NULL), 80 SND_SOC_DAPM_MIC("Headset Mic", NULL), 81 SND_SOC_DAPM_MIXER(SOF_DMA_DL2, SND_SOC_NOPM, 0, 0, NULL, 0), 82 SND_SOC_DAPM_MIXER(SOF_DMA_DL3, SND_SOC_NOPM, 0, 0, NULL, 0), 83 SND_SOC_DAPM_MIXER(SOF_DMA_UL4, SND_SOC_NOPM, 0, 0, NULL, 0), 84 SND_SOC_DAPM_MIXER(SOF_DMA_UL5, SND_SOC_NOPM, 0, 0, NULL, 0), 85 }; 86 87 static const struct snd_soc_dapm_route mt8195_mt6359_routes[] = { 88 /* headset */ 89 { "Headphone", NULL, "HPOL" }, 90 { "Headphone", NULL, "HPOR" }, 91 { "IN1P", NULL, "Headset Mic" }, 92 /* SOF Uplink */ 93 {SOF_DMA_UL4, NULL, "O034"}, 94 {SOF_DMA_UL4, NULL, "O035"}, 95 {SOF_DMA_UL5, NULL, "O036"}, 96 {SOF_DMA_UL5, NULL, "O037"}, 97 /* SOF Downlink */ 98 {"I070", NULL, SOF_DMA_DL2}, 99 {"I071", NULL, SOF_DMA_DL2}, 100 {"I020", NULL, SOF_DMA_DL3}, 101 {"I021", NULL, SOF_DMA_DL3}, 102 }; 103 104 static const struct snd_kcontrol_new mt8195_mt6359_controls[] = { 105 SOC_DAPM_PIN_SWITCH("Headphone"), 106 SOC_DAPM_PIN_SWITCH("Headset Mic"), 107 }; 108 109 static const struct snd_soc_dapm_widget mt8195_dual_speaker_widgets[] = { 110 SND_SOC_DAPM_SPK("Left Spk", NULL), 111 SND_SOC_DAPM_SPK("Right Spk", NULL), 112 }; 113 114 static const struct snd_kcontrol_new mt8195_dual_speaker_controls[] = { 115 SOC_DAPM_PIN_SWITCH("Left Spk"), 116 SOC_DAPM_PIN_SWITCH("Right Spk"), 117 }; 118 119 static const struct snd_soc_dapm_widget mt8195_speaker_widgets[] = { 120 SND_SOC_DAPM_SPK("Ext Spk", NULL), 121 }; 122 123 static const struct snd_kcontrol_new mt8195_speaker_controls[] = { 124 SOC_DAPM_PIN_SWITCH("Ext Spk"), 125 }; 126 127 static const struct snd_soc_dapm_route mt8195_rt1011_routes[] = { 128 { "Left Spk", NULL, "Left SPO" }, 129 { "Right Spk", NULL, "Right SPO" }, 130 }; 131 132 static const struct snd_soc_dapm_route mt8195_rt1019_routes[] = { 133 { "Ext Spk", NULL, "Speaker" }, 134 }; 135 136 static const struct snd_soc_dapm_route mt8195_max98390_routes[] = { 137 { "Left Spk", NULL, "Left BE_OUT" }, 138 { "Right Spk", NULL, "Right BE_OUT" }, 139 }; 140 141 #define CKSYS_AUD_TOP_CFG 0x032c 142 #define CKSYS_AUD_TOP_MON 0x0330 143 144 static int mt8195_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd) 145 { 146 struct snd_soc_component *cmpnt_afe = 147 snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); 148 struct snd_soc_component *cmpnt_codec = 149 asoc_rtd_to_codec(rtd, 0)->component; 150 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); 151 struct mt8195_afe_private *afe_priv = afe->platform_priv; 152 struct mtkaif_param *param = &afe_priv->mtkaif_params; 153 int chosen_phase_1, chosen_phase_2, chosen_phase_3; 154 int prev_cycle_1, prev_cycle_2, prev_cycle_3; 155 int test_done_1, test_done_2, test_done_3; 156 int cycle_1, cycle_2, cycle_3; 157 int mtkaif_chosen_phase[MT8195_MTKAIF_MISO_NUM]; 158 int mtkaif_phase_cycle[MT8195_MTKAIF_MISO_NUM]; 159 int mtkaif_calibration_num_phase; 160 bool mtkaif_calibration_ok; 161 unsigned int monitor; 162 int counter; 163 int phase; 164 int i; 165 166 dev_dbg(afe->dev, "%s(), start\n", __func__); 167 168 param->mtkaif_calibration_ok = false; 169 for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) { 170 param->mtkaif_chosen_phase[i] = -1; 171 param->mtkaif_phase_cycle[i] = 0; 172 mtkaif_chosen_phase[i] = -1; 173 mtkaif_phase_cycle[i] = 0; 174 } 175 176 if (IS_ERR(afe_priv->topckgen)) { 177 dev_info(afe->dev, "%s() Cannot find topckgen controller\n", 178 __func__); 179 return 0; 180 } 181 182 pm_runtime_get_sync(afe->dev); 183 mt6359_mtkaif_calibration_enable(cmpnt_codec); 184 185 /* set test type to synchronizer pulse */ 186 regmap_update_bits(afe_priv->topckgen, 187 CKSYS_AUD_TOP_CFG, 0xffff, 0x4); 188 mtkaif_calibration_num_phase = 42; /* mt6359: 0 ~ 42 */ 189 mtkaif_calibration_ok = true; 190 191 for (phase = 0; 192 phase <= mtkaif_calibration_num_phase && mtkaif_calibration_ok; 193 phase++) { 194 mt6359_set_mtkaif_calibration_phase(cmpnt_codec, 195 phase, phase, phase); 196 197 regmap_update_bits(afe_priv->topckgen, 198 CKSYS_AUD_TOP_CFG, 0x1, 0x1); 199 200 test_done_1 = 0; 201 test_done_2 = 0; 202 test_done_3 = 0; 203 cycle_1 = -1; 204 cycle_2 = -1; 205 cycle_3 = -1; 206 counter = 0; 207 while (!(test_done_1 & test_done_2 & test_done_3)) { 208 regmap_read(afe_priv->topckgen, 209 CKSYS_AUD_TOP_MON, &monitor); 210 test_done_1 = (monitor >> 28) & 0x1; 211 test_done_2 = (monitor >> 29) & 0x1; 212 test_done_3 = (monitor >> 30) & 0x1; 213 if (test_done_1 == 1) 214 cycle_1 = monitor & 0xf; 215 216 if (test_done_2 == 1) 217 cycle_2 = (monitor >> 4) & 0xf; 218 219 if (test_done_3 == 1) 220 cycle_3 = (monitor >> 8) & 0xf; 221 222 /* handle if never test done */ 223 if (++counter > 10000) { 224 dev_info(afe->dev, "%s(), test fail, cycle_1 %d, cycle_2 %d, cycle_3 %d, monitor 0x%x\n", 225 __func__, 226 cycle_1, cycle_2, cycle_3, monitor); 227 mtkaif_calibration_ok = false; 228 break; 229 } 230 } 231 232 if (phase == 0) { 233 prev_cycle_1 = cycle_1; 234 prev_cycle_2 = cycle_2; 235 prev_cycle_3 = cycle_3; 236 } 237 238 if (cycle_1 != prev_cycle_1 && 239 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) { 240 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = phase - 1; 241 mtkaif_phase_cycle[MT8195_MTKAIF_MISO_0] = prev_cycle_1; 242 } 243 244 if (cycle_2 != prev_cycle_2 && 245 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) { 246 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = phase - 1; 247 mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1] = prev_cycle_2; 248 } 249 250 if (cycle_3 != prev_cycle_3 && 251 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) { 252 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = phase - 1; 253 mtkaif_phase_cycle[MT8195_MTKAIF_MISO_2] = prev_cycle_3; 254 } 255 256 regmap_update_bits(afe_priv->topckgen, 257 CKSYS_AUD_TOP_CFG, 0x1, 0x0); 258 259 if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] >= 0 && 260 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] >= 0 && 261 mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] >= 0) 262 break; 263 } 264 265 if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) { 266 mtkaif_calibration_ok = false; 267 chosen_phase_1 = 0; 268 } else { 269 chosen_phase_1 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0]; 270 } 271 272 if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) { 273 mtkaif_calibration_ok = false; 274 chosen_phase_2 = 0; 275 } else { 276 chosen_phase_2 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1]; 277 } 278 279 if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) { 280 mtkaif_calibration_ok = false; 281 chosen_phase_3 = 0; 282 } else { 283 chosen_phase_3 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2]; 284 } 285 286 mt6359_set_mtkaif_calibration_phase(cmpnt_codec, 287 chosen_phase_1, 288 chosen_phase_2, 289 chosen_phase_3); 290 291 mt6359_mtkaif_calibration_disable(cmpnt_codec); 292 pm_runtime_put(afe->dev); 293 294 param->mtkaif_calibration_ok = mtkaif_calibration_ok; 295 param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = chosen_phase_1; 296 param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = chosen_phase_2; 297 param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = chosen_phase_3; 298 for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) 299 param->mtkaif_phase_cycle[i] = mtkaif_phase_cycle[i]; 300 301 dev_info(afe->dev, "%s(), end, calibration ok %d\n", 302 __func__, param->mtkaif_calibration_ok); 303 304 return 0; 305 } 306 307 static int mt8195_mt6359_init(struct snd_soc_pcm_runtime *rtd) 308 { 309 struct snd_soc_component *cmpnt_codec = 310 asoc_rtd_to_codec(rtd, 0)->component; 311 312 /* set mtkaif protocol */ 313 mt6359_set_mtkaif_protocol(cmpnt_codec, 314 MT6359_MTKAIF_PROTOCOL_2_CLK_P2); 315 316 /* mtkaif calibration */ 317 mt8195_mt6359_mtkaif_calibration(rtd); 318 319 return 0; 320 } 321 322 static int mt8195_hdmitx_dptx_startup(struct snd_pcm_substream *substream) 323 { 324 static const unsigned int rates[] = { 325 48000 326 }; 327 static const unsigned int channels[] = { 328 2, 4, 6, 8 329 }; 330 static const struct snd_pcm_hw_constraint_list constraints_rates = { 331 .count = ARRAY_SIZE(rates), 332 .list = rates, 333 .mask = 0, 334 }; 335 static const struct snd_pcm_hw_constraint_list constraints_channels = { 336 .count = ARRAY_SIZE(channels), 337 .list = channels, 338 .mask = 0, 339 }; 340 341 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 342 struct snd_pcm_runtime *runtime = substream->runtime; 343 int ret; 344 345 ret = snd_pcm_hw_constraint_list(runtime, 0, 346 SNDRV_PCM_HW_PARAM_RATE, 347 &constraints_rates); 348 if (ret < 0) { 349 dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 350 return ret; 351 } 352 353 ret = snd_pcm_hw_constraint_list(runtime, 0, 354 SNDRV_PCM_HW_PARAM_CHANNELS, 355 &constraints_channels); 356 if (ret < 0) { 357 dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 358 return ret; 359 } 360 361 return 0; 362 } 363 364 static const struct snd_soc_ops mt8195_hdmitx_dptx_playback_ops = { 365 .startup = mt8195_hdmitx_dptx_startup, 366 }; 367 368 static int mt8195_dptx_hw_params(struct snd_pcm_substream *substream, 369 struct snd_pcm_hw_params *params) 370 { 371 struct snd_soc_pcm_runtime *rtd = substream->private_data; 372 struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); 373 374 return snd_soc_dai_set_sysclk(cpu_dai, 0, params_rate(params) * 256, 375 SND_SOC_CLOCK_OUT); 376 } 377 378 static const struct snd_soc_ops mt8195_dptx_ops = { 379 .hw_params = mt8195_dptx_hw_params, 380 }; 381 382 static int mt8195_dptx_codec_init(struct snd_soc_pcm_runtime *rtd) 383 { 384 struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 385 struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 386 struct snd_soc_component *cmpnt_codec = 387 asoc_rtd_to_codec(rtd, 0)->component; 388 int ret; 389 390 ret = snd_soc_card_jack_new(rtd->card, "DP Jack", SND_JACK_LINEOUT, 391 &priv->dp_jack); 392 if (ret) 393 return ret; 394 395 return snd_soc_component_set_jack(cmpnt_codec, &priv->dp_jack, NULL); 396 } 397 398 static int mt8195_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd) 399 { 400 struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 401 struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 402 struct snd_soc_component *cmpnt_codec = 403 asoc_rtd_to_codec(rtd, 0)->component; 404 int ret; 405 406 ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, 407 &priv->hdmi_jack); 408 if (ret) 409 return ret; 410 411 return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL); 412 } 413 414 static int mt8195_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, 415 struct snd_pcm_hw_params *params) 416 { 417 /* fix BE i2s format to S24_LE, clean param mask first */ 418 snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), 419 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST); 420 421 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); 422 423 return 0; 424 } 425 426 static int mt8195_playback_startup(struct snd_pcm_substream *substream) 427 { 428 static const unsigned int rates[] = { 429 48000 430 }; 431 static const unsigned int channels[] = { 432 2 433 }; 434 static const struct snd_pcm_hw_constraint_list constraints_rates = { 435 .count = ARRAY_SIZE(rates), 436 .list = rates, 437 .mask = 0, 438 }; 439 static const struct snd_pcm_hw_constraint_list constraints_channels = { 440 .count = ARRAY_SIZE(channels), 441 .list = channels, 442 .mask = 0, 443 }; 444 445 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 446 struct snd_pcm_runtime *runtime = substream->runtime; 447 int ret; 448 449 ret = snd_pcm_hw_constraint_list(runtime, 0, 450 SNDRV_PCM_HW_PARAM_RATE, 451 &constraints_rates); 452 if (ret < 0) { 453 dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 454 return ret; 455 } 456 457 ret = snd_pcm_hw_constraint_list(runtime, 0, 458 SNDRV_PCM_HW_PARAM_CHANNELS, 459 &constraints_channels); 460 if (ret < 0) { 461 dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 462 return ret; 463 } 464 465 return 0; 466 } 467 468 static const struct snd_soc_ops mt8195_playback_ops = { 469 .startup = mt8195_playback_startup, 470 }; 471 472 static int mt8195_capture_startup(struct snd_pcm_substream *substream) 473 { 474 static const unsigned int rates[] = { 475 48000 476 }; 477 static const unsigned int channels[] = { 478 1, 2 479 }; 480 static const struct snd_pcm_hw_constraint_list constraints_rates = { 481 .count = ARRAY_SIZE(rates), 482 .list = rates, 483 .mask = 0, 484 }; 485 static const struct snd_pcm_hw_constraint_list constraints_channels = { 486 .count = ARRAY_SIZE(channels), 487 .list = channels, 488 .mask = 0, 489 }; 490 491 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 492 struct snd_pcm_runtime *runtime = substream->runtime; 493 int ret; 494 495 ret = snd_pcm_hw_constraint_list(runtime, 0, 496 SNDRV_PCM_HW_PARAM_RATE, 497 &constraints_rates); 498 if (ret < 0) { 499 dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 500 return ret; 501 } 502 503 ret = snd_pcm_hw_constraint_list(runtime, 0, 504 SNDRV_PCM_HW_PARAM_CHANNELS, 505 &constraints_channels); 506 if (ret < 0) { 507 dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 508 return ret; 509 } 510 511 return 0; 512 } 513 514 static const struct snd_soc_ops mt8195_capture_ops = { 515 .startup = mt8195_capture_startup, 516 }; 517 518 static int mt8195_rt5682_etdm_hw_params(struct snd_pcm_substream *substream, 519 struct snd_pcm_hw_params *params) 520 { 521 struct snd_soc_pcm_runtime *rtd = substream->private_data; 522 struct snd_soc_card *card = rtd->card; 523 struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); 524 struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); 525 unsigned int rate = params_rate(params); 526 int bitwidth; 527 int ret; 528 529 bitwidth = snd_pcm_format_width(params_format(params)); 530 if (bitwidth < 0) { 531 dev_err(card->dev, "invalid bit width: %d\n", bitwidth); 532 return bitwidth; 533 } 534 535 ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x00, 0x0, 0x2, bitwidth); 536 if (ret) { 537 dev_err(card->dev, "failed to set tdm slot\n"); 538 return ret; 539 } 540 541 ret = snd_soc_dai_set_pll(codec_dai, RT5682_PLL1, RT5682_PLL1_S_MCLK, 542 rate * 256, rate * 512); 543 if (ret) { 544 dev_err(card->dev, "failed to set pll\n"); 545 return ret; 546 } 547 548 ret = snd_soc_dai_set_sysclk(codec_dai, RT5682_SCLK_S_PLL1, 549 rate * 512, SND_SOC_CLOCK_IN); 550 if (ret) { 551 dev_err(card->dev, "failed to set sysclk\n"); 552 return ret; 553 } 554 555 return snd_soc_dai_set_sysclk(cpu_dai, 0, rate * 256, 556 SND_SOC_CLOCK_OUT); 557 } 558 559 static const struct snd_soc_ops mt8195_rt5682_etdm_ops = { 560 .hw_params = mt8195_rt5682_etdm_hw_params, 561 }; 562 563 static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd) 564 { 565 struct snd_soc_component *cmpnt_codec = 566 asoc_rtd_to_codec(rtd, 0)->component; 567 struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 568 struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 569 struct snd_soc_jack *jack = &priv->headset_jack; 570 struct snd_soc_component *cmpnt_afe = 571 snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); 572 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); 573 struct mt8195_afe_private *afe_priv = afe->platform_priv; 574 int ret; 575 576 priv->i2so1_mclk = afe_priv->clk[MT8195_CLK_TOP_APLL12_DIV2]; 577 578 ret = snd_soc_card_jack_new_pins(rtd->card, "Headset Jack", 579 SND_JACK_HEADSET | SND_JACK_BTN_0 | 580 SND_JACK_BTN_1 | SND_JACK_BTN_2 | 581 SND_JACK_BTN_3, 582 jack, mt8195_jack_pins, 583 ARRAY_SIZE(mt8195_jack_pins)); 584 if (ret) { 585 dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret); 586 return ret; 587 } 588 589 snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); 590 snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND); 591 snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP); 592 snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN); 593 594 ret = snd_soc_component_set_jack(cmpnt_codec, jack, NULL); 595 if (ret) { 596 dev_err(rtd->dev, "Headset Jack set failed: %d\n", ret); 597 return ret; 598 } 599 600 return 0; 601 }; 602 603 static int mt8195_rt1011_etdm_hw_params(struct snd_pcm_substream *substream, 604 struct snd_pcm_hw_params *params) 605 { 606 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 607 struct snd_soc_dai *codec_dai; 608 struct snd_soc_card *card = rtd->card; 609 int srate, i, ret; 610 611 srate = params_rate(params); 612 613 for_each_rtd_codec_dais(rtd, i, codec_dai) { 614 ret = snd_soc_dai_set_pll(codec_dai, 0, RT1011_PLL1_S_BCLK, 615 64 * srate, 256 * srate); 616 if (ret < 0) { 617 dev_err(card->dev, "codec_dai clock not set\n"); 618 return ret; 619 } 620 621 ret = snd_soc_dai_set_sysclk(codec_dai, 622 RT1011_FS_SYS_PRE_S_PLL1, 623 256 * srate, SND_SOC_CLOCK_IN); 624 if (ret < 0) { 625 dev_err(card->dev, "codec_dai clock not set\n"); 626 return ret; 627 } 628 } 629 return 0; 630 } 631 632 static const struct snd_soc_ops mt8195_rt1011_etdm_ops = { 633 .hw_params = mt8195_rt1011_etdm_hw_params, 634 }; 635 636 static int mt8195_rt1011_init(struct snd_soc_pcm_runtime *rtd) 637 { 638 struct snd_soc_card *card = rtd->card; 639 int ret; 640 641 ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_dual_speaker_widgets, 642 ARRAY_SIZE(mt8195_dual_speaker_widgets)); 643 if (ret) { 644 dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 645 /* Don't need to add routes if widget addition failed */ 646 return ret; 647 } 648 649 ret = snd_soc_add_card_controls(card, mt8195_dual_speaker_controls, 650 ARRAY_SIZE(mt8195_dual_speaker_controls)); 651 if (ret) { 652 dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 653 return ret; 654 } 655 656 ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1011_routes, 657 ARRAY_SIZE(mt8195_rt1011_routes)); 658 if (ret) 659 dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 660 661 return ret; 662 } 663 664 static int mt8195_rt1019_init(struct snd_soc_pcm_runtime *rtd) 665 { 666 struct snd_soc_card *card = rtd->card; 667 int ret; 668 669 ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_speaker_widgets, 670 ARRAY_SIZE(mt8195_speaker_widgets)); 671 if (ret) { 672 dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 673 /* Don't need to add routes if widget addition failed */ 674 return ret; 675 } 676 677 ret = snd_soc_add_card_controls(card, mt8195_speaker_controls, 678 ARRAY_SIZE(mt8195_speaker_controls)); 679 if (ret) { 680 dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 681 return ret; 682 } 683 684 ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1019_routes, 685 ARRAY_SIZE(mt8195_rt1019_routes)); 686 if (ret) 687 dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 688 689 return ret; 690 } 691 692 static int mt8195_max98390_init(struct snd_soc_pcm_runtime *rtd) 693 { 694 struct snd_soc_card *card = rtd->card; 695 int ret; 696 697 ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_dual_speaker_widgets, 698 ARRAY_SIZE(mt8195_dual_speaker_widgets)); 699 if (ret) { 700 dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 701 /* Don't need to add routes if widget addition failed */ 702 return ret; 703 } 704 705 ret = snd_soc_add_card_controls(card, mt8195_dual_speaker_controls, 706 ARRAY_SIZE(mt8195_dual_speaker_controls)); 707 if (ret) { 708 dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 709 return ret; 710 } 711 712 ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_max98390_routes, 713 ARRAY_SIZE(mt8195_max98390_routes)); 714 if (ret) 715 dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 716 717 return ret; 718 } 719 720 static int mt8195_etdm_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, 721 struct snd_pcm_hw_params *params) 722 { 723 /* fix BE i2s format to S24_LE, clean param mask first */ 724 snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), 725 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST); 726 727 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); 728 729 return 0; 730 } 731 732 static int mt8195_set_bias_level_post(struct snd_soc_card *card, 733 struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level) 734 { 735 struct snd_soc_component *component = dapm->component; 736 struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); 737 struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 738 int ret; 739 740 /* 741 * It's required to control mclk directly in the set_bias_level_post 742 * function for rt5682 and rt5682s codec, or the unexpected pop happens 743 * at the end of playback. 744 */ 745 if (!component || 746 (strcmp(component->name, RT5682_DEV0_NAME) && 747 strcmp(component->name, RT5682S_DEV0_NAME))) 748 return 0; 749 750 switch (level) { 751 case SND_SOC_BIAS_OFF: 752 if (!__clk_is_enabled(priv->i2so1_mclk)) 753 return 0; 754 755 clk_disable_unprepare(priv->i2so1_mclk); 756 dev_dbg(card->dev, "Disable i2so1 mclk\n"); 757 break; 758 case SND_SOC_BIAS_ON: 759 ret = clk_prepare_enable(priv->i2so1_mclk); 760 if (ret) { 761 dev_err(card->dev, "Can't enable i2so1 mclk: %d\n", ret); 762 return ret; 763 } 764 dev_dbg(card->dev, "Enable i2so1 mclk\n"); 765 break; 766 default: 767 break; 768 } 769 770 return 0; 771 } 772 773 enum { 774 DAI_LINK_DL2_FE, 775 DAI_LINK_DL3_FE, 776 DAI_LINK_DL6_FE, 777 DAI_LINK_DL7_FE, 778 DAI_LINK_DL8_FE, 779 DAI_LINK_DL10_FE, 780 DAI_LINK_DL11_FE, 781 DAI_LINK_UL1_FE, 782 DAI_LINK_UL2_FE, 783 DAI_LINK_UL3_FE, 784 DAI_LINK_UL4_FE, 785 DAI_LINK_UL5_FE, 786 DAI_LINK_UL6_FE, 787 DAI_LINK_UL8_FE, 788 DAI_LINK_UL9_FE, 789 DAI_LINK_UL10_FE, 790 DAI_LINK_DL_SRC_BE, 791 DAI_LINK_DPTX_BE, 792 DAI_LINK_ETDM1_IN_BE, 793 DAI_LINK_ETDM2_IN_BE, 794 DAI_LINK_ETDM1_OUT_BE, 795 DAI_LINK_ETDM2_OUT_BE, 796 DAI_LINK_ETDM3_OUT_BE, 797 DAI_LINK_PCM1_BE, 798 DAI_LINK_UL_SRC1_BE, 799 DAI_LINK_UL_SRC2_BE, 800 DAI_LINK_REGULAR_LAST = DAI_LINK_UL_SRC2_BE, 801 DAI_LINK_SOF_START, 802 DAI_LINK_SOF_DL2_BE = DAI_LINK_SOF_START, 803 DAI_LINK_SOF_DL3_BE, 804 DAI_LINK_SOF_UL4_BE, 805 DAI_LINK_SOF_UL5_BE, 806 DAI_LINK_SOF_END = DAI_LINK_SOF_UL5_BE, 807 }; 808 809 #define DAI_LINK_REGULAR_NUM (DAI_LINK_REGULAR_LAST + 1) 810 811 /* FE */ 812 SND_SOC_DAILINK_DEFS(DL2_FE, 813 DAILINK_COMP_ARRAY(COMP_CPU("DL2")), 814 DAILINK_COMP_ARRAY(COMP_DUMMY()), 815 DAILINK_COMP_ARRAY(COMP_EMPTY())); 816 817 SND_SOC_DAILINK_DEFS(DL3_FE, 818 DAILINK_COMP_ARRAY(COMP_CPU("DL3")), 819 DAILINK_COMP_ARRAY(COMP_DUMMY()), 820 DAILINK_COMP_ARRAY(COMP_EMPTY())); 821 822 SND_SOC_DAILINK_DEFS(DL6_FE, 823 DAILINK_COMP_ARRAY(COMP_CPU("DL6")), 824 DAILINK_COMP_ARRAY(COMP_DUMMY()), 825 DAILINK_COMP_ARRAY(COMP_EMPTY())); 826 827 SND_SOC_DAILINK_DEFS(DL7_FE, 828 DAILINK_COMP_ARRAY(COMP_CPU("DL7")), 829 DAILINK_COMP_ARRAY(COMP_DUMMY()), 830 DAILINK_COMP_ARRAY(COMP_EMPTY())); 831 832 SND_SOC_DAILINK_DEFS(DL8_FE, 833 DAILINK_COMP_ARRAY(COMP_CPU("DL8")), 834 DAILINK_COMP_ARRAY(COMP_DUMMY()), 835 DAILINK_COMP_ARRAY(COMP_EMPTY())); 836 837 SND_SOC_DAILINK_DEFS(DL10_FE, 838 DAILINK_COMP_ARRAY(COMP_CPU("DL10")), 839 DAILINK_COMP_ARRAY(COMP_DUMMY()), 840 DAILINK_COMP_ARRAY(COMP_EMPTY())); 841 842 SND_SOC_DAILINK_DEFS(DL11_FE, 843 DAILINK_COMP_ARRAY(COMP_CPU("DL11")), 844 DAILINK_COMP_ARRAY(COMP_DUMMY()), 845 DAILINK_COMP_ARRAY(COMP_EMPTY())); 846 847 SND_SOC_DAILINK_DEFS(UL1_FE, 848 DAILINK_COMP_ARRAY(COMP_CPU("UL1")), 849 DAILINK_COMP_ARRAY(COMP_DUMMY()), 850 DAILINK_COMP_ARRAY(COMP_EMPTY())); 851 852 SND_SOC_DAILINK_DEFS(UL2_FE, 853 DAILINK_COMP_ARRAY(COMP_CPU("UL2")), 854 DAILINK_COMP_ARRAY(COMP_DUMMY()), 855 DAILINK_COMP_ARRAY(COMP_EMPTY())); 856 857 SND_SOC_DAILINK_DEFS(UL3_FE, 858 DAILINK_COMP_ARRAY(COMP_CPU("UL3")), 859 DAILINK_COMP_ARRAY(COMP_DUMMY()), 860 DAILINK_COMP_ARRAY(COMP_EMPTY())); 861 862 SND_SOC_DAILINK_DEFS(UL4_FE, 863 DAILINK_COMP_ARRAY(COMP_CPU("UL4")), 864 DAILINK_COMP_ARRAY(COMP_DUMMY()), 865 DAILINK_COMP_ARRAY(COMP_EMPTY())); 866 867 SND_SOC_DAILINK_DEFS(UL5_FE, 868 DAILINK_COMP_ARRAY(COMP_CPU("UL5")), 869 DAILINK_COMP_ARRAY(COMP_DUMMY()), 870 DAILINK_COMP_ARRAY(COMP_EMPTY())); 871 872 SND_SOC_DAILINK_DEFS(UL6_FE, 873 DAILINK_COMP_ARRAY(COMP_CPU("UL6")), 874 DAILINK_COMP_ARRAY(COMP_DUMMY()), 875 DAILINK_COMP_ARRAY(COMP_EMPTY())); 876 877 SND_SOC_DAILINK_DEFS(UL8_FE, 878 DAILINK_COMP_ARRAY(COMP_CPU("UL8")), 879 DAILINK_COMP_ARRAY(COMP_DUMMY()), 880 DAILINK_COMP_ARRAY(COMP_EMPTY())); 881 882 SND_SOC_DAILINK_DEFS(UL9_FE, 883 DAILINK_COMP_ARRAY(COMP_CPU("UL9")), 884 DAILINK_COMP_ARRAY(COMP_DUMMY()), 885 DAILINK_COMP_ARRAY(COMP_EMPTY())); 886 887 SND_SOC_DAILINK_DEFS(UL10_FE, 888 DAILINK_COMP_ARRAY(COMP_CPU("UL10")), 889 DAILINK_COMP_ARRAY(COMP_DUMMY()), 890 DAILINK_COMP_ARRAY(COMP_EMPTY())); 891 892 /* BE */ 893 SND_SOC_DAILINK_DEFS(DL_SRC_BE, 894 DAILINK_COMP_ARRAY(COMP_CPU("DL_SRC")), 895 DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 896 "mt6359-snd-codec-aif1")), 897 DAILINK_COMP_ARRAY(COMP_EMPTY())); 898 899 SND_SOC_DAILINK_DEFS(DPTX_BE, 900 DAILINK_COMP_ARRAY(COMP_CPU("DPTX")), 901 DAILINK_COMP_ARRAY(COMP_DUMMY()), 902 DAILINK_COMP_ARRAY(COMP_EMPTY())); 903 904 SND_SOC_DAILINK_DEFS(ETDM1_IN_BE, 905 DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_IN")), 906 DAILINK_COMP_ARRAY(COMP_DUMMY()), 907 DAILINK_COMP_ARRAY(COMP_EMPTY())); 908 909 SND_SOC_DAILINK_DEFS(ETDM2_IN_BE, 910 DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_IN")), 911 DAILINK_COMP_ARRAY(COMP_DUMMY()), 912 DAILINK_COMP_ARRAY(COMP_EMPTY())); 913 914 SND_SOC_DAILINK_DEFS(ETDM1_OUT_BE, 915 DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")), 916 DAILINK_COMP_ARRAY(COMP_DUMMY()), 917 DAILINK_COMP_ARRAY(COMP_EMPTY())); 918 919 SND_SOC_DAILINK_DEFS(ETDM2_OUT_BE, 920 DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_OUT")), 921 DAILINK_COMP_ARRAY(COMP_DUMMY()), 922 DAILINK_COMP_ARRAY(COMP_EMPTY())); 923 924 SND_SOC_DAILINK_DEFS(ETDM3_OUT_BE, 925 DAILINK_COMP_ARRAY(COMP_CPU("ETDM3_OUT")), 926 DAILINK_COMP_ARRAY(COMP_DUMMY()), 927 DAILINK_COMP_ARRAY(COMP_EMPTY())); 928 929 SND_SOC_DAILINK_DEFS(PCM1_BE, 930 DAILINK_COMP_ARRAY(COMP_CPU("PCM1")), 931 DAILINK_COMP_ARRAY(COMP_DUMMY()), 932 DAILINK_COMP_ARRAY(COMP_EMPTY())); 933 934 SND_SOC_DAILINK_DEFS(UL_SRC1_BE, 935 DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC1")), 936 DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 937 "mt6359-snd-codec-aif1"), 938 COMP_CODEC("dmic-codec", 939 "dmic-hifi")), 940 DAILINK_COMP_ARRAY(COMP_EMPTY())); 941 942 SND_SOC_DAILINK_DEFS(UL_SRC2_BE, 943 DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC2")), 944 DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 945 "mt6359-snd-codec-aif2")), 946 DAILINK_COMP_ARRAY(COMP_EMPTY())); 947 948 SND_SOC_DAILINK_DEFS(AFE_SOF_DL2, 949 DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL2")), 950 DAILINK_COMP_ARRAY(COMP_DUMMY()), 951 DAILINK_COMP_ARRAY(COMP_EMPTY())); 952 953 SND_SOC_DAILINK_DEFS(AFE_SOF_DL3, 954 DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL3")), 955 DAILINK_COMP_ARRAY(COMP_DUMMY()), 956 DAILINK_COMP_ARRAY(COMP_EMPTY())); 957 958 SND_SOC_DAILINK_DEFS(AFE_SOF_UL4, 959 DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL4")), 960 DAILINK_COMP_ARRAY(COMP_DUMMY()), 961 DAILINK_COMP_ARRAY(COMP_EMPTY())); 962 963 SND_SOC_DAILINK_DEFS(AFE_SOF_UL5, 964 DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL5")), 965 DAILINK_COMP_ARRAY(COMP_DUMMY()), 966 DAILINK_COMP_ARRAY(COMP_EMPTY())); 967 968 /* codec */ 969 SND_SOC_DAILINK_DEF(rt1019_comps, 970 DAILINK_COMP_ARRAY(COMP_CODEC(RT1019_DEV0_NAME, 971 RT1019_CODEC_DAI))); 972 973 SND_SOC_DAILINK_DEF(rt1011_comps, 974 DAILINK_COMP_ARRAY(COMP_CODEC(RT1011_DEV0_NAME, 975 RT1011_CODEC_DAI), 976 COMP_CODEC(RT1011_DEV1_NAME, 977 RT1011_CODEC_DAI))); 978 979 SND_SOC_DAILINK_DEF(max98390_comps, 980 DAILINK_COMP_ARRAY(COMP_CODEC(MAX98390_DEV0_NAME, 981 MAX98390_CODEC_DAI), 982 COMP_CODEC(MAX98390_DEV1_NAME, 983 MAX98390_CODEC_DAI))); 984 985 static const struct sof_conn_stream g_sof_conn_streams[] = { 986 { "ETDM2_OUT_BE", "AFE_SOF_DL2", SOF_DMA_DL2, SNDRV_PCM_STREAM_PLAYBACK}, 987 { "ETDM1_OUT_BE", "AFE_SOF_DL3", SOF_DMA_DL3, SNDRV_PCM_STREAM_PLAYBACK}, 988 { "UL_SRC1_BE", "AFE_SOF_UL4", SOF_DMA_UL4, SNDRV_PCM_STREAM_CAPTURE}, 989 { "ETDM2_IN_BE", "AFE_SOF_UL5", SOF_DMA_UL5, SNDRV_PCM_STREAM_CAPTURE}, 990 }; 991 992 static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { 993 /* FE */ 994 [DAI_LINK_DL2_FE] = { 995 .name = "DL2_FE", 996 .stream_name = "DL2 Playback", 997 .trigger = { 998 SND_SOC_DPCM_TRIGGER_POST, 999 SND_SOC_DPCM_TRIGGER_POST, 1000 }, 1001 .dynamic = 1, 1002 .dpcm_playback = 1, 1003 .ops = &mt8195_playback_ops, 1004 SND_SOC_DAILINK_REG(DL2_FE), 1005 }, 1006 [DAI_LINK_DL3_FE] = { 1007 .name = "DL3_FE", 1008 .stream_name = "DL3 Playback", 1009 .trigger = { 1010 SND_SOC_DPCM_TRIGGER_POST, 1011 SND_SOC_DPCM_TRIGGER_POST, 1012 }, 1013 .dynamic = 1, 1014 .dpcm_playback = 1, 1015 .ops = &mt8195_playback_ops, 1016 SND_SOC_DAILINK_REG(DL3_FE), 1017 }, 1018 [DAI_LINK_DL6_FE] = { 1019 .name = "DL6_FE", 1020 .stream_name = "DL6 Playback", 1021 .trigger = { 1022 SND_SOC_DPCM_TRIGGER_POST, 1023 SND_SOC_DPCM_TRIGGER_POST, 1024 }, 1025 .dynamic = 1, 1026 .dpcm_playback = 1, 1027 .ops = &mt8195_playback_ops, 1028 SND_SOC_DAILINK_REG(DL6_FE), 1029 }, 1030 [DAI_LINK_DL7_FE] = { 1031 .name = "DL7_FE", 1032 .stream_name = "DL7 Playback", 1033 .trigger = { 1034 SND_SOC_DPCM_TRIGGER_PRE, 1035 SND_SOC_DPCM_TRIGGER_PRE, 1036 }, 1037 .dynamic = 1, 1038 .dpcm_playback = 1, 1039 SND_SOC_DAILINK_REG(DL7_FE), 1040 }, 1041 [DAI_LINK_DL8_FE] = { 1042 .name = "DL8_FE", 1043 .stream_name = "DL8 Playback", 1044 .trigger = { 1045 SND_SOC_DPCM_TRIGGER_POST, 1046 SND_SOC_DPCM_TRIGGER_POST, 1047 }, 1048 .dynamic = 1, 1049 .dpcm_playback = 1, 1050 .ops = &mt8195_playback_ops, 1051 SND_SOC_DAILINK_REG(DL8_FE), 1052 }, 1053 [DAI_LINK_DL10_FE] = { 1054 .name = "DL10_FE", 1055 .stream_name = "DL10 Playback", 1056 .trigger = { 1057 SND_SOC_DPCM_TRIGGER_POST, 1058 SND_SOC_DPCM_TRIGGER_POST, 1059 }, 1060 .dynamic = 1, 1061 .dpcm_playback = 1, 1062 .ops = &mt8195_hdmitx_dptx_playback_ops, 1063 SND_SOC_DAILINK_REG(DL10_FE), 1064 }, 1065 [DAI_LINK_DL11_FE] = { 1066 .name = "DL11_FE", 1067 .stream_name = "DL11 Playback", 1068 .trigger = { 1069 SND_SOC_DPCM_TRIGGER_POST, 1070 SND_SOC_DPCM_TRIGGER_POST, 1071 }, 1072 .dynamic = 1, 1073 .dpcm_playback = 1, 1074 .ops = &mt8195_playback_ops, 1075 SND_SOC_DAILINK_REG(DL11_FE), 1076 }, 1077 [DAI_LINK_UL1_FE] = { 1078 .name = "UL1_FE", 1079 .stream_name = "UL1 Capture", 1080 .trigger = { 1081 SND_SOC_DPCM_TRIGGER_PRE, 1082 SND_SOC_DPCM_TRIGGER_PRE, 1083 }, 1084 .dynamic = 1, 1085 .dpcm_capture = 1, 1086 SND_SOC_DAILINK_REG(UL1_FE), 1087 }, 1088 [DAI_LINK_UL2_FE] = { 1089 .name = "UL2_FE", 1090 .stream_name = "UL2 Capture", 1091 .trigger = { 1092 SND_SOC_DPCM_TRIGGER_POST, 1093 SND_SOC_DPCM_TRIGGER_POST, 1094 }, 1095 .dynamic = 1, 1096 .dpcm_capture = 1, 1097 .ops = &mt8195_capture_ops, 1098 SND_SOC_DAILINK_REG(UL2_FE), 1099 }, 1100 [DAI_LINK_UL3_FE] = { 1101 .name = "UL3_FE", 1102 .stream_name = "UL3 Capture", 1103 .trigger = { 1104 SND_SOC_DPCM_TRIGGER_POST, 1105 SND_SOC_DPCM_TRIGGER_POST, 1106 }, 1107 .dynamic = 1, 1108 .dpcm_capture = 1, 1109 .ops = &mt8195_capture_ops, 1110 SND_SOC_DAILINK_REG(UL3_FE), 1111 }, 1112 [DAI_LINK_UL4_FE] = { 1113 .name = "UL4_FE", 1114 .stream_name = "UL4 Capture", 1115 .trigger = { 1116 SND_SOC_DPCM_TRIGGER_POST, 1117 SND_SOC_DPCM_TRIGGER_POST, 1118 }, 1119 .dynamic = 1, 1120 .dpcm_capture = 1, 1121 .ops = &mt8195_capture_ops, 1122 SND_SOC_DAILINK_REG(UL4_FE), 1123 }, 1124 [DAI_LINK_UL5_FE] = { 1125 .name = "UL5_FE", 1126 .stream_name = "UL5 Capture", 1127 .trigger = { 1128 SND_SOC_DPCM_TRIGGER_POST, 1129 SND_SOC_DPCM_TRIGGER_POST, 1130 }, 1131 .dynamic = 1, 1132 .dpcm_capture = 1, 1133 .ops = &mt8195_capture_ops, 1134 SND_SOC_DAILINK_REG(UL5_FE), 1135 }, 1136 [DAI_LINK_UL6_FE] = { 1137 .name = "UL6_FE", 1138 .stream_name = "UL6 Capture", 1139 .trigger = { 1140 SND_SOC_DPCM_TRIGGER_PRE, 1141 SND_SOC_DPCM_TRIGGER_PRE, 1142 }, 1143 .dynamic = 1, 1144 .dpcm_capture = 1, 1145 SND_SOC_DAILINK_REG(UL6_FE), 1146 }, 1147 [DAI_LINK_UL8_FE] = { 1148 .name = "UL8_FE", 1149 .stream_name = "UL8 Capture", 1150 .trigger = { 1151 SND_SOC_DPCM_TRIGGER_POST, 1152 SND_SOC_DPCM_TRIGGER_POST, 1153 }, 1154 .dynamic = 1, 1155 .dpcm_capture = 1, 1156 .ops = &mt8195_capture_ops, 1157 SND_SOC_DAILINK_REG(UL8_FE), 1158 }, 1159 [DAI_LINK_UL9_FE] = { 1160 .name = "UL9_FE", 1161 .stream_name = "UL9 Capture", 1162 .trigger = { 1163 SND_SOC_DPCM_TRIGGER_POST, 1164 SND_SOC_DPCM_TRIGGER_POST, 1165 }, 1166 .dynamic = 1, 1167 .dpcm_capture = 1, 1168 .ops = &mt8195_capture_ops, 1169 SND_SOC_DAILINK_REG(UL9_FE), 1170 }, 1171 [DAI_LINK_UL10_FE] = { 1172 .name = "UL10_FE", 1173 .stream_name = "UL10 Capture", 1174 .trigger = { 1175 SND_SOC_DPCM_TRIGGER_POST, 1176 SND_SOC_DPCM_TRIGGER_POST, 1177 }, 1178 .dynamic = 1, 1179 .dpcm_capture = 1, 1180 .ops = &mt8195_capture_ops, 1181 SND_SOC_DAILINK_REG(UL10_FE), 1182 }, 1183 /* BE */ 1184 [DAI_LINK_DL_SRC_BE] = { 1185 .name = "DL_SRC_BE", 1186 .no_pcm = 1, 1187 .dpcm_playback = 1, 1188 SND_SOC_DAILINK_REG(DL_SRC_BE), 1189 }, 1190 [DAI_LINK_DPTX_BE] = { 1191 .name = "DPTX_BE", 1192 .no_pcm = 1, 1193 .dpcm_playback = 1, 1194 .ops = &mt8195_dptx_ops, 1195 .be_hw_params_fixup = mt8195_dptx_hw_params_fixup, 1196 SND_SOC_DAILINK_REG(DPTX_BE), 1197 }, 1198 [DAI_LINK_ETDM1_IN_BE] = { 1199 .name = "ETDM1_IN_BE", 1200 .no_pcm = 1, 1201 .dai_fmt = SND_SOC_DAIFMT_I2S | 1202 SND_SOC_DAIFMT_NB_NF | 1203 SND_SOC_DAIFMT_CBS_CFS, 1204 .dpcm_capture = 1, 1205 SND_SOC_DAILINK_REG(ETDM1_IN_BE), 1206 }, 1207 [DAI_LINK_ETDM2_IN_BE] = { 1208 .name = "ETDM2_IN_BE", 1209 .no_pcm = 1, 1210 .dai_fmt = SND_SOC_DAIFMT_I2S | 1211 SND_SOC_DAIFMT_NB_NF | 1212 SND_SOC_DAIFMT_CBS_CFS, 1213 .dpcm_capture = 1, 1214 .init = mt8195_rt5682_init, 1215 .ops = &mt8195_rt5682_etdm_ops, 1216 .be_hw_params_fixup = mt8195_etdm_hw_params_fixup, 1217 SND_SOC_DAILINK_REG(ETDM2_IN_BE), 1218 }, 1219 [DAI_LINK_ETDM1_OUT_BE] = { 1220 .name = "ETDM1_OUT_BE", 1221 .no_pcm = 1, 1222 .dai_fmt = SND_SOC_DAIFMT_I2S | 1223 SND_SOC_DAIFMT_NB_NF | 1224 SND_SOC_DAIFMT_CBS_CFS, 1225 .dpcm_playback = 1, 1226 .ops = &mt8195_rt5682_etdm_ops, 1227 .be_hw_params_fixup = mt8195_etdm_hw_params_fixup, 1228 SND_SOC_DAILINK_REG(ETDM1_OUT_BE), 1229 }, 1230 [DAI_LINK_ETDM2_OUT_BE] = { 1231 .name = "ETDM2_OUT_BE", 1232 .no_pcm = 1, 1233 .dai_fmt = SND_SOC_DAIFMT_I2S | 1234 SND_SOC_DAIFMT_NB_NF | 1235 SND_SOC_DAIFMT_CBS_CFS, 1236 .dpcm_playback = 1, 1237 SND_SOC_DAILINK_REG(ETDM2_OUT_BE), 1238 }, 1239 [DAI_LINK_ETDM3_OUT_BE] = { 1240 .name = "ETDM3_OUT_BE", 1241 .no_pcm = 1, 1242 .dai_fmt = SND_SOC_DAIFMT_I2S | 1243 SND_SOC_DAIFMT_NB_NF | 1244 SND_SOC_DAIFMT_CBS_CFS, 1245 .dpcm_playback = 1, 1246 SND_SOC_DAILINK_REG(ETDM3_OUT_BE), 1247 }, 1248 [DAI_LINK_PCM1_BE] = { 1249 .name = "PCM1_BE", 1250 .no_pcm = 1, 1251 .dai_fmt = SND_SOC_DAIFMT_I2S | 1252 SND_SOC_DAIFMT_NB_NF | 1253 SND_SOC_DAIFMT_CBS_CFS, 1254 .dpcm_playback = 1, 1255 .dpcm_capture = 1, 1256 SND_SOC_DAILINK_REG(PCM1_BE), 1257 }, 1258 [DAI_LINK_UL_SRC1_BE] = { 1259 .name = "UL_SRC1_BE", 1260 .no_pcm = 1, 1261 .dpcm_capture = 1, 1262 SND_SOC_DAILINK_REG(UL_SRC1_BE), 1263 }, 1264 [DAI_LINK_UL_SRC2_BE] = { 1265 .name = "UL_SRC2_BE", 1266 .no_pcm = 1, 1267 .dpcm_capture = 1, 1268 SND_SOC_DAILINK_REG(UL_SRC2_BE), 1269 }, 1270 /* SOF BE */ 1271 [DAI_LINK_SOF_DL2_BE] = { 1272 .name = "AFE_SOF_DL2", 1273 .no_pcm = 1, 1274 .dpcm_playback = 1, 1275 SND_SOC_DAILINK_REG(AFE_SOF_DL2), 1276 }, 1277 [DAI_LINK_SOF_DL3_BE] = { 1278 .name = "AFE_SOF_DL3", 1279 .no_pcm = 1, 1280 .dpcm_playback = 1, 1281 SND_SOC_DAILINK_REG(AFE_SOF_DL3), 1282 }, 1283 [DAI_LINK_SOF_UL4_BE] = { 1284 .name = "AFE_SOF_UL4", 1285 .no_pcm = 1, 1286 .dpcm_capture = 1, 1287 SND_SOC_DAILINK_REG(AFE_SOF_UL4), 1288 }, 1289 [DAI_LINK_SOF_UL5_BE] = { 1290 .name = "AFE_SOF_UL5", 1291 .no_pcm = 1, 1292 .dpcm_capture = 1, 1293 SND_SOC_DAILINK_REG(AFE_SOF_UL5), 1294 }, 1295 }; 1296 1297 static struct snd_soc_codec_conf rt1011_codec_conf[] = { 1298 { 1299 .dlc = COMP_CODEC_CONF(RT1011_DEV0_NAME), 1300 .name_prefix = "Left", 1301 }, 1302 { 1303 .dlc = COMP_CODEC_CONF(RT1011_DEV1_NAME), 1304 .name_prefix = "Right", 1305 }, 1306 }; 1307 1308 static struct snd_soc_codec_conf max98390_codec_conf[] = { 1309 { 1310 .dlc = COMP_CODEC_CONF(MAX98390_DEV0_NAME), 1311 .name_prefix = "Right", 1312 }, 1313 { 1314 .dlc = COMP_CODEC_CONF(MAX98390_DEV1_NAME), 1315 .name_prefix = "Left", 1316 }, 1317 }; 1318 1319 static struct snd_soc_card mt8195_mt6359_soc_card = { 1320 .owner = THIS_MODULE, 1321 .dai_link = mt8195_mt6359_dai_links, 1322 .num_links = ARRAY_SIZE(mt8195_mt6359_dai_links), 1323 .controls = mt8195_mt6359_controls, 1324 .num_controls = ARRAY_SIZE(mt8195_mt6359_controls), 1325 .dapm_widgets = mt8195_mt6359_widgets, 1326 .num_dapm_widgets = ARRAY_SIZE(mt8195_mt6359_widgets), 1327 .dapm_routes = mt8195_mt6359_routes, 1328 .num_dapm_routes = ARRAY_SIZE(mt8195_mt6359_routes), 1329 .set_bias_level_post = mt8195_set_bias_level_post, 1330 }; 1331 1332 /* fixup the BE DAI link to match any values from topology */ 1333 static int mt8195_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, 1334 struct snd_pcm_hw_params *params) 1335 { 1336 int ret; 1337 1338 ret = mtk_sof_dai_link_fixup(rtd, params); 1339 1340 if (!strcmp(rtd->dai_link->name, "ETDM2_IN_BE") || 1341 !strcmp(rtd->dai_link->name, "ETDM1_OUT_BE")) { 1342 mt8195_etdm_hw_params_fixup(rtd, params); 1343 } 1344 1345 return ret; 1346 } 1347 1348 static int mt8195_mt6359_dev_probe(struct platform_device *pdev) 1349 { 1350 struct snd_soc_card *card = &mt8195_mt6359_soc_card; 1351 struct snd_soc_dai_link *dai_link; 1352 struct mtk_soc_card_data *soc_card_data; 1353 struct mt8195_mt6359_priv *mach_priv; 1354 struct device_node *platform_node, *adsp_node, *dp_node, *hdmi_node; 1355 struct mt8195_card_data *card_data; 1356 int is5682s = 0; 1357 int init6359 = 0; 1358 int sof_on = 0; 1359 int ret, i; 1360 1361 card_data = (struct mt8195_card_data *)of_device_get_match_data(&pdev->dev); 1362 card->dev = &pdev->dev; 1363 1364 ret = snd_soc_of_parse_card_name(card, "model"); 1365 if (ret) { 1366 dev_err(&pdev->dev, "%s new card name parsing error %d\n", 1367 __func__, ret); 1368 return ret; 1369 } 1370 1371 if (!card->name) 1372 card->name = card_data->name; 1373 1374 if (strstr(card->name, "_5682s")) 1375 is5682s = 1; 1376 soc_card_data = devm_kzalloc(&pdev->dev, sizeof(*card_data), GFP_KERNEL); 1377 if (!soc_card_data) 1378 return -ENOMEM; 1379 1380 mach_priv = devm_kzalloc(&pdev->dev, sizeof(*mach_priv), GFP_KERNEL); 1381 if (!mach_priv) 1382 return -ENOMEM; 1383 1384 soc_card_data->mach_priv = mach_priv; 1385 1386 adsp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,adsp", 0); 1387 if (adsp_node) { 1388 struct mtk_sof_priv *sof_priv; 1389 1390 sof_priv = devm_kzalloc(&pdev->dev, sizeof(*sof_priv), GFP_KERNEL); 1391 if (!sof_priv) { 1392 ret = -ENOMEM; 1393 goto err_kzalloc; 1394 } 1395 sof_priv->conn_streams = g_sof_conn_streams; 1396 sof_priv->num_streams = ARRAY_SIZE(g_sof_conn_streams); 1397 sof_priv->sof_dai_link_fixup = mt8195_dai_link_fixup; 1398 soc_card_data->sof_priv = sof_priv; 1399 card->probe = mtk_sof_card_probe; 1400 card->late_probe = mtk_sof_card_late_probe; 1401 if (!card->topology_shortname_created) { 1402 snprintf(card->topology_shortname, 32, "sof-%s", card->name); 1403 card->topology_shortname_created = true; 1404 } 1405 card->name = card->topology_shortname; 1406 sof_on = 1; 1407 } 1408 1409 if (of_property_read_bool(pdev->dev.of_node, "mediatek,dai-link")) { 1410 ret = mtk_sof_dailink_parse_of(card, pdev->dev.of_node, 1411 "mediatek,dai-link", 1412 mt8195_mt6359_dai_links, 1413 ARRAY_SIZE(mt8195_mt6359_dai_links)); 1414 if (ret) { 1415 dev_dbg(&pdev->dev, "Parse dai-link fail\n"); 1416 goto err_parse_of; 1417 } 1418 } else { 1419 if (!sof_on) 1420 card->num_links = DAI_LINK_REGULAR_NUM; 1421 } 1422 1423 platform_node = of_parse_phandle(pdev->dev.of_node, 1424 "mediatek,platform", 0); 1425 if (!platform_node) { 1426 dev_dbg(&pdev->dev, "Property 'platform' missing or invalid\n"); 1427 ret = -EINVAL; 1428 goto err_platform_node; 1429 } 1430 1431 dp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,dptx-codec", 0); 1432 hdmi_node = of_parse_phandle(pdev->dev.of_node, 1433 "mediatek,hdmi-codec", 0); 1434 1435 for_each_card_prelinks(card, i, dai_link) { 1436 if (!dai_link->platforms->name) { 1437 if (!strncmp(dai_link->name, "AFE_SOF", strlen("AFE_SOF")) && sof_on) 1438 dai_link->platforms->of_node = adsp_node; 1439 else 1440 dai_link->platforms->of_node = platform_node; 1441 } 1442 1443 if (strcmp(dai_link->name, "DPTX_BE") == 0) { 1444 if (!dp_node) { 1445 dev_dbg(&pdev->dev, "No property 'dptx-codec'\n"); 1446 } else { 1447 dai_link->codecs->of_node = dp_node; 1448 dai_link->codecs->name = NULL; 1449 dai_link->codecs->dai_name = "i2s-hifi"; 1450 dai_link->init = mt8195_dptx_codec_init; 1451 } 1452 } else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) { 1453 if (!hdmi_node) { 1454 dev_dbg(&pdev->dev, "No property 'hdmi-codec'\n"); 1455 } else { 1456 dai_link->codecs->of_node = hdmi_node; 1457 dai_link->codecs->name = NULL; 1458 dai_link->codecs->dai_name = "i2s-hifi"; 1459 dai_link->init = mt8195_hdmi_codec_init; 1460 } 1461 } else if (strcmp(dai_link->name, "ETDM1_OUT_BE") == 0 || 1462 strcmp(dai_link->name, "ETDM2_IN_BE") == 0) { 1463 dai_link->codecs->name = 1464 is5682s ? RT5682S_DEV0_NAME : RT5682_DEV0_NAME; 1465 dai_link->codecs->dai_name = 1466 is5682s ? RT5682S_CODEC_DAI : RT5682_CODEC_DAI; 1467 } else if (strcmp(dai_link->name, "DL_SRC_BE") == 0 || 1468 strcmp(dai_link->name, "UL_SRC1_BE") == 0 || 1469 strcmp(dai_link->name, "UL_SRC2_BE") == 0) { 1470 if (!init6359) { 1471 dai_link->init = mt8195_mt6359_init; 1472 init6359 = 1; 1473 } 1474 } else if (strcmp(dai_link->name, "ETDM2_OUT_BE") == 0) { 1475 switch (card_data->quirk) { 1476 case RT1011_SPEAKER_AMP_PRESENT: 1477 dai_link->codecs = rt1011_comps; 1478 dai_link->num_codecs = ARRAY_SIZE(rt1011_comps); 1479 dai_link->init = mt8195_rt1011_init; 1480 dai_link->ops = &mt8195_rt1011_etdm_ops; 1481 dai_link->be_hw_params_fixup = mt8195_etdm_hw_params_fixup; 1482 card->codec_conf = rt1011_codec_conf; 1483 card->num_configs = ARRAY_SIZE(rt1011_codec_conf); 1484 break; 1485 case RT1019_SPEAKER_AMP_PRESENT: 1486 dai_link->codecs = rt1019_comps; 1487 dai_link->num_codecs = ARRAY_SIZE(rt1019_comps); 1488 dai_link->init = mt8195_rt1019_init; 1489 break; 1490 case MAX98390_SPEAKER_AMP_PRESENT: 1491 dai_link->codecs = max98390_comps; 1492 dai_link->num_codecs = ARRAY_SIZE(max98390_comps); 1493 dai_link->init = mt8195_max98390_init; 1494 card->codec_conf = max98390_codec_conf; 1495 card->num_configs = ARRAY_SIZE(max98390_codec_conf); 1496 break; 1497 default: 1498 break; 1499 } 1500 } 1501 } 1502 1503 snd_soc_card_set_drvdata(card, soc_card_data); 1504 1505 ret = devm_snd_soc_register_card(&pdev->dev, card); 1506 1507 of_node_put(platform_node); 1508 of_node_put(dp_node); 1509 of_node_put(hdmi_node); 1510 err_kzalloc: 1511 err_parse_of: 1512 err_platform_node: 1513 of_node_put(adsp_node); 1514 return ret; 1515 } 1516 1517 static struct mt8195_card_data mt8195_mt6359_rt1019_rt5682_card = { 1518 .name = "mt8195_r1019_5682", 1519 .quirk = RT1019_SPEAKER_AMP_PRESENT, 1520 }; 1521 1522 static struct mt8195_card_data mt8195_mt6359_rt1011_rt5682_card = { 1523 .name = "mt8195_r1011_5682", 1524 .quirk = RT1011_SPEAKER_AMP_PRESENT, 1525 }; 1526 1527 static struct mt8195_card_data mt8195_mt6359_max98390_rt5682_card = { 1528 .name = "mt8195_m98390_r5682", 1529 .quirk = MAX98390_SPEAKER_AMP_PRESENT, 1530 }; 1531 1532 static const struct of_device_id mt8195_mt6359_dt_match[] = { 1533 { 1534 .compatible = "mediatek,mt8195_mt6359_rt1019_rt5682", 1535 .data = &mt8195_mt6359_rt1019_rt5682_card, 1536 }, 1537 { 1538 .compatible = "mediatek,mt8195_mt6359_rt1011_rt5682", 1539 .data = &mt8195_mt6359_rt1011_rt5682_card, 1540 }, 1541 { 1542 .compatible = "mediatek,mt8195_mt6359_max98390_rt5682", 1543 .data = &mt8195_mt6359_max98390_rt5682_card, 1544 }, 1545 {}, 1546 }; 1547 1548 static struct platform_driver mt8195_mt6359_driver = { 1549 .driver = { 1550 .name = "mt8195_mt6359", 1551 .of_match_table = mt8195_mt6359_dt_match, 1552 .pm = &snd_soc_pm_ops, 1553 }, 1554 .probe = mt8195_mt6359_dev_probe, 1555 }; 1556 1557 module_platform_driver(mt8195_mt6359_driver); 1558 1559 /* Module information */ 1560 MODULE_DESCRIPTION("MT8195-MT6359 ALSA SoC machine driver"); 1561 MODULE_AUTHOR("Trevor Wu <trevor.wu@mediatek.com>"); 1562 MODULE_AUTHOR("YC Hung <yc.hung@mediatek.com>"); 1563 MODULE_LICENSE("GPL"); 1564 MODULE_ALIAS("mt8195_mt6359 soc card"); 1565