1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved. 3 // Copyright (c) 2018, Linaro Limited 4 5 #include <linux/err.h> 6 #include <linux/init.h> 7 #include <linux/module.h> 8 #include <linux/device.h> 9 #include <linux/platform_device.h> 10 #include <linux/slab.h> 11 #include <sound/pcm.h> 12 #include <sound/soc.h> 13 #include <sound/pcm_params.h> 14 #include "q6afe.h" 15 16 #define Q6AFE_TDM_PB_DAI(pre, num, did) { \ 17 .playback = { \ 18 .stream_name = pre" TDM"#num" Playback", \ 19 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ 20 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\ 21 SNDRV_PCM_RATE_176400, \ 22 .formats = SNDRV_PCM_FMTBIT_S16_LE | \ 23 SNDRV_PCM_FMTBIT_S24_LE | \ 24 SNDRV_PCM_FMTBIT_S32_LE, \ 25 .channels_min = 1, \ 26 .channels_max = 8, \ 27 .rate_min = 8000, \ 28 .rate_max = 176400, \ 29 }, \ 30 .name = #did, \ 31 .ops = &q6tdm_ops, \ 32 .id = did, \ 33 .probe = msm_dai_q6_dai_probe, \ 34 .remove = msm_dai_q6_dai_remove, \ 35 } 36 37 #define Q6AFE_TDM_CAP_DAI(pre, num, did) { \ 38 .capture = { \ 39 .stream_name = pre" TDM"#num" Capture", \ 40 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ 41 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\ 42 SNDRV_PCM_RATE_176400, \ 43 .formats = SNDRV_PCM_FMTBIT_S16_LE | \ 44 SNDRV_PCM_FMTBIT_S24_LE | \ 45 SNDRV_PCM_FMTBIT_S32_LE, \ 46 .channels_min = 1, \ 47 .channels_max = 8, \ 48 .rate_min = 8000, \ 49 .rate_max = 176400, \ 50 }, \ 51 .name = #did, \ 52 .ops = &q6tdm_ops, \ 53 .id = did, \ 54 .probe = msm_dai_q6_dai_probe, \ 55 .remove = msm_dai_q6_dai_remove, \ 56 } 57 58 struct q6afe_dai_priv_data { 59 uint32_t sd_line_mask; 60 uint32_t sync_mode; 61 uint32_t sync_src; 62 uint32_t data_out_enable; 63 uint32_t invert_sync; 64 uint32_t data_delay; 65 uint32_t data_align; 66 }; 67 68 struct q6afe_dai_data { 69 struct q6afe_port *port[AFE_PORT_MAX]; 70 struct q6afe_port_config port_config[AFE_PORT_MAX]; 71 bool is_port_started[AFE_PORT_MAX]; 72 struct q6afe_dai_priv_data priv[AFE_PORT_MAX]; 73 }; 74 75 static int q6slim_hw_params(struct snd_pcm_substream *substream, 76 struct snd_pcm_hw_params *params, 77 struct snd_soc_dai *dai) 78 { 79 80 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 81 struct q6afe_slim_cfg *slim = &dai_data->port_config[dai->id].slim; 82 83 slim->sample_rate = params_rate(params); 84 85 switch (params_format(params)) { 86 case SNDRV_PCM_FORMAT_S16_LE: 87 case SNDRV_PCM_FORMAT_SPECIAL: 88 slim->bit_width = 16; 89 break; 90 case SNDRV_PCM_FORMAT_S24_LE: 91 slim->bit_width = 24; 92 break; 93 case SNDRV_PCM_FORMAT_S32_LE: 94 slim->bit_width = 32; 95 break; 96 default: 97 pr_err("%s: format %d\n", 98 __func__, params_format(params)); 99 return -EINVAL; 100 } 101 102 return 0; 103 } 104 105 static int q6hdmi_hw_params(struct snd_pcm_substream *substream, 106 struct snd_pcm_hw_params *params, 107 struct snd_soc_dai *dai) 108 { 109 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 110 int channels = params_channels(params); 111 struct q6afe_hdmi_cfg *hdmi = &dai_data->port_config[dai->id].hdmi; 112 113 hdmi->sample_rate = params_rate(params); 114 switch (params_format(params)) { 115 case SNDRV_PCM_FORMAT_S16_LE: 116 hdmi->bit_width = 16; 117 break; 118 case SNDRV_PCM_FORMAT_S24_LE: 119 hdmi->bit_width = 24; 120 break; 121 } 122 123 /* HDMI spec CEA-861-E: Table 28 Audio InfoFrame Data Byte 4 */ 124 switch (channels) { 125 case 2: 126 hdmi->channel_allocation = 0; 127 break; 128 case 3: 129 hdmi->channel_allocation = 0x02; 130 break; 131 case 4: 132 hdmi->channel_allocation = 0x06; 133 break; 134 case 5: 135 hdmi->channel_allocation = 0x0A; 136 break; 137 case 6: 138 hdmi->channel_allocation = 0x0B; 139 break; 140 case 7: 141 hdmi->channel_allocation = 0x12; 142 break; 143 case 8: 144 hdmi->channel_allocation = 0x13; 145 break; 146 default: 147 dev_err(dai->dev, "invalid Channels = %u\n", channels); 148 return -EINVAL; 149 } 150 151 return 0; 152 } 153 154 static int q6i2s_hw_params(struct snd_pcm_substream *substream, 155 struct snd_pcm_hw_params *params, 156 struct snd_soc_dai *dai) 157 { 158 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 159 struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg; 160 161 i2s->sample_rate = params_rate(params); 162 i2s->bit_width = params_width(params); 163 i2s->num_channels = params_channels(params); 164 i2s->sd_line_mask = dai_data->priv[dai->id].sd_line_mask; 165 166 return 0; 167 } 168 169 static int q6i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 170 { 171 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 172 struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg; 173 174 i2s->fmt = fmt; 175 176 return 0; 177 } 178 179 static int q6tdm_set_tdm_slot(struct snd_soc_dai *dai, 180 unsigned int tx_mask, 181 unsigned int rx_mask, 182 int slots, int slot_width) 183 { 184 185 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 186 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm; 187 unsigned int cap_mask; 188 int rc = 0; 189 190 /* HW only supports 16 and 32 bit slot width configuration */ 191 if ((slot_width != 16) && (slot_width != 32)) { 192 dev_err(dai->dev, "%s: invalid slot_width %d\n", 193 __func__, slot_width); 194 return -EINVAL; 195 } 196 197 /* HW supports 1-32 slots configuration. Typical: 1, 2, 4, 8, 16, 32 */ 198 switch (slots) { 199 case 2: 200 cap_mask = 0x03; 201 break; 202 case 4: 203 cap_mask = 0x0F; 204 break; 205 case 8: 206 cap_mask = 0xFF; 207 break; 208 case 16: 209 cap_mask = 0xFFFF; 210 break; 211 default: 212 dev_err(dai->dev, "%s: invalid slots %d\n", 213 __func__, slots); 214 return -EINVAL; 215 } 216 217 switch (dai->id) { 218 case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7: 219 tdm->nslots_per_frame = slots; 220 tdm->slot_width = slot_width; 221 /* TDM RX dais ids are even and tx are odd */ 222 tdm->slot_mask = (dai->id & 0x1 ? tx_mask : rx_mask) & cap_mask; 223 break; 224 default: 225 dev_err(dai->dev, "%s: invalid dai id 0x%x\n", 226 __func__, dai->id); 227 return -EINVAL; 228 } 229 230 return rc; 231 } 232 233 static int q6tdm_set_channel_map(struct snd_soc_dai *dai, 234 unsigned int tx_num, unsigned int *tx_slot, 235 unsigned int rx_num, unsigned int *rx_slot) 236 { 237 238 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 239 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm; 240 int rc = 0; 241 int i = 0; 242 243 switch (dai->id) { 244 case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7: 245 if (dai->id & 0x1) { 246 if (!tx_slot) { 247 dev_err(dai->dev, "tx slot not found\n"); 248 return -EINVAL; 249 } 250 if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) { 251 dev_err(dai->dev, "invalid tx num %d\n", 252 tx_num); 253 return -EINVAL; 254 } 255 256 for (i = 0; i < tx_num; i++) 257 tdm->ch_mapping[i] = tx_slot[i]; 258 259 for (i = tx_num; i < AFE_PORT_MAX_AUDIO_CHAN_CNT; i++) 260 tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID; 261 262 tdm->num_channels = tx_num; 263 } else { 264 /* rx */ 265 if (!rx_slot) { 266 dev_err(dai->dev, "rx slot not found\n"); 267 return -EINVAL; 268 } 269 if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) { 270 dev_err(dai->dev, "invalid rx num %d\n", 271 rx_num); 272 return -EINVAL; 273 } 274 275 for (i = 0; i < rx_num; i++) 276 tdm->ch_mapping[i] = rx_slot[i]; 277 278 for (i = rx_num; i < AFE_PORT_MAX_AUDIO_CHAN_CNT; i++) 279 tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID; 280 281 tdm->num_channels = rx_num; 282 } 283 284 break; 285 default: 286 dev_err(dai->dev, "%s: invalid dai id 0x%x\n", 287 __func__, dai->id); 288 return -EINVAL; 289 } 290 291 return rc; 292 } 293 294 static int q6tdm_hw_params(struct snd_pcm_substream *substream, 295 struct snd_pcm_hw_params *params, 296 struct snd_soc_dai *dai) 297 { 298 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 299 struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm; 300 301 tdm->bit_width = params_width(params); 302 tdm->sample_rate = params_rate(params); 303 tdm->num_channels = params_channels(params); 304 tdm->data_align_type = dai_data->priv[dai->id].data_align; 305 tdm->sync_src = dai_data->priv[dai->id].sync_src; 306 tdm->sync_mode = dai_data->priv[dai->id].sync_mode; 307 308 return 0; 309 } 310 static void q6afe_dai_shutdown(struct snd_pcm_substream *substream, 311 struct snd_soc_dai *dai) 312 { 313 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 314 int rc; 315 316 if (!dai_data->is_port_started[dai->id]) 317 return; 318 319 rc = q6afe_port_stop(dai_data->port[dai->id]); 320 if (rc < 0) 321 dev_err(dai->dev, "fail to close AFE port (%d)\n", rc); 322 323 dai_data->is_port_started[dai->id] = false; 324 325 } 326 327 static int q6afe_dai_prepare(struct snd_pcm_substream *substream, 328 struct snd_soc_dai *dai) 329 { 330 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 331 int rc; 332 333 if (dai_data->is_port_started[dai->id]) { 334 /* stop the port and restart with new port config */ 335 rc = q6afe_port_stop(dai_data->port[dai->id]); 336 if (rc < 0) { 337 dev_err(dai->dev, "fail to close AFE port (%d)\n", rc); 338 return rc; 339 } 340 } 341 342 switch (dai->id) { 343 case HDMI_RX: 344 case DISPLAY_PORT_RX: 345 q6afe_hdmi_port_prepare(dai_data->port[dai->id], 346 &dai_data->port_config[dai->id].hdmi); 347 break; 348 case SLIMBUS_0_RX ... SLIMBUS_6_TX: 349 q6afe_slim_port_prepare(dai_data->port[dai->id], 350 &dai_data->port_config[dai->id].slim); 351 break; 352 case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX: 353 rc = q6afe_i2s_port_prepare(dai_data->port[dai->id], 354 &dai_data->port_config[dai->id].i2s_cfg); 355 if (rc < 0) { 356 dev_err(dai->dev, "fail to prepare AFE port %x\n", 357 dai->id); 358 return rc; 359 } 360 break; 361 case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7: 362 q6afe_tdm_port_prepare(dai_data->port[dai->id], 363 &dai_data->port_config[dai->id].tdm); 364 break; 365 default: 366 return -EINVAL; 367 } 368 369 rc = q6afe_port_start(dai_data->port[dai->id]); 370 if (rc < 0) { 371 dev_err(dai->dev, "fail to start AFE port %x\n", dai->id); 372 return rc; 373 } 374 dai_data->is_port_started[dai->id] = true; 375 376 return 0; 377 } 378 379 static int q6slim_set_channel_map(struct snd_soc_dai *dai, 380 unsigned int tx_num, unsigned int *tx_slot, 381 unsigned int rx_num, unsigned int *rx_slot) 382 { 383 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 384 struct q6afe_port_config *pcfg = &dai_data->port_config[dai->id]; 385 int i; 386 387 if (dai->id & 0x1) { 388 /* TX */ 389 if (!tx_slot) { 390 pr_err("%s: tx slot not found\n", __func__); 391 return -EINVAL; 392 } 393 394 for (i = 0; i < tx_num; i++) 395 pcfg->slim.ch_mapping[i] = tx_slot[i]; 396 397 pcfg->slim.num_channels = tx_num; 398 399 400 } else { 401 if (!rx_slot) { 402 pr_err("%s: rx slot not found\n", __func__); 403 return -EINVAL; 404 } 405 406 for (i = 0; i < rx_num; i++) 407 pcfg->slim.ch_mapping[i] = rx_slot[i]; 408 409 pcfg->slim.num_channels = rx_num; 410 411 } 412 413 return 0; 414 } 415 416 static int q6afe_mi2s_set_sysclk(struct snd_soc_dai *dai, 417 int clk_id, unsigned int freq, int dir) 418 { 419 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 420 struct q6afe_port *port = dai_data->port[dai->id]; 421 422 switch (clk_id) { 423 case LPAIF_DIG_CLK: 424 return q6afe_port_set_sysclk(port, clk_id, 0, 5, freq, dir); 425 case LPAIF_BIT_CLK: 426 case LPAIF_OSR_CLK: 427 return q6afe_port_set_sysclk(port, clk_id, 428 Q6AFE_LPASS_CLK_SRC_INTERNAL, 429 Q6AFE_LPASS_CLK_ROOT_DEFAULT, 430 freq, dir); 431 case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR: 432 case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1: 433 return q6afe_port_set_sysclk(port, clk_id, 434 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, 435 Q6AFE_LPASS_CLK_ROOT_DEFAULT, 436 freq, dir); 437 case Q6AFE_LPASS_CLK_ID_PRI_TDM_IBIT ... Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT: 438 return q6afe_port_set_sysclk(port, clk_id, 439 Q6AFE_LPASS_CLK_ATTRIBUTE_INVERT_COUPLE_NO, 440 Q6AFE_LPASS_CLK_ROOT_DEFAULT, 441 freq, dir); 442 } 443 444 return 0; 445 } 446 447 static const struct snd_soc_dapm_route q6afe_dapm_routes[] = { 448 {"HDMI Playback", NULL, "HDMI_RX"}, 449 {"Display Port Playback", NULL, "DISPLAY_PORT_RX"}, 450 {"Slimbus1 Playback", NULL, "SLIMBUS_1_RX"}, 451 {"Slimbus2 Playback", NULL, "SLIMBUS_2_RX"}, 452 {"Slimbus3 Playback", NULL, "SLIMBUS_3_RX"}, 453 {"Slimbus4 Playback", NULL, "SLIMBUS_4_RX"}, 454 {"Slimbus5 Playback", NULL, "SLIMBUS_5_RX"}, 455 {"Slimbus6 Playback", NULL, "SLIMBUS_6_RX"}, 456 457 {"SLIMBUS_0_TX", NULL, "Slimbus Capture"}, 458 {"SLIMBUS_1_TX", NULL, "Slimbus1 Capture"}, 459 {"SLIMBUS_2_TX", NULL, "Slimbus2 Capture"}, 460 {"SLIMBUS_3_TX", NULL, "Slimbus3 Capture"}, 461 {"SLIMBUS_4_TX", NULL, "Slimbus4 Capture"}, 462 {"SLIMBUS_5_TX", NULL, "Slimbus5 Capture"}, 463 {"SLIMBUS_6_TX", NULL, "Slimbus6 Capture"}, 464 465 {"Primary MI2S Playback", NULL, "PRI_MI2S_RX"}, 466 {"Secondary MI2S Playback", NULL, "SEC_MI2S_RX"}, 467 {"Tertiary MI2S Playback", NULL, "TERT_MI2S_RX"}, 468 {"Quaternary MI2S Playback", NULL, "QUAT_MI2S_RX"}, 469 470 {"Primary TDM0 Playback", NULL, "PRIMARY_TDM_RX_0"}, 471 {"Primary TDM1 Playback", NULL, "PRIMARY_TDM_RX_1"}, 472 {"Primary TDM2 Playback", NULL, "PRIMARY_TDM_RX_2"}, 473 {"Primary TDM3 Playback", NULL, "PRIMARY_TDM_RX_3"}, 474 {"Primary TDM4 Playback", NULL, "PRIMARY_TDM_RX_4"}, 475 {"Primary TDM5 Playback", NULL, "PRIMARY_TDM_RX_5"}, 476 {"Primary TDM6 Playback", NULL, "PRIMARY_TDM_RX_6"}, 477 {"Primary TDM7 Playback", NULL, "PRIMARY_TDM_RX_7"}, 478 479 {"Secondary TDM0 Playback", NULL, "SEC_TDM_RX_0"}, 480 {"Secondary TDM1 Playback", NULL, "SEC_TDM_RX_1"}, 481 {"Secondary TDM2 Playback", NULL, "SEC_TDM_RX_2"}, 482 {"Secondary TDM3 Playback", NULL, "SEC_TDM_RX_3"}, 483 {"Secondary TDM4 Playback", NULL, "SEC_TDM_RX_4"}, 484 {"Secondary TDM5 Playback", NULL, "SEC_TDM_RX_5"}, 485 {"Secondary TDM6 Playback", NULL, "SEC_TDM_RX_6"}, 486 {"Secondary TDM7 Playback", NULL, "SEC_TDM_RX_7"}, 487 488 {"Tertiary TDM0 Playback", NULL, "TERT_TDM_RX_0"}, 489 {"Tertiary TDM1 Playback", NULL, "TERT_TDM_RX_1"}, 490 {"Tertiary TDM2 Playback", NULL, "TERT_TDM_RX_2"}, 491 {"Tertiary TDM3 Playback", NULL, "TERT_TDM_RX_3"}, 492 {"Tertiary TDM4 Playback", NULL, "TERT_TDM_RX_4"}, 493 {"Tertiary TDM5 Playback", NULL, "TERT_TDM_RX_5"}, 494 {"Tertiary TDM6 Playback", NULL, "TERT_TDM_RX_6"}, 495 {"Tertiary TDM7 Playback", NULL, "TERT_TDM_RX_7"}, 496 497 {"Quaternary TDM0 Playback", NULL, "QUAT_TDM_RX_0"}, 498 {"Quaternary TDM1 Playback", NULL, "QUAT_TDM_RX_1"}, 499 {"Quaternary TDM2 Playback", NULL, "QUAT_TDM_RX_2"}, 500 {"Quaternary TDM3 Playback", NULL, "QUAT_TDM_RX_3"}, 501 {"Quaternary TDM4 Playback", NULL, "QUAT_TDM_RX_4"}, 502 {"Quaternary TDM5 Playback", NULL, "QUAT_TDM_RX_5"}, 503 {"Quaternary TDM6 Playback", NULL, "QUAT_TDM_RX_6"}, 504 {"Quaternary TDM7 Playback", NULL, "QUAT_TDM_RX_7"}, 505 506 {"Quinary TDM0 Playback", NULL, "QUIN_TDM_RX_0"}, 507 {"Quinary TDM1 Playback", NULL, "QUIN_TDM_RX_1"}, 508 {"Quinary TDM2 Playback", NULL, "QUIN_TDM_RX_2"}, 509 {"Quinary TDM3 Playback", NULL, "QUIN_TDM_RX_3"}, 510 {"Quinary TDM4 Playback", NULL, "QUIN_TDM_RX_4"}, 511 {"Quinary TDM5 Playback", NULL, "QUIN_TDM_RX_5"}, 512 {"Quinary TDM6 Playback", NULL, "QUIN_TDM_RX_6"}, 513 {"Quinary TDM7 Playback", NULL, "QUIN_TDM_RX_7"}, 514 515 {"PRIMARY_TDM_TX_0", NULL, "Primary TDM0 Capture"}, 516 {"PRIMARY_TDM_TX_1", NULL, "Primary TDM1 Capture"}, 517 {"PRIMARY_TDM_TX_2", NULL, "Primary TDM2 Capture"}, 518 {"PRIMARY_TDM_TX_3", NULL, "Primary TDM3 Capture"}, 519 {"PRIMARY_TDM_TX_4", NULL, "Primary TDM4 Capture"}, 520 {"PRIMARY_TDM_TX_5", NULL, "Primary TDM5 Capture"}, 521 {"PRIMARY_TDM_TX_6", NULL, "Primary TDM6 Capture"}, 522 {"PRIMARY_TDM_TX_7", NULL, "Primary TDM7 Capture"}, 523 524 {"SEC_TDM_TX_0", NULL, "Secondary TDM0 Capture"}, 525 {"SEC_TDM_TX_1", NULL, "Secondary TDM1 Capture"}, 526 {"SEC_TDM_TX_2", NULL, "Secondary TDM2 Capture"}, 527 {"SEC_TDM_TX_3", NULL, "Secondary TDM3 Capture"}, 528 {"SEC_TDM_TX_4", NULL, "Secondary TDM4 Capture"}, 529 {"SEC_TDM_TX_5", NULL, "Secondary TDM5 Capture"}, 530 {"SEC_TDM_TX_6", NULL, "Secondary TDM6 Capture"}, 531 {"SEC_TDM_TX_7", NULL, "Secondary TDM7 Capture"}, 532 533 {"TERT_TDM_TX_0", NULL, "Tertiary TDM0 Capture"}, 534 {"TERT_TDM_TX_1", NULL, "Tertiary TDM1 Capture"}, 535 {"TERT_TDM_TX_2", NULL, "Tertiary TDM2 Capture"}, 536 {"TERT_TDM_TX_3", NULL, "Tertiary TDM3 Capture"}, 537 {"TERT_TDM_TX_4", NULL, "Tertiary TDM4 Capture"}, 538 {"TERT_TDM_TX_5", NULL, "Tertiary TDM5 Capture"}, 539 {"TERT_TDM_TX_6", NULL, "Tertiary TDM6 Capture"}, 540 {"TERT_TDM_TX_7", NULL, "Tertiary TDM7 Capture"}, 541 542 {"QUAT_TDM_TX_0", NULL, "Quaternary TDM0 Capture"}, 543 {"QUAT_TDM_TX_1", NULL, "Quaternary TDM1 Capture"}, 544 {"QUAT_TDM_TX_2", NULL, "Quaternary TDM2 Capture"}, 545 {"QUAT_TDM_TX_3", NULL, "Quaternary TDM3 Capture"}, 546 {"QUAT_TDM_TX_4", NULL, "Quaternary TDM4 Capture"}, 547 {"QUAT_TDM_TX_5", NULL, "Quaternary TDM5 Capture"}, 548 {"QUAT_TDM_TX_6", NULL, "Quaternary TDM6 Capture"}, 549 {"QUAT_TDM_TX_7", NULL, "Quaternary TDM7 Capture"}, 550 551 {"QUIN_TDM_TX_0", NULL, "Quinary TDM0 Capture"}, 552 {"QUIN_TDM_TX_1", NULL, "Quinary TDM1 Capture"}, 553 {"QUIN_TDM_TX_2", NULL, "Quinary TDM2 Capture"}, 554 {"QUIN_TDM_TX_3", NULL, "Quinary TDM3 Capture"}, 555 {"QUIN_TDM_TX_4", NULL, "Quinary TDM4 Capture"}, 556 {"QUIN_TDM_TX_5", NULL, "Quinary TDM5 Capture"}, 557 {"QUIN_TDM_TX_6", NULL, "Quinary TDM6 Capture"}, 558 {"QUIN_TDM_TX_7", NULL, "Quinary TDM7 Capture"}, 559 560 {"TERT_MI2S_TX", NULL, "Tertiary MI2S Capture"}, 561 {"PRI_MI2S_TX", NULL, "Primary MI2S Capture"}, 562 {"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"}, 563 {"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"}, 564 }; 565 566 static const struct snd_soc_dai_ops q6hdmi_ops = { 567 .prepare = q6afe_dai_prepare, 568 .hw_params = q6hdmi_hw_params, 569 .shutdown = q6afe_dai_shutdown, 570 }; 571 572 static const struct snd_soc_dai_ops q6i2s_ops = { 573 .prepare = q6afe_dai_prepare, 574 .hw_params = q6i2s_hw_params, 575 .set_fmt = q6i2s_set_fmt, 576 .shutdown = q6afe_dai_shutdown, 577 .set_sysclk = q6afe_mi2s_set_sysclk, 578 }; 579 580 static const struct snd_soc_dai_ops q6slim_ops = { 581 .prepare = q6afe_dai_prepare, 582 .hw_params = q6slim_hw_params, 583 .shutdown = q6afe_dai_shutdown, 584 .set_channel_map = q6slim_set_channel_map, 585 }; 586 587 static const struct snd_soc_dai_ops q6tdm_ops = { 588 .prepare = q6afe_dai_prepare, 589 .shutdown = q6afe_dai_shutdown, 590 .set_sysclk = q6afe_mi2s_set_sysclk, 591 .set_tdm_slot = q6tdm_set_tdm_slot, 592 .set_channel_map = q6tdm_set_channel_map, 593 .hw_params = q6tdm_hw_params, 594 }; 595 596 static int msm_dai_q6_dai_probe(struct snd_soc_dai *dai) 597 { 598 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 599 struct q6afe_port *port; 600 601 port = q6afe_port_get_from_id(dai->dev, dai->id); 602 if (IS_ERR(port)) { 603 dev_err(dai->dev, "Unable to get afe port\n"); 604 return -EINVAL; 605 } 606 dai_data->port[dai->id] = port; 607 608 return 0; 609 } 610 611 static int msm_dai_q6_dai_remove(struct snd_soc_dai *dai) 612 { 613 struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev); 614 615 q6afe_port_put(dai_data->port[dai->id]); 616 dai_data->port[dai->id] = NULL; 617 618 return 0; 619 } 620 621 static struct snd_soc_dai_driver q6afe_dais[] = { 622 { 623 .playback = { 624 .stream_name = "HDMI Playback", 625 .rates = SNDRV_PCM_RATE_48000 | 626 SNDRV_PCM_RATE_96000 | 627 SNDRV_PCM_RATE_192000, 628 .formats = SNDRV_PCM_FMTBIT_S16_LE | 629 SNDRV_PCM_FMTBIT_S24_LE, 630 .channels_min = 2, 631 .channels_max = 8, 632 .rate_max = 192000, 633 .rate_min = 48000, 634 }, 635 .ops = &q6hdmi_ops, 636 .id = HDMI_RX, 637 .name = "HDMI", 638 .probe = msm_dai_q6_dai_probe, 639 .remove = msm_dai_q6_dai_remove, 640 }, { 641 .name = "SLIMBUS_0_RX", 642 .ops = &q6slim_ops, 643 .id = SLIMBUS_0_RX, 644 .probe = msm_dai_q6_dai_probe, 645 .remove = msm_dai_q6_dai_remove, 646 .playback = { 647 .stream_name = "Slimbus Playback", 648 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 649 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | 650 SNDRV_PCM_RATE_192000, 651 .formats = SNDRV_PCM_FMTBIT_S16_LE | 652 SNDRV_PCM_FMTBIT_S24_LE, 653 .channels_min = 1, 654 .channels_max = 8, 655 .rate_min = 8000, 656 .rate_max = 192000, 657 }, 658 }, { 659 .name = "SLIMBUS_0_TX", 660 .ops = &q6slim_ops, 661 .id = SLIMBUS_0_TX, 662 .probe = msm_dai_q6_dai_probe, 663 .remove = msm_dai_q6_dai_remove, 664 .capture = { 665 .stream_name = "Slimbus Capture", 666 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 667 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | 668 SNDRV_PCM_RATE_192000, 669 .formats = SNDRV_PCM_FMTBIT_S16_LE | 670 SNDRV_PCM_FMTBIT_S24_LE, 671 .channels_min = 1, 672 .channels_max = 8, 673 .rate_min = 8000, 674 .rate_max = 192000, 675 }, 676 }, { 677 .playback = { 678 .stream_name = "Slimbus1 Playback", 679 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | 680 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | 681 SNDRV_PCM_RATE_192000, 682 .formats = SNDRV_PCM_FMTBIT_S16_LE | 683 SNDRV_PCM_FMTBIT_S24_LE, 684 .channels_min = 1, 685 .channels_max = 2, 686 .rate_min = 8000, 687 .rate_max = 192000, 688 }, 689 .name = "SLIMBUS_1_RX", 690 .ops = &q6slim_ops, 691 .id = SLIMBUS_1_RX, 692 .probe = msm_dai_q6_dai_probe, 693 .remove = msm_dai_q6_dai_remove, 694 }, { 695 .name = "SLIMBUS_1_TX", 696 .ops = &q6slim_ops, 697 .id = SLIMBUS_1_TX, 698 .probe = msm_dai_q6_dai_probe, 699 .remove = msm_dai_q6_dai_remove, 700 .capture = { 701 .stream_name = "Slimbus1 Capture", 702 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 703 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | 704 SNDRV_PCM_RATE_192000, 705 .formats = SNDRV_PCM_FMTBIT_S16_LE | 706 SNDRV_PCM_FMTBIT_S24_LE, 707 .channels_min = 1, 708 .channels_max = 8, 709 .rate_min = 8000, 710 .rate_max = 192000, 711 }, 712 }, { 713 .playback = { 714 .stream_name = "Slimbus2 Playback", 715 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 716 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | 717 SNDRV_PCM_RATE_192000, 718 .formats = SNDRV_PCM_FMTBIT_S16_LE | 719 SNDRV_PCM_FMTBIT_S24_LE, 720 .channels_min = 1, 721 .channels_max = 8, 722 .rate_min = 8000, 723 .rate_max = 192000, 724 }, 725 .name = "SLIMBUS_2_RX", 726 .ops = &q6slim_ops, 727 .id = SLIMBUS_2_RX, 728 .probe = msm_dai_q6_dai_probe, 729 .remove = msm_dai_q6_dai_remove, 730 731 }, { 732 .name = "SLIMBUS_2_TX", 733 .ops = &q6slim_ops, 734 .id = SLIMBUS_2_TX, 735 .probe = msm_dai_q6_dai_probe, 736 .remove = msm_dai_q6_dai_remove, 737 .capture = { 738 .stream_name = "Slimbus2 Capture", 739 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 740 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | 741 SNDRV_PCM_RATE_192000, 742 .formats = SNDRV_PCM_FMTBIT_S16_LE | 743 SNDRV_PCM_FMTBIT_S24_LE, 744 .channels_min = 1, 745 .channels_max = 8, 746 .rate_min = 8000, 747 .rate_max = 192000, 748 }, 749 }, { 750 .playback = { 751 .stream_name = "Slimbus3 Playback", 752 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | 753 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | 754 SNDRV_PCM_RATE_192000, 755 .formats = SNDRV_PCM_FMTBIT_S16_LE | 756 SNDRV_PCM_FMTBIT_S24_LE, 757 .channels_min = 1, 758 .channels_max = 2, 759 .rate_min = 8000, 760 .rate_max = 192000, 761 }, 762 .name = "SLIMBUS_3_RX", 763 .ops = &q6slim_ops, 764 .id = SLIMBUS_3_RX, 765 .probe = msm_dai_q6_dai_probe, 766 .remove = msm_dai_q6_dai_remove, 767 768 }, { 769 .name = "SLIMBUS_3_TX", 770 .ops = &q6slim_ops, 771 .id = SLIMBUS_3_TX, 772 .probe = msm_dai_q6_dai_probe, 773 .remove = msm_dai_q6_dai_remove, 774 .capture = { 775 .stream_name = "Slimbus3 Capture", 776 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 777 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | 778 SNDRV_PCM_RATE_192000, 779 .formats = SNDRV_PCM_FMTBIT_S16_LE | 780 SNDRV_PCM_FMTBIT_S24_LE, 781 .channels_min = 1, 782 .channels_max = 8, 783 .rate_min = 8000, 784 .rate_max = 192000, 785 }, 786 }, { 787 .playback = { 788 .stream_name = "Slimbus4 Playback", 789 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | 790 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | 791 SNDRV_PCM_RATE_192000, 792 .formats = SNDRV_PCM_FMTBIT_S16_LE | 793 SNDRV_PCM_FMTBIT_S24_LE, 794 .channels_min = 1, 795 .channels_max = 2, 796 .rate_min = 8000, 797 .rate_max = 192000, 798 }, 799 .name = "SLIMBUS_4_RX", 800 .ops = &q6slim_ops, 801 .id = SLIMBUS_4_RX, 802 .probe = msm_dai_q6_dai_probe, 803 .remove = msm_dai_q6_dai_remove, 804 805 }, { 806 .name = "SLIMBUS_4_TX", 807 .ops = &q6slim_ops, 808 .id = SLIMBUS_4_TX, 809 .probe = msm_dai_q6_dai_probe, 810 .remove = msm_dai_q6_dai_remove, 811 .capture = { 812 .stream_name = "Slimbus4 Capture", 813 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 814 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | 815 SNDRV_PCM_RATE_192000, 816 .formats = SNDRV_PCM_FMTBIT_S16_LE | 817 SNDRV_PCM_FMTBIT_S24_LE, 818 .channels_min = 1, 819 .channels_max = 8, 820 .rate_min = 8000, 821 .rate_max = 192000, 822 }, 823 }, { 824 .playback = { 825 .stream_name = "Slimbus5 Playback", 826 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | 827 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | 828 SNDRV_PCM_RATE_192000, 829 .formats = SNDRV_PCM_FMTBIT_S16_LE | 830 SNDRV_PCM_FMTBIT_S24_LE, 831 .channels_min = 1, 832 .channels_max = 2, 833 .rate_min = 8000, 834 .rate_max = 192000, 835 }, 836 .name = "SLIMBUS_5_RX", 837 .ops = &q6slim_ops, 838 .id = SLIMBUS_5_RX, 839 .probe = msm_dai_q6_dai_probe, 840 .remove = msm_dai_q6_dai_remove, 841 842 }, { 843 .name = "SLIMBUS_5_TX", 844 .ops = &q6slim_ops, 845 .id = SLIMBUS_5_TX, 846 .probe = msm_dai_q6_dai_probe, 847 .remove = msm_dai_q6_dai_remove, 848 .capture = { 849 .stream_name = "Slimbus5 Capture", 850 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 851 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | 852 SNDRV_PCM_RATE_192000, 853 .formats = SNDRV_PCM_FMTBIT_S16_LE | 854 SNDRV_PCM_FMTBIT_S24_LE, 855 .channels_min = 1, 856 .channels_max = 8, 857 .rate_min = 8000, 858 .rate_max = 192000, 859 }, 860 }, { 861 .playback = { 862 .stream_name = "Slimbus6 Playback", 863 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | 864 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | 865 SNDRV_PCM_RATE_192000, 866 .formats = SNDRV_PCM_FMTBIT_S16_LE | 867 SNDRV_PCM_FMTBIT_S24_LE, 868 .channels_min = 1, 869 .channels_max = 2, 870 .rate_min = 8000, 871 .rate_max = 192000, 872 }, 873 .ops = &q6slim_ops, 874 .name = "SLIMBUS_6_RX", 875 .id = SLIMBUS_6_RX, 876 .probe = msm_dai_q6_dai_probe, 877 .remove = msm_dai_q6_dai_remove, 878 879 }, { 880 .name = "SLIMBUS_6_TX", 881 .ops = &q6slim_ops, 882 .id = SLIMBUS_6_TX, 883 .probe = msm_dai_q6_dai_probe, 884 .remove = msm_dai_q6_dai_remove, 885 .capture = { 886 .stream_name = "Slimbus6 Capture", 887 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 888 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | 889 SNDRV_PCM_RATE_192000, 890 .formats = SNDRV_PCM_FMTBIT_S16_LE | 891 SNDRV_PCM_FMTBIT_S24_LE, 892 .channels_min = 1, 893 .channels_max = 8, 894 .rate_min = 8000, 895 .rate_max = 192000, 896 }, 897 }, { 898 .playback = { 899 .stream_name = "Primary MI2S Playback", 900 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 901 SNDRV_PCM_RATE_16000, 902 .formats = SNDRV_PCM_FMTBIT_S16_LE | 903 SNDRV_PCM_FMTBIT_S24_LE, 904 .rate_min = 8000, 905 .rate_max = 48000, 906 }, 907 .id = PRIMARY_MI2S_RX, 908 .name = "PRI_MI2S_RX", 909 .ops = &q6i2s_ops, 910 .probe = msm_dai_q6_dai_probe, 911 .remove = msm_dai_q6_dai_remove, 912 }, { 913 .capture = { 914 .stream_name = "Primary MI2S Capture", 915 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 916 SNDRV_PCM_RATE_16000, 917 .formats = SNDRV_PCM_FMTBIT_S16_LE | 918 SNDRV_PCM_FMTBIT_S24_LE, 919 .rate_min = 8000, 920 .rate_max = 48000, 921 }, 922 .id = PRIMARY_MI2S_TX, 923 .name = "PRI_MI2S_TX", 924 .ops = &q6i2s_ops, 925 .probe = msm_dai_q6_dai_probe, 926 .remove = msm_dai_q6_dai_remove, 927 }, { 928 .playback = { 929 .stream_name = "Secondary MI2S Playback", 930 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 931 SNDRV_PCM_RATE_16000, 932 .formats = SNDRV_PCM_FMTBIT_S16_LE, 933 .rate_min = 8000, 934 .rate_max = 48000, 935 }, 936 .name = "SEC_MI2S_RX", 937 .id = SECONDARY_MI2S_RX, 938 .ops = &q6i2s_ops, 939 .probe = msm_dai_q6_dai_probe, 940 .remove = msm_dai_q6_dai_remove, 941 }, { 942 .capture = { 943 .stream_name = "Secondary MI2S Capture", 944 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 945 SNDRV_PCM_RATE_16000, 946 .formats = SNDRV_PCM_FMTBIT_S16_LE | 947 SNDRV_PCM_FMTBIT_S24_LE, 948 .rate_min = 8000, 949 .rate_max = 48000, 950 }, 951 .id = SECONDARY_MI2S_TX, 952 .name = "SEC_MI2S_TX", 953 .ops = &q6i2s_ops, 954 .probe = msm_dai_q6_dai_probe, 955 .remove = msm_dai_q6_dai_remove, 956 }, { 957 .playback = { 958 .stream_name = "Tertiary MI2S Playback", 959 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 960 SNDRV_PCM_RATE_16000, 961 .formats = SNDRV_PCM_FMTBIT_S16_LE, 962 .rate_min = 8000, 963 .rate_max = 48000, 964 }, 965 .name = "TERT_MI2S_RX", 966 .id = TERTIARY_MI2S_RX, 967 .ops = &q6i2s_ops, 968 .probe = msm_dai_q6_dai_probe, 969 .remove = msm_dai_q6_dai_remove, 970 }, { 971 .capture = { 972 .stream_name = "Tertiary MI2S Capture", 973 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 974 SNDRV_PCM_RATE_16000, 975 .formats = SNDRV_PCM_FMTBIT_S16_LE | 976 SNDRV_PCM_FMTBIT_S24_LE, 977 .rate_min = 8000, 978 .rate_max = 48000, 979 }, 980 .id = TERTIARY_MI2S_TX, 981 .name = "TERT_MI2S_TX", 982 .ops = &q6i2s_ops, 983 .probe = msm_dai_q6_dai_probe, 984 .remove = msm_dai_q6_dai_remove, 985 }, { 986 .playback = { 987 .stream_name = "Quaternary MI2S Playback", 988 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 989 SNDRV_PCM_RATE_16000, 990 .formats = SNDRV_PCM_FMTBIT_S16_LE, 991 .rate_min = 8000, 992 .rate_max = 48000, 993 }, 994 .name = "QUAT_MI2S_RX", 995 .id = QUATERNARY_MI2S_RX, 996 .ops = &q6i2s_ops, 997 .probe = msm_dai_q6_dai_probe, 998 .remove = msm_dai_q6_dai_remove, 999 }, { 1000 .capture = { 1001 .stream_name = "Quaternary MI2S Capture", 1002 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | 1003 SNDRV_PCM_RATE_16000, 1004 .formats = SNDRV_PCM_FMTBIT_S16_LE | 1005 SNDRV_PCM_FMTBIT_S24_LE, 1006 .rate_min = 8000, 1007 .rate_max = 48000, 1008 }, 1009 .id = QUATERNARY_MI2S_TX, 1010 .name = "QUAT_MI2S_TX", 1011 .ops = &q6i2s_ops, 1012 .probe = msm_dai_q6_dai_probe, 1013 .remove = msm_dai_q6_dai_remove, 1014 }, 1015 Q6AFE_TDM_PB_DAI("Primary", 0, PRIMARY_TDM_RX_0), 1016 Q6AFE_TDM_PB_DAI("Primary", 1, PRIMARY_TDM_RX_1), 1017 Q6AFE_TDM_PB_DAI("Primary", 2, PRIMARY_TDM_RX_2), 1018 Q6AFE_TDM_PB_DAI("Primary", 3, PRIMARY_TDM_RX_3), 1019 Q6AFE_TDM_PB_DAI("Primary", 4, PRIMARY_TDM_RX_4), 1020 Q6AFE_TDM_PB_DAI("Primary", 5, PRIMARY_TDM_RX_5), 1021 Q6AFE_TDM_PB_DAI("Primary", 6, PRIMARY_TDM_RX_6), 1022 Q6AFE_TDM_PB_DAI("Primary", 7, PRIMARY_TDM_RX_7), 1023 Q6AFE_TDM_CAP_DAI("Primary", 0, PRIMARY_TDM_TX_0), 1024 Q6AFE_TDM_CAP_DAI("Primary", 1, PRIMARY_TDM_TX_1), 1025 Q6AFE_TDM_CAP_DAI("Primary", 2, PRIMARY_TDM_TX_2), 1026 Q6AFE_TDM_CAP_DAI("Primary", 3, PRIMARY_TDM_TX_3), 1027 Q6AFE_TDM_CAP_DAI("Primary", 4, PRIMARY_TDM_TX_4), 1028 Q6AFE_TDM_CAP_DAI("Primary", 5, PRIMARY_TDM_TX_5), 1029 Q6AFE_TDM_CAP_DAI("Primary", 6, PRIMARY_TDM_TX_6), 1030 Q6AFE_TDM_CAP_DAI("Primary", 7, PRIMARY_TDM_TX_7), 1031 Q6AFE_TDM_PB_DAI("Secondary", 0, SECONDARY_TDM_RX_0), 1032 Q6AFE_TDM_PB_DAI("Secondary", 1, SECONDARY_TDM_RX_1), 1033 Q6AFE_TDM_PB_DAI("Secondary", 2, SECONDARY_TDM_RX_2), 1034 Q6AFE_TDM_PB_DAI("Secondary", 3, SECONDARY_TDM_RX_3), 1035 Q6AFE_TDM_PB_DAI("Secondary", 4, SECONDARY_TDM_RX_4), 1036 Q6AFE_TDM_PB_DAI("Secondary", 5, SECONDARY_TDM_RX_5), 1037 Q6AFE_TDM_PB_DAI("Secondary", 6, SECONDARY_TDM_RX_6), 1038 Q6AFE_TDM_PB_DAI("Secondary", 7, SECONDARY_TDM_RX_7), 1039 Q6AFE_TDM_CAP_DAI("Secondary", 0, SECONDARY_TDM_TX_0), 1040 Q6AFE_TDM_CAP_DAI("Secondary", 1, SECONDARY_TDM_TX_1), 1041 Q6AFE_TDM_CAP_DAI("Secondary", 2, SECONDARY_TDM_TX_2), 1042 Q6AFE_TDM_CAP_DAI("Secondary", 3, SECONDARY_TDM_TX_3), 1043 Q6AFE_TDM_CAP_DAI("Secondary", 4, SECONDARY_TDM_TX_4), 1044 Q6AFE_TDM_CAP_DAI("Secondary", 5, SECONDARY_TDM_TX_5), 1045 Q6AFE_TDM_CAP_DAI("Secondary", 6, SECONDARY_TDM_TX_6), 1046 Q6AFE_TDM_CAP_DAI("Secondary", 7, SECONDARY_TDM_TX_7), 1047 Q6AFE_TDM_PB_DAI("Tertiary", 0, TERTIARY_TDM_RX_0), 1048 Q6AFE_TDM_PB_DAI("Tertiary", 1, TERTIARY_TDM_RX_1), 1049 Q6AFE_TDM_PB_DAI("Tertiary", 2, TERTIARY_TDM_RX_2), 1050 Q6AFE_TDM_PB_DAI("Tertiary", 3, TERTIARY_TDM_RX_3), 1051 Q6AFE_TDM_PB_DAI("Tertiary", 4, TERTIARY_TDM_RX_4), 1052 Q6AFE_TDM_PB_DAI("Tertiary", 5, TERTIARY_TDM_RX_5), 1053 Q6AFE_TDM_PB_DAI("Tertiary", 6, TERTIARY_TDM_RX_6), 1054 Q6AFE_TDM_PB_DAI("Tertiary", 7, TERTIARY_TDM_RX_7), 1055 Q6AFE_TDM_CAP_DAI("Tertiary", 0, TERTIARY_TDM_TX_0), 1056 Q6AFE_TDM_CAP_DAI("Tertiary", 1, TERTIARY_TDM_TX_1), 1057 Q6AFE_TDM_CAP_DAI("Tertiary", 2, TERTIARY_TDM_TX_2), 1058 Q6AFE_TDM_CAP_DAI("Tertiary", 3, TERTIARY_TDM_TX_3), 1059 Q6AFE_TDM_CAP_DAI("Tertiary", 4, TERTIARY_TDM_TX_4), 1060 Q6AFE_TDM_CAP_DAI("Tertiary", 5, TERTIARY_TDM_TX_5), 1061 Q6AFE_TDM_CAP_DAI("Tertiary", 6, TERTIARY_TDM_TX_6), 1062 Q6AFE_TDM_CAP_DAI("Tertiary", 7, TERTIARY_TDM_TX_7), 1063 Q6AFE_TDM_PB_DAI("Quaternary", 0, QUATERNARY_TDM_RX_0), 1064 Q6AFE_TDM_PB_DAI("Quaternary", 1, QUATERNARY_TDM_RX_1), 1065 Q6AFE_TDM_PB_DAI("Quaternary", 2, QUATERNARY_TDM_RX_2), 1066 Q6AFE_TDM_PB_DAI("Quaternary", 3, QUATERNARY_TDM_RX_3), 1067 Q6AFE_TDM_PB_DAI("Quaternary", 4, QUATERNARY_TDM_RX_4), 1068 Q6AFE_TDM_PB_DAI("Quaternary", 5, QUATERNARY_TDM_RX_5), 1069 Q6AFE_TDM_PB_DAI("Quaternary", 6, QUATERNARY_TDM_RX_6), 1070 Q6AFE_TDM_PB_DAI("Quaternary", 7, QUATERNARY_TDM_RX_7), 1071 Q6AFE_TDM_CAP_DAI("Quaternary", 0, QUATERNARY_TDM_TX_0), 1072 Q6AFE_TDM_CAP_DAI("Quaternary", 1, QUATERNARY_TDM_TX_1), 1073 Q6AFE_TDM_CAP_DAI("Quaternary", 2, QUATERNARY_TDM_TX_2), 1074 Q6AFE_TDM_CAP_DAI("Quaternary", 3, QUATERNARY_TDM_TX_3), 1075 Q6AFE_TDM_CAP_DAI("Quaternary", 4, QUATERNARY_TDM_TX_4), 1076 Q6AFE_TDM_CAP_DAI("Quaternary", 5, QUATERNARY_TDM_TX_5), 1077 Q6AFE_TDM_CAP_DAI("Quaternary", 6, QUATERNARY_TDM_TX_6), 1078 Q6AFE_TDM_CAP_DAI("Quaternary", 7, QUATERNARY_TDM_TX_7), 1079 Q6AFE_TDM_PB_DAI("Quinary", 0, QUINARY_TDM_RX_0), 1080 Q6AFE_TDM_PB_DAI("Quinary", 1, QUINARY_TDM_RX_1), 1081 Q6AFE_TDM_PB_DAI("Quinary", 2, QUINARY_TDM_RX_2), 1082 Q6AFE_TDM_PB_DAI("Quinary", 3, QUINARY_TDM_RX_3), 1083 Q6AFE_TDM_PB_DAI("Quinary", 4, QUINARY_TDM_RX_4), 1084 Q6AFE_TDM_PB_DAI("Quinary", 5, QUINARY_TDM_RX_5), 1085 Q6AFE_TDM_PB_DAI("Quinary", 6, QUINARY_TDM_RX_6), 1086 Q6AFE_TDM_PB_DAI("Quinary", 7, QUINARY_TDM_RX_7), 1087 Q6AFE_TDM_CAP_DAI("Quinary", 0, QUINARY_TDM_TX_0), 1088 Q6AFE_TDM_CAP_DAI("Quinary", 1, QUINARY_TDM_TX_1), 1089 Q6AFE_TDM_CAP_DAI("Quinary", 2, QUINARY_TDM_TX_2), 1090 Q6AFE_TDM_CAP_DAI("Quinary", 3, QUINARY_TDM_TX_3), 1091 Q6AFE_TDM_CAP_DAI("Quinary", 4, QUINARY_TDM_TX_4), 1092 Q6AFE_TDM_CAP_DAI("Quinary", 5, QUINARY_TDM_TX_5), 1093 Q6AFE_TDM_CAP_DAI("Quinary", 6, QUINARY_TDM_TX_6), 1094 Q6AFE_TDM_CAP_DAI("Quinary", 7, QUINARY_TDM_TX_7), 1095 { 1096 .playback = { 1097 .stream_name = "Display Port Playback", 1098 .rates = SNDRV_PCM_RATE_48000 | 1099 SNDRV_PCM_RATE_96000 | 1100 SNDRV_PCM_RATE_192000, 1101 .formats = SNDRV_PCM_FMTBIT_S16_LE | 1102 SNDRV_PCM_FMTBIT_S24_LE, 1103 .channels_min = 2, 1104 .channels_max = 8, 1105 .rate_max = 192000, 1106 .rate_min = 48000, 1107 }, 1108 .ops = &q6hdmi_ops, 1109 .id = DISPLAY_PORT_RX, 1110 .name = "DISPLAY_PORT", 1111 .probe = msm_dai_q6_dai_probe, 1112 .remove = msm_dai_q6_dai_remove, 1113 }, 1114 }; 1115 1116 static int q6afe_of_xlate_dai_name(struct snd_soc_component *component, 1117 struct of_phandle_args *args, 1118 const char **dai_name) 1119 { 1120 int id = args->args[0]; 1121 int ret = -EINVAL; 1122 int i; 1123 1124 for (i = 0; i < ARRAY_SIZE(q6afe_dais); i++) { 1125 if (q6afe_dais[i].id == id) { 1126 *dai_name = q6afe_dais[i].name; 1127 ret = 0; 1128 break; 1129 } 1130 } 1131 1132 return ret; 1133 } 1134 1135 static const struct snd_soc_dapm_widget q6afe_dai_widgets[] = { 1136 SND_SOC_DAPM_AIF_IN("HDMI_RX", NULL, 0, 0, 0, 0), 1137 SND_SOC_DAPM_AIF_IN("SLIMBUS_0_RX", NULL, 0, 0, 0, 0), 1138 SND_SOC_DAPM_AIF_IN("SLIMBUS_1_RX", NULL, 0, 0, 0, 0), 1139 SND_SOC_DAPM_AIF_IN("SLIMBUS_2_RX", NULL, 0, 0, 0, 0), 1140 SND_SOC_DAPM_AIF_IN("SLIMBUS_3_RX", NULL, 0, 0, 0, 0), 1141 SND_SOC_DAPM_AIF_IN("SLIMBUS_4_RX", NULL, 0, 0, 0, 0), 1142 SND_SOC_DAPM_AIF_IN("SLIMBUS_5_RX", NULL, 0, 0, 0, 0), 1143 SND_SOC_DAPM_AIF_IN("SLIMBUS_6_RX", NULL, 0, 0, 0, 0), 1144 SND_SOC_DAPM_AIF_OUT("SLIMBUS_0_TX", NULL, 0, 0, 0, 0), 1145 SND_SOC_DAPM_AIF_OUT("SLIMBUS_1_TX", NULL, 0, 0, 0, 0), 1146 SND_SOC_DAPM_AIF_OUT("SLIMBUS_2_TX", NULL, 0, 0, 0, 0), 1147 SND_SOC_DAPM_AIF_OUT("SLIMBUS_3_TX", NULL, 0, 0, 0, 0), 1148 SND_SOC_DAPM_AIF_OUT("SLIMBUS_4_TX", NULL, 0, 0, 0, 0), 1149 SND_SOC_DAPM_AIF_OUT("SLIMBUS_5_TX", NULL, 0, 0, 0, 0), 1150 SND_SOC_DAPM_AIF_OUT("SLIMBUS_6_TX", NULL, 0, 0, 0, 0), 1151 SND_SOC_DAPM_AIF_IN("QUAT_MI2S_RX", NULL, 1152 0, 0, 0, 0), 1153 SND_SOC_DAPM_AIF_OUT("QUAT_MI2S_TX", NULL, 1154 0, 0, 0, 0), 1155 SND_SOC_DAPM_AIF_IN("TERT_MI2S_RX", NULL, 1156 0, 0, 0, 0), 1157 SND_SOC_DAPM_AIF_OUT("TERT_MI2S_TX", NULL, 1158 0, 0, 0, 0), 1159 SND_SOC_DAPM_AIF_IN("SEC_MI2S_RX", NULL, 1160 0, 0, 0, 0), 1161 SND_SOC_DAPM_AIF_OUT("SEC_MI2S_TX", NULL, 1162 0, 0, 0, 0), 1163 SND_SOC_DAPM_AIF_IN("SEC_MI2S_RX_SD1", 1164 "Secondary MI2S Playback SD1", 1165 0, 0, 0, 0), 1166 SND_SOC_DAPM_AIF_IN("PRI_MI2S_RX", NULL, 1167 0, 0, 0, 0), 1168 SND_SOC_DAPM_AIF_OUT("PRI_MI2S_TX", NULL, 1169 0, 0, 0, 0), 1170 1171 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_0", NULL, 1172 0, 0, 0, 0), 1173 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_1", NULL, 1174 0, 0, 0, 0), 1175 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_2", NULL, 1176 0, 0, 0, 0), 1177 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_3", NULL, 1178 0, 0, 0, 0), 1179 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_4", NULL, 1180 0, 0, 0, 0), 1181 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_5", NULL, 1182 0, 0, 0, 0), 1183 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_6", NULL, 1184 0, 0, 0, 0), 1185 SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_7", NULL, 1186 0, 0, 0, 0), 1187 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_0", NULL, 1188 0, 0, 0, 0), 1189 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_1", NULL, 1190 0, 0, 0, 0), 1191 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_2", NULL, 1192 0, 0, 0, 0), 1193 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_3", NULL, 1194 0, 0, 0, 0), 1195 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_4", NULL, 1196 0, 0, 0, 0), 1197 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_5", NULL, 1198 0, 0, 0, 0), 1199 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_6", NULL, 1200 0, 0, 0, 0), 1201 SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_7", NULL, 1202 0, 0, 0, 0), 1203 1204 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_0", NULL, 1205 0, 0, 0, 0), 1206 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_1", NULL, 1207 0, 0, 0, 0), 1208 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_2", NULL, 1209 0, 0, 0, 0), 1210 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_3", NULL, 1211 0, 0, 0, 0), 1212 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_4", NULL, 1213 0, 0, 0, 0), 1214 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_5", NULL, 1215 0, 0, 0, 0), 1216 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_6", NULL, 1217 0, 0, 0, 0), 1218 SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_7", NULL, 1219 0, 0, 0, 0), 1220 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_0", NULL, 1221 0, 0, 0, 0), 1222 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_1", NULL, 1223 0, 0, 0, 0), 1224 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_2", NULL, 1225 0, 0, 0, 0), 1226 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_3", NULL, 1227 0, 0, 0, 0), 1228 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_4", NULL, 1229 0, 0, 0, 0), 1230 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_5", NULL, 1231 0, 0, 0, 0), 1232 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_6", NULL, 1233 0, 0, 0, 0), 1234 SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_7", NULL, 1235 0, 0, 0, 0), 1236 1237 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_0", NULL, 1238 0, 0, 0, 0), 1239 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_1", NULL, 1240 0, 0, 0, 0), 1241 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_2", NULL, 1242 0, 0, 0, 0), 1243 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_3", NULL, 1244 0, 0, 0, 0), 1245 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_4", NULL, 1246 0, 0, 0, 0), 1247 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_5", NULL, 1248 0, 0, 0, 0), 1249 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_6", NULL, 1250 0, 0, 0, 0), 1251 SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_7", NULL, 1252 0, 0, 0, 0), 1253 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_0", NULL, 1254 0, 0, 0, 0), 1255 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_1", NULL, 1256 0, 0, 0, 0), 1257 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_2", NULL, 1258 0, 0, 0, 0), 1259 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_3", NULL, 1260 0, 0, 0, 0), 1261 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_4", NULL, 1262 0, 0, 0, 0), 1263 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_5", NULL, 1264 0, 0, 0, 0), 1265 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_6", NULL, 1266 0, 0, 0, 0), 1267 SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_7", NULL, 1268 0, 0, 0, 0), 1269 1270 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_0", NULL, 1271 0, 0, 0, 0), 1272 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_1", NULL, 1273 0, 0, 0, 0), 1274 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_2", NULL, 1275 0, 0, 0, 0), 1276 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_3", NULL, 1277 0, 0, 0, 0), 1278 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_4", NULL, 1279 0, 0, 0, 0), 1280 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_5", NULL, 1281 0, 0, 0, 0), 1282 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_6", NULL, 1283 0, 0, 0, 0), 1284 SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_7", NULL, 1285 0, 0, 0, 0), 1286 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_0", NULL, 1287 0, 0, 0, 0), 1288 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_1", NULL, 1289 0, 0, 0, 0), 1290 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_2", NULL, 1291 0, 0, 0, 0), 1292 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_3", NULL, 1293 0, 0, 0, 0), 1294 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_4", NULL, 1295 0, 0, 0, 0), 1296 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_5", NULL, 1297 0, 0, 0, 0), 1298 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_6", NULL, 1299 0, 0, 0, 0), 1300 SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_7", NULL, 1301 0, 0, 0, 0), 1302 1303 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_0", NULL, 1304 0, 0, 0, 0), 1305 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_1", NULL, 1306 0, 0, 0, 0), 1307 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_2", NULL, 1308 0, 0, 0, 0), 1309 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_3", NULL, 1310 0, 0, 0, 0), 1311 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_4", NULL, 1312 0, 0, 0, 0), 1313 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_5", NULL, 1314 0, 0, 0, 0), 1315 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_6", NULL, 1316 0, 0, 0, 0), 1317 SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_7", NULL, 1318 0, 0, 0, 0), 1319 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_0", NULL, 1320 0, 0, 0, 0), 1321 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_1", NULL, 1322 0, 0, 0, 0), 1323 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_2", NULL, 1324 0, 0, 0, 0), 1325 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_3", NULL, 1326 0, 0, 0, 0), 1327 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_4", NULL, 1328 0, 0, 0, 0), 1329 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_5", NULL, 1330 0, 0, 0, 0), 1331 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_6", NULL, 1332 0, 0, 0, 0), 1333 SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_7", NULL, 1334 0, 0, 0, 0), 1335 SND_SOC_DAPM_AIF_OUT("DISPLAY_PORT_RX", "NULL", 0, 0, 0, 0), 1336 }; 1337 1338 static const struct snd_soc_component_driver q6afe_dai_component = { 1339 .name = "q6afe-dai-component", 1340 .dapm_widgets = q6afe_dai_widgets, 1341 .num_dapm_widgets = ARRAY_SIZE(q6afe_dai_widgets), 1342 .dapm_routes = q6afe_dapm_routes, 1343 .num_dapm_routes = ARRAY_SIZE(q6afe_dapm_routes), 1344 .of_xlate_dai_name = q6afe_of_xlate_dai_name, 1345 1346 }; 1347 1348 static void of_q6afe_parse_dai_data(struct device *dev, 1349 struct q6afe_dai_data *data) 1350 { 1351 struct device_node *node; 1352 int ret; 1353 1354 for_each_child_of_node(dev->of_node, node) { 1355 unsigned int lines[Q6AFE_MAX_MI2S_LINES]; 1356 struct q6afe_dai_priv_data *priv; 1357 int id, i, num_lines; 1358 1359 ret = of_property_read_u32(node, "reg", &id); 1360 if (ret || id < 0 || id >= AFE_PORT_MAX) { 1361 dev_err(dev, "valid dai id not found:%d\n", ret); 1362 continue; 1363 } 1364 1365 switch (id) { 1366 /* MI2S specific properties */ 1367 case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX: 1368 priv = &data->priv[id]; 1369 ret = of_property_read_variable_u32_array(node, 1370 "qcom,sd-lines", 1371 lines, 0, 1372 Q6AFE_MAX_MI2S_LINES); 1373 if (ret < 0) 1374 num_lines = 0; 1375 else 1376 num_lines = ret; 1377 1378 priv->sd_line_mask = 0; 1379 1380 for (i = 0; i < num_lines; i++) 1381 priv->sd_line_mask |= BIT(lines[i]); 1382 1383 break; 1384 case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7: 1385 priv = &data->priv[id]; 1386 ret = of_property_read_u32(node, "qcom,tdm-sync-mode", 1387 &priv->sync_mode); 1388 if (ret) { 1389 dev_err(dev, "No Sync mode from DT\n"); 1390 break; 1391 } 1392 ret = of_property_read_u32(node, "qcom,tdm-sync-src", 1393 &priv->sync_src); 1394 if (ret) { 1395 dev_err(dev, "No Sync Src from DT\n"); 1396 break; 1397 } 1398 ret = of_property_read_u32(node, "qcom,tdm-data-out", 1399 &priv->data_out_enable); 1400 if (ret) { 1401 dev_err(dev, "No Data out enable from DT\n"); 1402 break; 1403 } 1404 ret = of_property_read_u32(node, "qcom,tdm-invert-sync", 1405 &priv->invert_sync); 1406 if (ret) { 1407 dev_err(dev, "No Invert sync from DT\n"); 1408 break; 1409 } 1410 ret = of_property_read_u32(node, "qcom,tdm-data-delay", 1411 &priv->data_delay); 1412 if (ret) { 1413 dev_err(dev, "No Data Delay from DT\n"); 1414 break; 1415 } 1416 ret = of_property_read_u32(node, "qcom,tdm-data-align", 1417 &priv->data_align); 1418 if (ret) { 1419 dev_err(dev, "No Data align from DT\n"); 1420 break; 1421 } 1422 break; 1423 default: 1424 break; 1425 } 1426 } 1427 } 1428 1429 static int q6afe_dai_dev_probe(struct platform_device *pdev) 1430 { 1431 struct q6afe_dai_data *dai_data; 1432 struct device *dev = &pdev->dev; 1433 1434 dai_data = devm_kzalloc(dev, sizeof(*dai_data), GFP_KERNEL); 1435 if (!dai_data) 1436 return -ENOMEM; 1437 1438 dev_set_drvdata(dev, dai_data); 1439 1440 of_q6afe_parse_dai_data(dev, dai_data); 1441 1442 return devm_snd_soc_register_component(dev, &q6afe_dai_component, 1443 q6afe_dais, ARRAY_SIZE(q6afe_dais)); 1444 } 1445 1446 static const struct of_device_id q6afe_dai_device_id[] = { 1447 { .compatible = "qcom,q6afe-dais" }, 1448 {}, 1449 }; 1450 MODULE_DEVICE_TABLE(of, q6afe_dai_device_id); 1451 1452 static struct platform_driver q6afe_dai_platform_driver = { 1453 .driver = { 1454 .name = "q6afe-dai", 1455 .of_match_table = of_match_ptr(q6afe_dai_device_id), 1456 }, 1457 .probe = q6afe_dai_dev_probe, 1458 }; 1459 module_platform_driver(q6afe_dai_platform_driver); 1460 1461 MODULE_DESCRIPTION("Q6 Audio Fronend dai driver"); 1462 MODULE_LICENSE("GPL v2"); 1463