1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <sound/hdaudio_ext.h> 19 #include <sound/hda_register.h> 20 21 #include <linux/module.h> 22 #include <sound/intel-nhlt.h> 23 #include <sound/sof.h> 24 #include <sound/sof/xtensa.h> 25 #include "../ops.h" 26 #include "hda.h" 27 28 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 29 #include <sound/soc-acpi-intel-match.h> 30 #endif 31 32 /* platform specific devices */ 33 #include "shim.h" 34 35 #define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348) 36 #define IS_CNL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9dc8) 37 38 #define EXCEPT_MAX_HDR_SIZE 0x400 39 40 /* 41 * Debug 42 */ 43 44 struct hda_dsp_msg_code { 45 u32 code; 46 const char *msg; 47 }; 48 49 static bool hda_use_msi = IS_ENABLED(CONFIG_PCI); 50 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG) 51 module_param_named(use_msi, hda_use_msi, bool, 0444); 52 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode"); 53 #endif 54 55 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 56 static int hda_dmic_num = -1; 57 module_param_named(dmic_num, hda_dmic_num, int, 0444); 58 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); 59 #endif 60 61 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = { 62 {HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"}, 63 {HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"}, 64 {HDA_DSP_ROM_FW_ENTERED, "status: fw entered"}, 65 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"}, 66 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"}, 67 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"}, 68 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"}, 69 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"}, 70 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"}, 71 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"}, 72 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"}, 73 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"}, 74 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"}, 75 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"}, 76 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"}, 77 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"}, 78 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"}, 79 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"}, 80 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"}, 81 }; 82 83 static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev) 84 { 85 u32 status; 86 int i; 87 88 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 89 HDA_ADSP_FW_STATUS_SKL); 90 91 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 92 if (status == hda_dsp_rom_msg[i].code) { 93 dev_err(sdev->dev, "%s - code %8.8x\n", 94 hda_dsp_rom_msg[i].msg, status); 95 return; 96 } 97 } 98 99 /* not for us, must be generic sof message */ 100 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 101 } 102 103 static void hda_dsp_get_status(struct snd_sof_dev *sdev) 104 { 105 u32 status; 106 int i; 107 108 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 109 HDA_DSP_SRAM_REG_ROM_STATUS); 110 111 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 112 if (status == hda_dsp_rom_msg[i].code) { 113 dev_err(sdev->dev, "%s - code %8.8x\n", 114 hda_dsp_rom_msg[i].msg, status); 115 return; 116 } 117 } 118 119 /* not for us, must be generic sof message */ 120 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 121 } 122 123 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, 124 struct sof_ipc_dsp_oops_xtensa *xoops, 125 struct sof_ipc_panic_info *panic_info, 126 u32 *stack, size_t stack_words) 127 { 128 u32 offset = sdev->dsp_oops_offset; 129 130 /* first read registers */ 131 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); 132 133 /* note: variable AR register array is not read */ 134 135 /* then get panic info */ 136 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) { 137 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", 138 xoops->arch_hdr.totalsize); 139 return; 140 } 141 offset += xoops->arch_hdr.totalsize; 142 sof_block_read(sdev, sdev->mmio_bar, offset, 143 panic_info, sizeof(*panic_info)); 144 145 /* then get the stack */ 146 offset += sizeof(*panic_info); 147 sof_block_read(sdev, sdev->mmio_bar, offset, stack, 148 stack_words * sizeof(u32)); 149 } 150 151 void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags) 152 { 153 struct sof_ipc_dsp_oops_xtensa xoops; 154 struct sof_ipc_panic_info panic_info; 155 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 156 u32 status, panic; 157 158 /* try APL specific status message types first */ 159 hda_dsp_get_status_skl(sdev); 160 161 /* now try generic SOF status messages */ 162 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 163 HDA_ADSP_ERROR_CODE_SKL); 164 165 /*TODO: Check: there is no define in spec, but it is used in the code*/ 166 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 167 HDA_ADSP_ERROR_CODE_SKL + 0x4); 168 169 if (sdev->boot_complete) { 170 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 171 HDA_DSP_STACK_DUMP_SIZE); 172 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 173 stack, HDA_DSP_STACK_DUMP_SIZE); 174 } else { 175 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n", 176 status, panic); 177 hda_dsp_get_status_skl(sdev); 178 } 179 } 180 181 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) 182 { 183 struct sof_ipc_dsp_oops_xtensa xoops; 184 struct sof_ipc_panic_info panic_info; 185 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 186 u32 status, panic; 187 188 /* try APL specific status message types first */ 189 hda_dsp_get_status(sdev); 190 191 /* now try generic SOF status messages */ 192 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 193 HDA_DSP_SRAM_REG_FW_STATUS); 194 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); 195 196 if (sdev->boot_complete) { 197 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 198 HDA_DSP_STACK_DUMP_SIZE); 199 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 200 stack, HDA_DSP_STACK_DUMP_SIZE); 201 } else { 202 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n", 203 status, panic); 204 hda_dsp_get_status(sdev); 205 } 206 } 207 208 void hda_ipc_irq_dump(struct snd_sof_dev *sdev) 209 { 210 struct hdac_bus *bus = sof_to_bus(sdev); 211 u32 adspis; 212 u32 intsts; 213 u32 intctl; 214 u32 ppsts; 215 u8 rirbsts; 216 217 /* read key IRQ stats and config registers */ 218 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); 219 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); 220 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); 221 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); 222 rirbsts = snd_hdac_chip_readb(bus, RIRBSTS); 223 224 dev_err(sdev->dev, 225 "error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", 226 intsts, intctl, rirbsts); 227 dev_err(sdev->dev, 228 "error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", 229 ppsts, adspis); 230 } 231 232 void hda_ipc_dump(struct snd_sof_dev *sdev) 233 { 234 u32 hipcie; 235 u32 hipct; 236 u32 hipcctl; 237 238 hda_ipc_irq_dump(sdev); 239 240 /* read IPC status */ 241 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 242 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 243 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 244 245 /* dump the IPC regs */ 246 /* TODO: parse the raw msg */ 247 dev_err(sdev->dev, 248 "error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n", 249 hipcie, hipct, hipcctl); 250 } 251 252 static int hda_init(struct snd_sof_dev *sdev) 253 { 254 struct hda_bus *hbus; 255 struct hdac_bus *bus; 256 struct pci_dev *pci = to_pci_dev(sdev->dev); 257 int ret; 258 259 hbus = sof_to_hbus(sdev); 260 bus = sof_to_bus(sdev); 261 262 /* HDA bus init */ 263 sof_hda_bus_init(bus, &pci->dev); 264 265 /* Workaround for a communication error on CFL (bko#199007) and CNL */ 266 if (IS_CFL(pci) || IS_CNL(pci)) 267 bus->polling_mode = 1; 268 269 bus->use_posbuf = 1; 270 bus->bdl_pos_adj = 0; 271 272 mutex_init(&hbus->prepare_mutex); 273 hbus->pci = pci; 274 hbus->mixer_assigned = -1; 275 hbus->modelname = "sofbus"; 276 277 /* initialise hdac bus */ 278 bus->addr = pci_resource_start(pci, 0); 279 #if IS_ENABLED(CONFIG_PCI) 280 bus->remap_addr = pci_ioremap_bar(pci, 0); 281 #endif 282 if (!bus->remap_addr) { 283 dev_err(bus->dev, "error: ioremap error\n"); 284 return -ENXIO; 285 } 286 287 /* HDA base */ 288 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; 289 290 /* get controller capabilities */ 291 ret = hda_dsp_ctrl_get_caps(sdev); 292 if (ret < 0) 293 dev_err(sdev->dev, "error: get caps error\n"); 294 295 return ret; 296 } 297 298 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 299 300 static int check_nhlt_dmic(struct snd_sof_dev *sdev) 301 { 302 struct nhlt_acpi_table *nhlt; 303 int dmic_num; 304 305 nhlt = intel_nhlt_init(sdev->dev); 306 if (nhlt) { 307 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt); 308 intel_nhlt_free(nhlt); 309 if (dmic_num == 2 || dmic_num == 4) 310 return dmic_num; 311 } 312 313 return 0; 314 } 315 316 static const char *fixup_tplg_name(struct snd_sof_dev *sdev, 317 const char *sof_tplg_filename, 318 const char *idisp_str, 319 const char *dmic_str) 320 { 321 const char *tplg_filename = NULL; 322 char *filename; 323 char *split_ext; 324 325 filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL); 326 if (!filename) 327 return NULL; 328 329 /* this assumes a .tplg extension */ 330 split_ext = strsep(&filename, "."); 331 if (split_ext) { 332 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 333 "%s%s%s.tplg", 334 split_ext, idisp_str, dmic_str); 335 if (!tplg_filename) 336 return NULL; 337 } 338 return tplg_filename; 339 } 340 341 #endif 342 343 static int hda_init_caps(struct snd_sof_dev *sdev) 344 { 345 struct hdac_bus *bus = sof_to_bus(sdev); 346 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 347 struct hdac_ext_link *hlink; 348 struct snd_soc_acpi_mach_params *mach_params; 349 struct snd_soc_acpi_mach *hda_mach; 350 struct snd_sof_pdata *pdata = sdev->pdata; 351 struct snd_soc_acpi_mach *mach; 352 const char *tplg_filename; 353 const char *idisp_str; 354 const char *dmic_str; 355 int dmic_num; 356 int codec_num = 0; 357 int i; 358 #endif 359 int ret = 0; 360 361 device_disable_async_suspend(bus->dev); 362 363 /* check if dsp is there */ 364 if (bus->ppcap) 365 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); 366 367 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 368 /* init i915 and HDMI codecs */ 369 ret = hda_codec_i915_init(sdev); 370 if (ret < 0) { 371 dev_err(sdev->dev, "error: init i915 and HDMI codec failed\n"); 372 return ret; 373 } 374 #endif 375 376 /* Init HDA controller after i915 init */ 377 ret = hda_dsp_ctrl_init_chip(sdev, true); 378 if (ret < 0) { 379 dev_err(bus->dev, "error: init chip failed with ret: %d\n", 380 ret); 381 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 382 hda_codec_i915_exit(sdev); 383 #endif 384 return ret; 385 } 386 387 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 388 if (bus->mlcap) 389 snd_hdac_ext_bus_get_ml_capabilities(bus); 390 391 /* codec detection */ 392 if (!bus->codec_mask) { 393 dev_info(bus->dev, "no hda codecs found!\n"); 394 } else { 395 dev_info(bus->dev, "hda codecs found, mask %lx\n", 396 bus->codec_mask); 397 398 for (i = 0; i < HDA_MAX_CODECS; i++) { 399 if (bus->codec_mask & (1 << i)) 400 codec_num++; 401 } 402 403 /* 404 * If no machine driver is found, then: 405 * 406 * hda machine driver is used if : 407 * 1. there is one HDMI codec and one external HDAudio codec 408 * 2. only HDMI codec 409 */ 410 if (!pdata->machine && codec_num <= 2 && 411 HDA_IDISP_CODEC(bus->codec_mask)) { 412 hda_mach = snd_soc_acpi_intel_hda_machines; 413 pdata->machine = hda_mach; 414 415 /* topology: use the info from hda_machines */ 416 pdata->tplg_filename = 417 hda_mach->sof_tplg_filename; 418 419 /* firmware: pick the first in machine list */ 420 mach = pdata->desc->machines; 421 pdata->fw_filename = mach->sof_fw_filename; 422 423 dev_info(bus->dev, "using HDA machine driver %s now\n", 424 hda_mach->drv_name); 425 426 if (codec_num == 1) 427 idisp_str = "-idisp"; 428 else 429 idisp_str = ""; 430 431 /* first check NHLT for DMICs */ 432 dmic_num = check_nhlt_dmic(sdev); 433 434 /* allow for module parameter override */ 435 if (hda_dmic_num != -1) 436 dmic_num = hda_dmic_num; 437 438 switch (dmic_num) { 439 case 2: 440 dmic_str = "-2ch"; 441 break; 442 case 4: 443 dmic_str = "-4ch"; 444 break; 445 default: 446 dmic_num = 0; 447 dmic_str = ""; 448 break; 449 } 450 451 tplg_filename = pdata->tplg_filename; 452 tplg_filename = fixup_tplg_name(sdev, tplg_filename, 453 idisp_str, dmic_str); 454 if (!tplg_filename) { 455 hda_codec_i915_exit(sdev); 456 return ret; 457 } 458 pdata->tplg_filename = tplg_filename; 459 } 460 } 461 462 /* used by hda machine driver to create dai links */ 463 if (pdata->machine) { 464 mach_params = (struct snd_soc_acpi_mach_params *) 465 &pdata->machine->mach_params; 466 mach_params->codec_mask = bus->codec_mask; 467 mach_params->platform = dev_name(sdev->dev); 468 } 469 470 /* create codec instances */ 471 hda_codec_probe_bus(sdev); 472 473 hda_codec_i915_put(sdev); 474 475 /* 476 * we are done probing so decrement link counts 477 */ 478 list_for_each_entry(hlink, &bus->hlink_list, list) 479 snd_hdac_ext_bus_link_put(bus, hlink); 480 #endif 481 return 0; 482 } 483 484 static const struct sof_intel_dsp_desc 485 *get_chip_info(struct snd_sof_pdata *pdata) 486 { 487 const struct sof_dev_desc *desc = pdata->desc; 488 const struct sof_intel_dsp_desc *chip_info; 489 490 chip_info = desc->chip_info; 491 492 return chip_info; 493 } 494 495 int hda_dsp_probe(struct snd_sof_dev *sdev) 496 { 497 struct pci_dev *pci = to_pci_dev(sdev->dev); 498 struct sof_intel_hda_dev *hdev; 499 struct hdac_bus *bus; 500 const struct sof_intel_dsp_desc *chip; 501 int ret = 0; 502 503 /* 504 * detect DSP by checking class/subclass/prog-id information 505 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required 506 * class=04 subclass 01 prog-if 00: DSP is present 507 * (and may be required e.g. for DMIC or SSP support) 508 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works 509 */ 510 if (pci->class == 0x040300) { 511 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n"); 512 return -ENODEV; 513 } else if (pci->class != 0x040100 && pci->class != 0x040380) { 514 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class); 515 return -ENODEV; 516 } 517 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class); 518 519 chip = get_chip_info(sdev->pdata); 520 if (!chip) { 521 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n", 522 pci->device); 523 ret = -EIO; 524 goto err; 525 } 526 527 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL); 528 if (!hdev) 529 return -ENOMEM; 530 sdev->pdata->hw_pdata = hdev; 531 hdev->desc = chip; 532 533 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec", 534 PLATFORM_DEVID_NONE, 535 NULL, 0); 536 if (IS_ERR(hdev->dmic_dev)) { 537 dev_err(sdev->dev, "error: failed to create DMIC device\n"); 538 return PTR_ERR(hdev->dmic_dev); 539 } 540 541 /* 542 * use position update IPC if either it is forced 543 * or we don't have other choice 544 */ 545 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION) 546 hdev->no_ipc_position = 0; 547 #else 548 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0; 549 #endif 550 551 /* set up HDA base */ 552 bus = sof_to_bus(sdev); 553 ret = hda_init(sdev); 554 if (ret < 0) 555 goto hdac_bus_unmap; 556 557 /* DSP base */ 558 #if IS_ENABLED(CONFIG_PCI) 559 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR); 560 #endif 561 if (!sdev->bar[HDA_DSP_BAR]) { 562 dev_err(sdev->dev, "error: ioremap error\n"); 563 ret = -ENXIO; 564 goto hdac_bus_unmap; 565 } 566 567 sdev->mmio_bar = HDA_DSP_BAR; 568 sdev->mailbox_bar = HDA_DSP_BAR; 569 570 /* allow 64bit DMA address if supported by H/W */ 571 if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) { 572 dev_dbg(sdev->dev, "DMA mask is 64 bit\n"); 573 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64)); 574 } else { 575 dev_dbg(sdev->dev, "DMA mask is 32 bit\n"); 576 dma_set_mask(&pci->dev, DMA_BIT_MASK(32)); 577 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)); 578 } 579 580 /* init streams */ 581 ret = hda_dsp_stream_init(sdev); 582 if (ret < 0) { 583 dev_err(sdev->dev, "error: failed to init streams\n"); 584 /* 585 * not all errors are due to memory issues, but trying 586 * to free everything does not harm 587 */ 588 goto free_streams; 589 } 590 591 /* 592 * register our IRQ 593 * let's try to enable msi firstly 594 * if it fails, use legacy interrupt mode 595 * TODO: support msi multiple vectors 596 */ 597 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) { 598 dev_info(sdev->dev, "use msi interrupt mode\n"); 599 hdev->irq = pci_irq_vector(pci, 0); 600 /* ipc irq number is the same of hda irq */ 601 sdev->ipc_irq = hdev->irq; 602 /* initialised to "false" by kzalloc() */ 603 sdev->msi_enabled = true; 604 } 605 606 if (!sdev->msi_enabled) { 607 dev_info(sdev->dev, "use legacy interrupt mode\n"); 608 /* 609 * in IO-APIC mode, hda->irq and ipc_irq are using the same 610 * irq number of pci->irq 611 */ 612 hdev->irq = pci->irq; 613 sdev->ipc_irq = pci->irq; 614 } 615 616 dev_dbg(sdev->dev, "using HDA IRQ %d\n", hdev->irq); 617 ret = request_threaded_irq(hdev->irq, hda_dsp_stream_interrupt, 618 hda_dsp_stream_threaded_handler, 619 IRQF_SHARED, "AudioHDA", bus); 620 if (ret < 0) { 621 dev_err(sdev->dev, "error: failed to register HDA IRQ %d\n", 622 hdev->irq); 623 goto free_irq_vector; 624 } 625 626 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq); 627 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_ipc_irq_handler, 628 sof_ops(sdev)->irq_thread, IRQF_SHARED, 629 "AudioDSP", sdev); 630 if (ret < 0) { 631 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n", 632 sdev->ipc_irq); 633 goto free_hda_irq; 634 } 635 636 pci_set_master(pci); 637 synchronize_irq(pci->irq); 638 639 /* 640 * clear TCSEL to clear playback on some HD Audio 641 * codecs. PCI TCSEL is defined in the Intel manuals. 642 */ 643 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); 644 645 /* init HDA capabilities */ 646 ret = hda_init_caps(sdev); 647 if (ret < 0) 648 goto free_ipc_irq; 649 650 /* enable ppcap interrupt */ 651 hda_dsp_ctrl_ppcap_enable(sdev, true); 652 hda_dsp_ctrl_ppcap_int_enable(sdev, true); 653 654 /* initialize waitq for code loading */ 655 init_waitqueue_head(&sdev->waitq); 656 657 /* set default mailbox offset for FW ready message */ 658 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET; 659 660 return 0; 661 662 free_ipc_irq: 663 free_irq(sdev->ipc_irq, sdev); 664 free_hda_irq: 665 free_irq(hdev->irq, bus); 666 free_irq_vector: 667 if (sdev->msi_enabled) 668 pci_free_irq_vectors(pci); 669 free_streams: 670 hda_dsp_stream_free(sdev); 671 /* dsp_unmap: not currently used */ 672 iounmap(sdev->bar[HDA_DSP_BAR]); 673 hdac_bus_unmap: 674 iounmap(bus->remap_addr); 675 err: 676 return ret; 677 } 678 679 int hda_dsp_remove(struct snd_sof_dev *sdev) 680 { 681 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 682 struct hdac_bus *bus = sof_to_bus(sdev); 683 struct pci_dev *pci = to_pci_dev(sdev->dev); 684 const struct sof_intel_dsp_desc *chip = hda->desc; 685 686 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 687 /* codec removal, invoke bus_device_remove */ 688 snd_hdac_ext_bus_device_remove(bus); 689 #endif 690 691 if (!IS_ERR_OR_NULL(hda->dmic_dev)) 692 platform_device_unregister(hda->dmic_dev); 693 694 /* disable DSP IRQ */ 695 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 696 SOF_HDA_PPCTL_PIE, 0); 697 698 /* disable CIE and GIE interrupts */ 699 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 700 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0); 701 702 /* disable cores */ 703 if (chip) 704 hda_dsp_core_reset_power_down(sdev, chip->cores_mask); 705 706 /* disable DSP */ 707 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 708 SOF_HDA_PPCTL_GPROCEN, 0); 709 710 free_irq(sdev->ipc_irq, sdev); 711 free_irq(hda->irq, bus); 712 if (sdev->msi_enabled) 713 pci_free_irq_vectors(pci); 714 715 hda_dsp_stream_free(sdev); 716 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 717 snd_hdac_link_free_all(bus); 718 #endif 719 720 iounmap(sdev->bar[HDA_DSP_BAR]); 721 iounmap(bus->remap_addr); 722 723 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 724 snd_hdac_ext_bus_exit(bus); 725 #endif 726 hda_codec_i915_exit(sdev); 727 728 return 0; 729 } 730 731 MODULE_LICENSE("Dual BSD/GPL"); 732