1perf-intel-pt(1) 2================ 3 4NAME 5---- 6perf-intel-pt - Support for Intel Processor Trace within perf tools 7 8SYNOPSIS 9-------- 10[verse] 11'perf record' -e intel_pt// 12 13DESCRIPTION 14----------- 15 16Intel Processor Trace (Intel PT) is an extension of Intel Architecture that 17collects information about software execution such as control flow, execution 18modes and timings and formats it into highly compressed binary packets. 19Technical details are documented in the Intel 64 and IA-32 Architectures 20Software Developer Manuals, Chapter 36 Intel Processor Trace. 21 22Intel PT is first supported in Intel Core M and 5th generation Intel Core 23processors that are based on the Intel micro-architecture code name Broadwell. 24 25Trace data is collected by 'perf record' and stored within the perf.data file. 26See below for options to 'perf record'. 27 28Trace data must be 'decoded' which involves walking the object code and matching 29the trace data packets. For example a TNT packet only tells whether a 30conditional branch was taken or not taken, so to make use of that packet the 31decoder must know precisely which instruction was being executed. 32 33Decoding is done on-the-fly. The decoder outputs samples in the same format as 34samples output by perf hardware events, for example as though the "instructions" 35or "branches" events had been recorded. Presently 3 tools support this: 36'perf script', 'perf report' and 'perf inject'. See below for more information 37on using those tools. 38 39The main distinguishing feature of Intel PT is that the decoder can determine 40the exact flow of software execution. Intel PT can be used to understand why 41and how did software get to a certain point, or behave a certain way. The 42software does not have to be recompiled, so Intel PT works with debug or release 43builds, however the executed images are needed - which makes use in JIT-compiled 44environments, or with self-modified code, a challenge. Also symbols need to be 45provided to make sense of addresses. 46 47A limitation of Intel PT is that it produces huge amounts of trace data 48(hundreds of megabytes per second per core) which takes a long time to decode, 49for example two or three orders of magnitude longer than it took to collect. 50Another limitation is the performance impact of tracing, something that will 51vary depending on the use-case and architecture. 52 53 54Quickstart 55---------- 56 57It is important to start small. That is because it is easy to capture vastly 58more data than can possibly be processed. 59 60The simplest thing to do with Intel PT is userspace profiling of small programs. 61Data is captured with 'perf record' e.g. to trace 'ls' userspace-only: 62 63 perf record -e intel_pt//u ls 64 65And profiled with 'perf report' e.g. 66 67 perf report 68 69To also trace kernel space presents a problem, namely kernel self-modifying 70code. A fairly good kernel image is available in /proc/kcore but to get an 71accurate image a copy of /proc/kcore needs to be made under the same conditions 72as the data capture. 'perf record' can make a copy of /proc/kcore if the option 73--kcore is used, but access to /proc/kcore is restricted e.g. 74 75 sudo perf record -o pt_ls --kcore -e intel_pt// -- ls 76 77which will create a directory named 'pt_ls' and put the perf.data file (named 78simply 'data') and copies of /proc/kcore, /proc/kallsyms and /proc/modules into 79it. The other tools understand the directory format, so to use 'perf report' 80becomes: 81 82 sudo perf report -i pt_ls 83 84Because samples are synthesized after-the-fact, the sampling period can be 85selected for reporting. e.g. sample every microsecond 86 87 sudo perf report pt_ls --itrace=i1usge 88 89See the sections below for more information about the --itrace option. 90 91Beware the smaller the period, the more samples that are produced, and the 92longer it takes to process them. 93 94Also note that the coarseness of Intel PT timing information will start to 95distort the statistical value of the sampling as the sampling period becomes 96smaller. 97 98To represent software control flow, "branches" samples are produced. By default 99a branch sample is synthesized for every single branch. To get an idea what 100data is available you can use the 'perf script' tool with all itrace sampling 101options, which will list all the samples. 102 103 perf record -e intel_pt//u ls 104 perf script --itrace=ibxwpe 105 106An interesting field that is not printed by default is 'flags' which can be 107displayed as follows: 108 109 perf script --itrace=ibxwpe -F+flags 110 111The flags are "bcrosyiABExghDt" which stand for branch, call, return, conditional, 112system, asynchronous, interrupt, transaction abort, trace begin, trace end, 113in transaction, VM-entry, VM-exit, interrupt disabled, and interrupt disable 114toggle respectively. 115 116perf script also supports higher level ways to dump instruction traces: 117 118 perf script --insn-trace --xed 119 120Dump all instructions. This requires installing the xed tool (see XED below) 121Dumping all instructions in a long trace can be fairly slow. It is usually better 122to start with higher level decoding, like 123 124 perf script --call-trace 125 126or 127 128 perf script --call-ret-trace 129 130and then select a time range of interest. The time range can then be examined 131in detail with 132 133 perf script --time starttime,stoptime --insn-trace --xed 134 135While examining the trace it's also useful to filter on specific CPUs using 136the -C option 137 138 perf script --time starttime,stoptime --insn-trace --xed -C 1 139 140Dump all instructions in time range on CPU 1. 141 142Another interesting field that is not printed by default is 'ipc' which can be 143displayed as follows: 144 145 perf script --itrace=be -F+ipc 146 147There are two ways that instructions-per-cycle (IPC) can be calculated depending 148on the recording. 149 150If the 'cyc' config term (see config terms section below) was used, then IPC is 151calculated using the cycle count from CYC packets, otherwise MTC packets are 152used - refer to the 'mtc' config term. When MTC is used, however, the values 153are less accurate because the timing is less accurate. 154 155Because Intel PT does not update the cycle count on every branch or instruction, 156the values will often be zero. When there are values, they will be the number 157of instructions and number of cycles since the last update, and thus represent 158the average IPC since the last IPC for that event type. Note IPC for "branches" 159events is calculated separately from IPC for "instructions" events. 160 161Even with the 'cyc' config term, it is possible to produce IPC information for 162every change of timestamp, but at the expense of accuracy. That is selected by 163specifying the itrace 'A' option. Due to the granularity of timestamps, the 164actual number of cycles increases even though the cycles reported does not. 165The number of instructions is known, but if IPC is reported, cycles can be too 166low and so IPC is too high. Note that inaccuracy decreases as the period of 167sampling increases i.e. if the number of cycles is too low by a small amount, 168that becomes less significant if the number of cycles is large. It may also be 169useful to use the 'A' option in conjunction with dlfilter-show-cycles.so to 170provide higher granularity cycle information. 171 172Also note that the IPC instruction count may or may not include the current 173instruction. If the cycle count is associated with an asynchronous branch 174(e.g. page fault or interrupt), then the instruction count does not include the 175current instruction, otherwise it does. That is consistent with whether or not 176that instruction has retired when the cycle count is updated. 177 178Another note, in the case of "branches" events, non-taken branches are not 179presently sampled, so IPC values for them do not appear e.g. a CYC packet with a 180TNT packet that starts with a non-taken branch. To see every possible IPC 181value, "instructions" events can be used e.g. --itrace=i0ns 182 183While it is possible to create scripts to analyze the data, an alternative 184approach is available to export the data to a sqlite or postgresql database. 185Refer to script export-to-sqlite.py or export-to-postgresql.py for more details, 186and to script exported-sql-viewer.py for an example of using the database. 187 188There is also script intel-pt-events.py which provides an example of how to 189unpack the raw data for power events and PTWRITE. The script also displays 190branches, and supports 2 additional modes selected by option: 191 192 --insn-trace - instruction trace 193 --src-trace - source trace 194 195As mentioned above, it is easy to capture too much data. One way to limit the 196data captured is to use 'snapshot' mode which is explained further below. 197Refer to 'new snapshot option' and 'Intel PT modes of operation' further below. 198 199Another problem that will be experienced is decoder errors. They can be caused 200by inability to access the executed image, self-modified or JIT-ed code, or the 201inability to match side-band information (such as context switches and mmaps) 202which results in the decoder not knowing what code was executed. 203 204There is also the problem of perf not being able to copy the data fast enough, 205resulting in data lost because the buffer was full. See 'Buffer handling' below 206for more details. 207 208 209perf record 210----------- 211 212new event 213~~~~~~~~~ 214 215The Intel PT kernel driver creates a new PMU for Intel PT. PMU events are 216selected by providing the PMU name followed by the "config" separated by slashes. 217An enhancement has been made to allow default "config" e.g. the option 218 219 -e intel_pt// 220 221will use a default config value. Currently that is the same as 222 223 -e intel_pt/tsc,noretcomp=0/ 224 225which is the same as 226 227 -e intel_pt/tsc=1,noretcomp=0/ 228 229Note there are now new config terms - see section 'config terms' further below. 230 231The config terms are listed in /sys/devices/intel_pt/format. They are bit 232fields within the config member of the struct perf_event_attr which is 233passed to the kernel by the perf_event_open system call. They correspond to bit 234fields in the IA32_RTIT_CTL MSR. Here is a list of them and their definitions: 235 236 $ grep -H . /sys/bus/event_source/devices/intel_pt/format/* 237 /sys/bus/event_source/devices/intel_pt/format/cyc:config:1 238 /sys/bus/event_source/devices/intel_pt/format/cyc_thresh:config:19-22 239 /sys/bus/event_source/devices/intel_pt/format/mtc:config:9 240 /sys/bus/event_source/devices/intel_pt/format/mtc_period:config:14-17 241 /sys/bus/event_source/devices/intel_pt/format/noretcomp:config:11 242 /sys/bus/event_source/devices/intel_pt/format/psb_period:config:24-27 243 /sys/bus/event_source/devices/intel_pt/format/tsc:config:10 244 245Note that the default config must be overridden for each term i.e. 246 247 -e intel_pt/noretcomp=0/ 248 249is the same as: 250 251 -e intel_pt/tsc=1,noretcomp=0/ 252 253So, to disable TSC packets use: 254 255 -e intel_pt/tsc=0/ 256 257It is also possible to specify the config value explicitly: 258 259 -e intel_pt/config=0x400/ 260 261Note that, as with all events, the event is suffixed with event modifiers: 262 263 u userspace 264 k kernel 265 h hypervisor 266 G guest 267 H host 268 p precise ip 269 270'h', 'G' and 'H' are for virtualization which is not supported by Intel PT. 271'p' is also not relevant to Intel PT. So only options 'u' and 'k' are 272meaningful for Intel PT. 273 274perf_event_attr is displayed if the -vv option is used e.g. 275 276 ------------------------------------------------------------ 277 perf_event_attr: 278 type 6 279 size 112 280 config 0x400 281 { sample_period, sample_freq } 1 282 sample_type IP|TID|TIME|CPU|IDENTIFIER 283 read_format ID 284 disabled 1 285 inherit 1 286 exclude_kernel 1 287 exclude_hv 1 288 enable_on_exec 1 289 sample_id_all 1 290 ------------------------------------------------------------ 291 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 292 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 293 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 294 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 295 ------------------------------------------------------------ 296 297 298config terms 299~~~~~~~~~~~~ 300 301The June 2015 version of Intel 64 and IA-32 Architectures Software Developer 302Manuals, Chapter 36 Intel Processor Trace, defined new Intel PT features. 303Some of the features are reflect in new config terms. All the config terms are 304described below. 305 306tsc Always supported. Produces TSC timestamp packets to provide 307 timing information. In some cases it is possible to decode 308 without timing information, for example a per-thread context 309 that does not overlap executable memory maps. 310 311 The default config selects tsc (i.e. tsc=1). 312 313noretcomp Always supported. Disables "return compression" so a TIP packet 314 is produced when a function returns. Causes more packets to be 315 produced but might make decoding more reliable. 316 317 The default config does not select noretcomp (i.e. noretcomp=0). 318 319psb_period Allows the frequency of PSB packets to be specified. 320 321 The PSB packet is a synchronization packet that provides a 322 starting point for decoding or recovery from errors. 323 324 Support for psb_period is indicated by: 325 326 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc 327 328 which contains "1" if the feature is supported and "0" 329 otherwise. 330 331 Valid values are given by: 332 333 /sys/bus/event_source/devices/intel_pt/caps/psb_periods 334 335 which contains a hexadecimal value, the bits of which represent 336 valid values e.g. bit 2 set means value 2 is valid. 337 338 The psb_period value is converted to the approximate number of 339 trace bytes between PSB packets as: 340 341 2 ^ (value + 11) 342 343 e.g. value 3 means 16KiB bytes between PSBs 344 345 If an invalid value is entered, the error message 346 will give a list of valid values e.g. 347 348 $ perf record -e intel_pt/psb_period=15/u uname 349 Invalid psb_period for intel_pt. Valid values are: 0-5 350 351 If MTC packets are selected, the default config selects a value 352 of 3 (i.e. psb_period=3) or the nearest lower value that is 353 supported (0 is always supported). Otherwise the default is 0. 354 355 If decoding is expected to be reliable and the buffer is large 356 then a large PSB period can be used. 357 358 Because a TSC packet is produced with PSB, the PSB period can 359 also affect the granularity to timing information in the absence 360 of MTC or CYC. 361 362mtc Produces MTC timing packets. 363 364 MTC packets provide finer grain timestamp information than TSC 365 packets. MTC packets record time using the hardware crystal 366 clock (CTC) which is related to TSC packets using a TMA packet. 367 368 Support for this feature is indicated by: 369 370 /sys/bus/event_source/devices/intel_pt/caps/mtc 371 372 which contains "1" if the feature is supported and 373 "0" otherwise. 374 375 The frequency of MTC packets can also be specified - see 376 mtc_period below. 377 378mtc_period Specifies how frequently MTC packets are produced - see mtc 379 above for how to determine if MTC packets are supported. 380 381 Valid values are given by: 382 383 /sys/bus/event_source/devices/intel_pt/caps/mtc_periods 384 385 which contains a hexadecimal value, the bits of which represent 386 valid values e.g. bit 2 set means value 2 is valid. 387 388 The mtc_period value is converted to the MTC frequency as: 389 390 CTC-frequency / (2 ^ value) 391 392 e.g. value 3 means one eighth of CTC-frequency 393 394 Where CTC is the hardware crystal clock, the frequency of which 395 can be related to TSC via values provided in cpuid leaf 0x15. 396 397 If an invalid value is entered, the error message 398 will give a list of valid values e.g. 399 400 $ perf record -e intel_pt/mtc_period=15/u uname 401 Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9 402 403 The default value is 3 or the nearest lower value 404 that is supported (0 is always supported). 405 406cyc Produces CYC timing packets. 407 408 CYC packets provide even finer grain timestamp information than 409 MTC and TSC packets. A CYC packet contains the number of CPU 410 cycles since the last CYC packet. Unlike MTC and TSC packets, 411 CYC packets are only sent when another packet is also sent. 412 413 Support for this feature is indicated by: 414 415 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc 416 417 which contains "1" if the feature is supported and 418 "0" otherwise. 419 420 The number of CYC packets produced can be reduced by specifying 421 a threshold - see cyc_thresh below. 422 423cyc_thresh Specifies how frequently CYC packets are produced - see cyc 424 above for how to determine if CYC packets are supported. 425 426 Valid cyc_thresh values are given by: 427 428 /sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds 429 430 which contains a hexadecimal value, the bits of which represent 431 valid values e.g. bit 2 set means value 2 is valid. 432 433 The cyc_thresh value represents the minimum number of CPU cycles 434 that must have passed before a CYC packet can be sent. The 435 number of CPU cycles is: 436 437 2 ^ (value - 1) 438 439 e.g. value 4 means 8 CPU cycles must pass before a CYC packet 440 can be sent. Note a CYC packet is still only sent when another 441 packet is sent, not at, e.g. every 8 CPU cycles. 442 443 If an invalid value is entered, the error message 444 will give a list of valid values e.g. 445 446 $ perf record -e intel_pt/cyc,cyc_thresh=15/u uname 447 Invalid cyc_thresh for intel_pt. Valid values are: 0-12 448 449 CYC packets are not requested by default. 450 451pt Specifies pass-through which enables the 'branch' config term. 452 453 The default config selects 'pt' if it is available, so a user will 454 never need to specify this term. 455 456branch Enable branch tracing. Branch tracing is enabled by default so to 457 disable branch tracing use 'branch=0'. 458 459 The default config selects 'branch' if it is available. 460 461ptw Enable PTWRITE packets which are produced when a ptwrite instruction 462 is executed. 463 464 Support for this feature is indicated by: 465 466 /sys/bus/event_source/devices/intel_pt/caps/ptwrite 467 468 which contains "1" if the feature is supported and 469 "0" otherwise. 470 471 As an alternative, refer to "Emulated PTWRITE" further below. 472 473fup_on_ptw Enable a FUP packet to follow the PTWRITE packet. The FUP packet 474 provides the address of the ptwrite instruction. In the absence of 475 fup_on_ptw, the decoder will use the address of the previous branch 476 if branch tracing is enabled, otherwise the address will be zero. 477 Note that fup_on_ptw will work even when branch tracing is disabled. 478 479pwr_evt Enable power events. The power events provide information about 480 changes to the CPU C-state. 481 482 Support for this feature is indicated by: 483 484 /sys/bus/event_source/devices/intel_pt/caps/power_event_trace 485 486 which contains "1" if the feature is supported and 487 "0" otherwise. 488 489event Enable Event Trace. The events provide information about asynchronous 490 events. 491 492 Support for this feature is indicated by: 493 494 /sys/bus/event_source/devices/intel_pt/caps/event_trace 495 496 which contains "1" if the feature is supported and 497 "0" otherwise. 498 499notnt Disable TNT packets. Without TNT packets, it is not possible to walk 500 executable code to reconstruct control flow, however FUP, TIP, TIP.PGE 501 and TIP.PGD packets still indicate asynchronous control flow, and (if 502 return compression is disabled - see noretcomp) return statements. 503 The advantage of eliminating TNT packets is reducing the size of the 504 trace and corresponding tracing overhead. 505 506 Support for this feature is indicated by: 507 508 /sys/bus/event_source/devices/intel_pt/caps/tnt_disable 509 510 which contains "1" if the feature is supported and 511 "0" otherwise. 512 513 514AUX area sampling option 515~~~~~~~~~~~~~~~~~~~~~~~~ 516 517To select Intel PT "sampling" the AUX area sampling option can be used: 518 519 --aux-sample 520 521Optionally it can be followed by the sample size in bytes e.g. 522 523 --aux-sample=8192 524 525In addition, the Intel PT event to sample must be defined e.g. 526 527 -e intel_pt//u 528 529Samples on other events will be created containing Intel PT data e.g. the 530following will create Intel PT samples on the branch-misses event, note the 531events must be grouped using {}: 532 533 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' 534 535An alternative to '--aux-sample' is to add the config term 'aux-sample-size' to 536events. In this case, the grouping is implied e.g. 537 538 perf record -e intel_pt//u -e branch-misses/aux-sample-size=8192/u 539 540is the same as: 541 542 perf record -e '{intel_pt//u,branch-misses/aux-sample-size=8192/u}' 543 544but allows for also using an address filter e.g.: 545 546 perf record -e intel_pt//u --filter 'filter * @/bin/ls' -e branch-misses/aux-sample-size=8192/u -- ls 547 548It is important to select a sample size that is big enough to contain at least 549one PSB packet. If not a warning will be displayed: 550 551 Intel PT sample size (%zu) may be too small for PSB period (%zu) 552 553The calculation used for that is: if sample_size <= psb_period + 256 display the 554warning. When sampling is used, psb_period defaults to 0 (2KiB). 555 556The default sample size is 4KiB. 557 558The sample size is passed in aux_sample_size in struct perf_event_attr. The 559sample size is limited by the maximum event size which is 64KiB. It is 560difficult to know how big the event might be without the trace sample attached, 561but the tool validates that the sample size is not greater than 60KiB. 562 563 564new snapshot option 565~~~~~~~~~~~~~~~~~~~ 566 567The difference between full trace and snapshot from the kernel's perspective is 568that in full trace we don't overwrite trace data that the user hasn't collected 569yet (and indicated that by advancing aux_tail), whereas in snapshot mode we let 570the trace run and overwrite older data in the buffer so that whenever something 571interesting happens, we can stop it and grab a snapshot of what was going on 572around that interesting moment. 573 574To select snapshot mode a new option has been added: 575 576 -S 577 578Optionally it can be followed by the snapshot size e.g. 579 580 -S0x100000 581 582The default snapshot size is the auxtrace mmap size. If neither auxtrace mmap size 583nor snapshot size is specified, then the default is 4MiB for privileged users 584(or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users. 585If an unprivileged user does not specify mmap pages, the mmap pages will be 586reduced as described in the 'new auxtrace mmap size option' section below. 587 588The snapshot size is displayed if the option -vv is used e.g. 589 590 Intel PT snapshot size: %zu 591 592 593new auxtrace mmap size option 594~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 595 596Intel PT buffer size is specified by an addition to the -m option e.g. 597 598 -m,16 599 600selects a buffer size of 16 pages i.e. 64KiB. 601 602Note that the existing functionality of -m is unchanged. The auxtrace mmap size 603is specified by the optional addition of a comma and the value. 604 605The default auxtrace mmap size for Intel PT is 4MiB/page_size for privileged users 606(or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users. 607If an unprivileged user does not specify mmap pages, the mmap pages will be 608reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the 609user is likely to get an error as they exceed their mlock limit (Max locked 610memory as shown in /proc/self/limits). Note that perf does not count the first 611512KiB (actually /proc/sys/kernel/perf_event_mlock_kb minus 1 page) per cpu 612against the mlock limit so an unprivileged user is allowed 512KiB per cpu plus 613their mlock limit (which defaults to 64KiB but is not multiplied by the number 614of cpus). 615 616In full-trace mode, powers of two are allowed for buffer size, with a minimum 617size of 2 pages. In snapshot mode or sampling mode, it is the same but the 618minimum size is 1 page. 619 620The mmap size and auxtrace mmap size are displayed if the -vv option is used e.g. 621 622 mmap length 528384 623 auxtrace mmap length 4198400 624 625 626Intel PT modes of operation 627~~~~~~~~~~~~~~~~~~~~~~~~~~~ 628 629Intel PT can be used in 3 modes: 630 full-trace mode 631 sample mode 632 snapshot mode 633 634Full-trace mode traces continuously e.g. 635 636 perf record -e intel_pt//u uname 637 638Sample mode attaches a Intel PT sample to other events e.g. 639 640 perf record --aux-sample -e intel_pt//u -e branch-misses:u 641 642Snapshot mode captures the available data when a signal is sent or "snapshot" 643control command is issued. e.g. using a signal 644 645 perf record -v -e intel_pt//u -S ./loopy 1000000000 & 646 [1] 11435 647 kill -USR2 11435 648 Recording AUX area tracing snapshot 649 650Note that the signal sent is SIGUSR2. 651Note that "Recording AUX area tracing snapshot" is displayed because the -v 652option is used. 653 654The advantage of using "snapshot" control command is that the access is 655controlled by access to a FIFO e.g. 656 657 $ mkfifo perf.control 658 $ mkfifo perf.ack 659 $ cat perf.ack & 660 [1] 15235 661 $ sudo ~/bin/perf record --control fifo:perf.control,perf.ack -S -e intel_pt//u -- sleep 60 & 662 [2] 15243 663 $ ps -e | grep perf 664 15244 pts/1 00:00:00 perf 665 $ kill -USR2 15244 666 bash: kill: (15244) - Operation not permitted 667 $ echo snapshot > perf.control 668 ack 669 670The 3 Intel PT modes of operation cannot be used together. 671 672 673Buffer handling 674~~~~~~~~~~~~~~~ 675 676There may be buffer limitations (i.e. single ToPa entry) which means that actual 677buffer sizes are limited to powers of 2 up to 4MiB (MAX_ORDER). In order to 678provide other sizes, and in particular an arbitrarily large size, multiple 679buffers are logically concatenated. However an interrupt must be used to switch 680between buffers. That has two potential problems: 681 a) the interrupt may not be handled in time so that the current buffer 682 becomes full and some trace data is lost. 683 b) the interrupts may slow the system and affect the performance 684 results. 685 686If trace data is lost, the driver sets 'truncated' in the PERF_RECORD_AUX event 687which the tools report as an error. 688 689In full-trace mode, the driver waits for data to be copied out before allowing 690the (logical) buffer to wrap-around. If data is not copied out quickly enough, 691again 'truncated' is set in the PERF_RECORD_AUX event. If the driver has to 692wait, the intel_pt event gets disabled. Because it is difficult to know when 693that happens, perf tools always re-enable the intel_pt event after copying out 694data. 695 696 697Intel PT and build ids 698~~~~~~~~~~~~~~~~~~~~~~ 699 700By default "perf record" post-processes the event stream to find all build ids 701for executables for all addresses sampled. Deliberately, Intel PT is not 702decoded for that purpose (it would take too long). Instead the build ids for 703all executables encountered (due to mmap, comm or task events) are included 704in the perf.data file. 705 706To see buildids included in the perf.data file use the command: 707 708 perf buildid-list 709 710If the perf.data file contains Intel PT data, that is the same as: 711 712 perf buildid-list --with-hits 713 714 715Snapshot mode and event disabling 716~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 717 718In order to make a snapshot, the intel_pt event is disabled using an IOCTL, 719namely PERF_EVENT_IOC_DISABLE. However doing that can also disable the 720collection of side-band information. In order to prevent that, a dummy 721software event has been introduced that permits tracking events (like mmaps) to 722continue to be recorded while intel_pt is disabled. That is important to ensure 723there is complete side-band information to allow the decoding of subsequent 724snapshots. 725 726A test has been created for that. To find the test: 727 728 perf test list 729 ... 730 23: Test using a dummy software event to keep tracking 731 732To run the test: 733 734 perf test 23 735 23: Test using a dummy software event to keep tracking : Ok 736 737 738perf record modes (nothing new here) 739~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 740 741perf record essentially operates in one of three modes: 742 per thread 743 per cpu 744 workload only 745 746"per thread" mode is selected by -t or by --per-thread (with -p or -u or just a 747workload). 748"per cpu" is selected by -C or -a. 749"workload only" mode is selected by not using the other options but providing a 750command to run (i.e. the workload). 751 752In per-thread mode an exact list of threads is traced. There is no inheritance. 753Each thread has its own event buffer. 754 755In per-cpu mode all processes (or processes from the selected cgroup i.e. -G 756option, or processes selected with -p or -u) are traced. Each cpu has its own 757buffer. Inheritance is allowed. 758 759In workload-only mode, the workload is traced but with per-cpu buffers. 760Inheritance is allowed. Note that you can now trace a workload in per-thread 761mode by using the --per-thread option. 762 763 764Privileged vs non-privileged users 765~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 766 767Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users 768have memory limits imposed upon them. That affects what buffer sizes they can 769have as outlined above. 770 771The v4.2 kernel introduced support for a context switch metadata event, 772PERF_RECORD_SWITCH, which allows unprivileged users to see when their processes 773are scheduled out and in, just not by whom, which is left for the 774PERF_RECORD_SWITCH_CPU_WIDE, that is only accessible in system wide context, 775which in turn requires CAP_PERFMON or CAP_SYS_ADMIN. 776 777Please see the 45ac1403f564 ("perf: Add PERF_RECORD_SWITCH to indicate context 778switches") commit, that introduces these metadata events for further info. 779 780When working with kernels < v4.2, the following considerations must be taken, 781as the sched:sched_switch tracepoints will be used to receive such information: 782 783Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users are 784not permitted to use tracepoints which means there is insufficient side-band 785information to decode Intel PT in per-cpu mode, and potentially workload-only 786mode too if the workload creates new processes. 787 788Note also, that to use tracepoints, read-access to debugfs is required. So if 789debugfs is not mounted or the user does not have read-access, it will again not 790be possible to decode Intel PT in per-cpu mode. 791 792 793sched_switch tracepoint 794~~~~~~~~~~~~~~~~~~~~~~~ 795 796The sched_switch tracepoint is used to provide side-band data for Intel PT 797decoding in kernels where the PERF_RECORD_SWITCH metadata event isn't 798available. 799 800The sched_switch events are automatically added. e.g. the second event shown 801below: 802 803 $ perf record -vv -e intel_pt//u uname 804 ------------------------------------------------------------ 805 perf_event_attr: 806 type 6 807 size 112 808 config 0x400 809 { sample_period, sample_freq } 1 810 sample_type IP|TID|TIME|CPU|IDENTIFIER 811 read_format ID 812 disabled 1 813 inherit 1 814 exclude_kernel 1 815 exclude_hv 1 816 enable_on_exec 1 817 sample_id_all 1 818 ------------------------------------------------------------ 819 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 820 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 821 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 822 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 823 ------------------------------------------------------------ 824 perf_event_attr: 825 type 2 826 size 112 827 config 0x108 828 { sample_period, sample_freq } 1 829 sample_type IP|TID|TIME|CPU|PERIOD|RAW|IDENTIFIER 830 read_format ID 831 inherit 1 832 sample_id_all 1 833 exclude_guest 1 834 ------------------------------------------------------------ 835 sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8 836 sys_perf_event_open: pid -1 cpu 1 group_fd -1 flags 0x8 837 sys_perf_event_open: pid -1 cpu 2 group_fd -1 flags 0x8 838 sys_perf_event_open: pid -1 cpu 3 group_fd -1 flags 0x8 839 ------------------------------------------------------------ 840 perf_event_attr: 841 type 1 842 size 112 843 config 0x9 844 { sample_period, sample_freq } 1 845 sample_type IP|TID|TIME|IDENTIFIER 846 read_format ID 847 disabled 1 848 inherit 1 849 exclude_kernel 1 850 exclude_hv 1 851 mmap 1 852 comm 1 853 enable_on_exec 1 854 task 1 855 sample_id_all 1 856 mmap2 1 857 comm_exec 1 858 ------------------------------------------------------------ 859 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8 860 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8 861 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8 862 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8 863 mmap size 528384B 864 AUX area mmap length 4194304 865 perf event ring buffer mmapped per cpu 866 Synthesizing auxtrace information 867 Linux 868 [ perf record: Woken up 1 times to write data ] 869 [ perf record: Captured and wrote 0.042 MB perf.data ] 870 871Note, the sched_switch event is only added if the user is permitted to use it 872and only in per-cpu mode. 873 874Note also, the sched_switch event is only added if TSC packets are requested. 875That is because, in the absence of timing information, the sched_switch events 876cannot be matched against the Intel PT trace. 877 878 879perf script 880----------- 881 882By default, perf script will decode trace data found in the perf.data file. 883This can be further controlled by new option --itrace. 884 885 886New --itrace option 887~~~~~~~~~~~~~~~~~~~ 888 889Having no option is the same as 890 891 --itrace 892 893which, in turn, is the same as 894 895 --itrace=cepwx 896 897The letters are: 898 899 i synthesize "instructions" events 900 b synthesize "branches" events 901 x synthesize "transactions" events 902 w synthesize "ptwrite" events 903 p synthesize "power" events (incl. PSB events) 904 c synthesize branches events (calls only) 905 r synthesize branches events (returns only) 906 o synthesize PEBS-via-PT events 907 I synthesize Event Trace events 908 e synthesize tracing error events 909 d create a debug log 910 g synthesize a call chain (use with i or x) 911 G synthesize a call chain on existing event records 912 l synthesize last branch entries (use with i or x) 913 L synthesize last branch entries on existing event records 914 s skip initial number of events 915 q quicker (less detailed) decoding 916 A approximate IPC 917 Z prefer to ignore timestamps (so-called "timeless" decoding) 918 919"Instructions" events look like they were recorded by "perf record -e 920instructions". 921 922"Branches" events look like they were recorded by "perf record -e branches". "c" 923and "r" can be combined to get calls and returns. 924 925"Transactions" events correspond to the start or end of transactions. The 926'flags' field can be used in perf script to determine whether the event is a 927transaction start, commit or abort. 928 929Note that "instructions", "branches" and "transactions" events depend on code 930flow packets which can be disabled by using the config term "branch=0". Refer 931to the config terms section above. 932 933"ptwrite" events record the payload of the ptwrite instruction and whether 934"fup_on_ptw" was used. "ptwrite" events depend on PTWRITE packets which are 935recorded only if the "ptw" config term was used. Refer to the config terms 936section above. perf script "synth" field displays "ptwrite" information like 937this: "ip: 0 payload: 0x123456789abcdef0" where "ip" is 1 if "fup_on_ptw" was 938used. 939 940"Power" events correspond to power event packets and CBR (core-to-bus ratio) 941packets. While CBR packets are always recorded when tracing is enabled, power 942event packets are recorded only if the "pwr_evt" config term was used. Refer to 943the config terms section above. The power events record information about 944C-state changes, whereas CBR is indicative of CPU frequency. perf script 945"event,synth" fields display information like this: 946 cbr: cbr: 22 freq: 2189 MHz (200%) 947 mwait: hints: 0x60 extensions: 0x1 948 pwre: hw: 0 cstate: 2 sub-cstate: 0 949 exstop: ip: 1 950 pwrx: deepest cstate: 2 last cstate: 2 wake reason: 0x4 951Where: 952 "cbr" includes the frequency and the percentage of maximum non-turbo 953 "mwait" shows mwait hints and extensions 954 "pwre" shows C-state transitions (to a C-state deeper than C0) and 955 whether initiated by hardware 956 "exstop" indicates execution stopped and whether the IP was recorded 957 exactly, 958 "pwrx" indicates return to C0 959For more details refer to the Intel 64 and IA-32 Architectures Software 960Developer Manuals. 961 962PSB events show when a PSB+ occurred and also the byte-offset in the trace. 963Emitting a PSB+ can cause a CPU a slight delay. When doing timing analysis 964of code with Intel PT, it is useful to know if a timing bubble was caused 965by Intel PT or not. 966 967Error events show where the decoder lost the trace. Error events 968are quite important. Users must know if what they are seeing is a complete 969picture or not. The "e" option may be followed by flags which affect what errors 970will or will not be reported. Each flag must be preceded by either '+' or '-'. 971The flags supported by Intel PT are: 972 -o Suppress overflow errors 973 -l Suppress trace data lost errors 974For example, for errors but not overflow or data lost errors: 975 976 --itrace=e-o-l 977 978The "d" option will cause the creation of a file "intel_pt.log" containing all 979decoded packets and instructions. Note that this option slows down the decoder 980and that the resulting file may be very large. The "d" option may be followed 981by flags which affect what debug messages will or will not be logged. Each flag 982must be preceded by either '+' or '-'. The flags support by Intel PT are: 983 -a Suppress logging of perf events 984 +a Log all perf events 985 +o Output to stdout instead of "intel_pt.log" 986By default, logged perf events are filtered by any specified time ranges, but 987flag +a overrides that. 988 989In addition, the period of the "instructions" event can be specified. e.g. 990 991 --itrace=i10us 992 993sets the period to 10us i.e. one instruction sample is synthesized for each 10 994microseconds of trace. Alternatives to "us" are "ms" (milliseconds), 995"ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions). 996 997"ms", "us" and "ns" are converted to TSC ticks. 998 999The timing information included with Intel PT does not give the time of every 1000instruction. Consequently, for the purpose of sampling, the decoder estimates 1001the time since the last timing packet based on 1 tick per instruction. The time 1002on the sample is *not* adjusted and reflects the last known value of TSC. 1003 1004For Intel PT, the default period is 100us. 1005 1006Setting it to a zero period means "as often as possible". 1007 1008In the case of Intel PT that is the same as a period of 1 and a unit of 1009'instructions' (i.e. --itrace=i1i). 1010 1011Also the call chain size (default 16, max. 1024) for instructions or 1012transactions events can be specified. e.g. 1013 1014 --itrace=ig32 1015 --itrace=xg32 1016 1017Also the number of last branch entries (default 64, max. 1024) for instructions or 1018transactions events can be specified. e.g. 1019 1020 --itrace=il10 1021 --itrace=xl10 1022 1023Note that last branch entries are cleared for each sample, so there is no overlap 1024from one sample to the next. 1025 1026The G and L options are designed in particular for sample mode, and work much 1027like g and l but add call chain and branch stack to the other selected events 1028instead of synthesized events. For example, to record branch-misses events for 1029'ls' and then add a call chain derived from the Intel PT trace: 1030 1031 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' -- ls 1032 perf report --itrace=Ge 1033 1034Although in fact G is a default for perf report, so that is the same as just: 1035 1036 perf report 1037 1038One caveat with the G and L options is that they work poorly with "Large PEBS". 1039Large PEBS means PEBS records will be accumulated by hardware and the written 1040into the event buffer in one go. That reduces interrupts, but can give very 1041late timestamps. Because the Intel PT trace is synchronized by timestamps, 1042the PEBS events do not match the trace. Currently, Large PEBS is used only in 1043certain circumstances: 1044 - hardware supports it 1045 - PEBS is used 1046 - event period is specified, instead of frequency 1047 - the sample type is limited to the following flags: 1048 PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR | 1049 PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID | 1050 PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER | 1051 PERF_SAMPLE_TRANSACTION | PERF_SAMPLE_PHYS_ADDR | 1052 PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER | 1053 PERF_SAMPLE_PERIOD (and sometimes) | PERF_SAMPLE_TIME 1054Because Intel PT sample mode uses a different sample type to the list above, 1055Large PEBS is not used with Intel PT sample mode. To avoid Large PEBS in other 1056cases, avoid specifying the event period i.e. avoid the 'perf record' -c option, 1057--count option, or 'period' config term. 1058 1059To disable trace decoding entirely, use the option --no-itrace. 1060 1061It is also possible to skip events generated (instructions, branches, transactions) 1062at the beginning. This is useful to ignore initialization code. 1063 1064 --itrace=i0nss1000000 1065 1066skips the first million instructions. 1067 1068The q option changes the way the trace is decoded. The decoding is much faster 1069but much less detailed. Specifically, with the q option, the decoder does not 1070decode TNT packets, and does not walk object code, but gets the ip from FUP and 1071TIP packets. The q option can be used with the b and i options but the period 1072is not used. The q option decodes more quickly, but is useful only if the 1073control flow of interest is represented or indicated by FUP, TIP, TIP.PGE, or 1074TIP.PGD packets (refer below). However the q option could be used to find time 1075ranges that could then be decoded fully using the --time option. 1076 1077What will *not* be decoded with the (single) q option: 1078 1079 - direct calls and jmps 1080 - conditional branches 1081 - non-branch instructions 1082 1083What *will* be decoded with the (single) q option: 1084 1085 - asynchronous branches such as interrupts 1086 - indirect branches 1087 - function return target address *if* the noretcomp config term (refer 1088 config terms section) was used 1089 - start of (control-flow) tracing 1090 - end of (control-flow) tracing, if it is not out of context 1091 - power events, ptwrite, transaction start and abort 1092 - instruction pointer associated with PSB packets 1093 1094Note the q option does not specify what events will be synthesized e.g. the p 1095option must be used also to show power events. 1096 1097Repeating the q option (double-q i.e. qq) results in even faster decoding and even 1098less detail. The decoder decodes only extended PSB (PSB+) packets, getting the 1099instruction pointer if there is a FUP packet within PSB+ (i.e. between PSB and 1100PSBEND). Note PSB packets occur regularly in the trace based on the psb_period 1101config term (refer config terms section). There will be a FUP packet if the 1102PSB+ occurs while control flow is being traced. 1103 1104What will *not* be decoded with the qq option: 1105 1106 - everything except instruction pointer associated with PSB packets 1107 1108What *will* be decoded with the qq option: 1109 1110 - instruction pointer associated with PSB packets 1111 1112The Z option is equivalent to having recorded a trace without TSC 1113(i.e. config term tsc=0). It can be useful to avoid timestamp issues when 1114decoding a trace of a virtual machine. 1115 1116 1117dlfilter-show-cycles.so 1118~~~~~~~~~~~~~~~~~~~~~~~ 1119 1120Cycles can be displayed using dlfilter-show-cycles.so in which case the itrace A 1121option can be useful to provide higher granularity cycle information: 1122 1123 perf script --itrace=A --call-trace --dlfilter dlfilter-show-cycles.so 1124 1125To see a list of dlfilters: 1126 1127 perf script -v --list-dlfilters 1128 1129See also linkperf:perf-dlfilters[1] 1130 1131 1132dump option 1133~~~~~~~~~~~ 1134 1135perf script has an option (-D) to "dump" the events i.e. display the binary 1136data. 1137 1138When -D is used, Intel PT packets are displayed. The packet decoder does not 1139pay attention to PSB packets, but just decodes the bytes - so the packets seen 1140by the actual decoder may not be identical in places where the data is corrupt. 1141One example of that would be when the buffer-switching interrupt has been too 1142slow, and the buffer has been filled completely. In that case, the last packet 1143in the buffer might be truncated and immediately followed by a PSB as the trace 1144continues in the next buffer. 1145 1146To disable the display of Intel PT packets, combine the -D option with 1147--no-itrace. 1148 1149 1150perf report 1151----------- 1152 1153By default, perf report will decode trace data found in the perf.data file. 1154This can be further controlled by new option --itrace exactly the same as 1155perf script, with the exception that the default is --itrace=igxe. 1156 1157 1158perf inject 1159----------- 1160 1161perf inject also accepts the --itrace option in which case tracing data is 1162removed and replaced with the synthesized events. e.g. 1163 1164 perf inject --itrace -i perf.data -o perf.data.new 1165 1166Below is an example of using Intel PT with autofdo. It requires autofdo 1167(https://github.com/google/autofdo) and gcc version 5. The bubble 1168sort example is from the AutoFDO tutorial (https://gcc.gnu.org/wiki/AutoFDO/Tutorial) 1169amended to take the number of elements as a parameter. 1170 1171 $ gcc-5 -O3 sort.c -o sort_optimized 1172 $ ./sort_optimized 30000 1173 Bubble sorting array of 30000 elements 1174 2254 ms 1175 1176 $ cat ~/.perfconfig 1177 [intel-pt] 1178 mispred-all = on 1179 1180 $ perf record -e intel_pt//u ./sort 3000 1181 Bubble sorting array of 3000 elements 1182 58 ms 1183 [ perf record: Woken up 2 times to write data ] 1184 [ perf record: Captured and wrote 3.939 MB perf.data ] 1185 $ perf inject -i perf.data -o inj --itrace=i100usle --strip 1186 $ ./create_gcov --binary=./sort --profile=inj --gcov=sort.gcov -gcov_version=1 1187 $ gcc-5 -O3 -fauto-profile=sort.gcov sort.c -o sort_autofdo 1188 $ ./sort_autofdo 30000 1189 Bubble sorting array of 30000 elements 1190 2155 ms 1191 1192Note there is currently no advantage to using Intel PT instead of LBR, but 1193that may change in the future if greater use is made of the data. 1194 1195 1196PEBS via Intel PT 1197----------------- 1198 1199Some hardware has the feature to redirect PEBS records to the Intel PT trace. 1200Recording is selected by using the aux-output config term e.g. 1201 1202 perf record -c 10000 -e '{intel_pt/branch=0/,cycles/aux-output/ppp}' uname 1203 1204Originally, software only supported redirecting at most one PEBS event because it 1205was not able to differentiate one event from another. To overcome that, more recent 1206kernels and perf tools add support for the PERF_RECORD_AUX_OUTPUT_HW_ID side-band event. 1207To check for the presence of that event in a PEBS-via-PT trace: 1208 1209 perf script -D --no-itrace | grep PERF_RECORD_AUX_OUTPUT_HW_ID 1210 1211To display PEBS events from the Intel PT trace, use the itrace 'o' option e.g. 1212 1213 perf script --itrace=oe 1214 1215XED 1216--- 1217 1218include::build-xed.txt[] 1219 1220 1221Tracing Virtual Machines 1222------------------------ 1223 1224Currently, only kernel tracing is supported and only with either "timeless" decoding 1225(i.e. no TSC timestamps) or VM Time Correlation. VM Time Correlation is an extra step 1226using 'perf inject' and requires unchanging VMX TSC Offset and no VMX TSC Scaling. 1227 1228Other limitations and caveats 1229 1230 VMX controls may suppress packets needed for decoding resulting in decoding errors 1231 VMX controls may block the perf NMI to the host potentially resulting in lost trace data 1232 Guest kernel self-modifying code (e.g. jump labels or JIT-compiled eBPF) will result in decoding errors 1233 Guest thread information is unknown 1234 Guest VCPU is unknown but may be able to be inferred from the host thread 1235 Callchains are not supported 1236 1237Example using "timeless" decoding 1238 1239Start VM 1240 1241 $ sudo virsh start kubuntu20.04 1242 Domain kubuntu20.04 started 1243 1244Mount the guest file system. Note sshfs needs -o direct_io to enable reading of proc files. root access is needed to read /proc/kcore. 1245 1246 $ mkdir vm0 1247 $ sshfs -o direct_io root@vm0:/ vm0 1248 1249Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore 1250 1251 $ perf buildid-cache -v --kcore vm0/proc/kcore 1252 kcore added to build-id cache directory /home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306 1253 $ KALLSYMS=/home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306/kallsyms 1254 1255Find the VM process 1256 1257 $ ps -eLl | grep 'KVM\|PID' 1258 F S UID PID PPID LWP C PRI NI ADDR SZ WCHAN TTY TIME CMD 1259 3 S 64055 1430 1 1440 1 80 0 - 1921718 - ? 00:02:47 CPU 0/KVM 1260 3 S 64055 1430 1 1441 1 80 0 - 1921718 - ? 00:02:41 CPU 1/KVM 1261 3 S 64055 1430 1 1442 1 80 0 - 1921718 - ? 00:02:38 CPU 2/KVM 1262 3 S 64055 1430 1 1443 2 80 0 - 1921718 - ? 00:03:18 CPU 3/KVM 1263 1264Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop. 1265TSC is not supported and tsc=0 must be specified. That means mtc is useless, so add mtc=0. 1266However, IPC can still be determined, hence cyc=1 can be added. 1267Only kernel decoding is supported, so 'k' must be specified. 1268Intel PT traces both the host and the guest so --guest and --host need to be specified. 1269Without timestamps, --per-thread must be specified to distinguish threads. 1270 1271 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/tsc=0,mtc=0,cyc=1/k -p 1430 --per-thread 1272 ^C 1273 [ perf record: Woken up 1 times to write data ] 1274 [ perf record: Captured and wrote 5.829 MB ] 1275 1276perf script can be used to provide an instruction trace 1277 1278 $ perf script --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21 1279 CPU 0/KVM 1440 ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms]) movq 0x48(%rax), %r9 1280 CPU 0/KVM 1440 ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms]) movq 0x50(%rax), %r10 1281 CPU 0/KVM 1440 ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms]) movq 0x58(%rax), %r11 1282 CPU 0/KVM 1440 ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms]) movq 0x60(%rax), %r12 1283 CPU 0/KVM 1440 ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms]) movq 0x68(%rax), %r13 1284 CPU 0/KVM 1440 ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms]) movq 0x70(%rax), %r14 1285 CPU 0/KVM 1440 ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms]) movq 0x78(%rax), %r15 1286 CPU 0/KVM 1440 ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms]) movq (%rax), %rax 1287 CPU 0/KVM 1440 ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms]) callq 0xffffffff82133c40 1288 CPU 0/KVM 1440 ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms]) jz 0xffffffff82133c46 1289 CPU 0/KVM 1440 ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms]) vmresume IPC: 0.11 (50/445) 1290 :1440 1440 ffffffffbb678b06 native_write_msr+0x6 ([guest.kernel.kallsyms]) nopl %eax, (%rax,%rax,1) 1291 :1440 1440 ffffffffbb678b0b native_write_msr+0xb ([guest.kernel.kallsyms]) retq IPC: 0.04 (2/41) 1292 :1440 1440 ffffffffbb666646 lapic_next_deadline+0x26 ([guest.kernel.kallsyms]) data16 nop 1293 :1440 1440 ffffffffbb666648 lapic_next_deadline+0x28 ([guest.kernel.kallsyms]) xor %eax, %eax 1294 :1440 1440 ffffffffbb66664a lapic_next_deadline+0x2a ([guest.kernel.kallsyms]) popq %rbp 1295 :1440 1440 ffffffffbb66664b lapic_next_deadline+0x2b ([guest.kernel.kallsyms]) retq IPC: 0.16 (4/25) 1296 :1440 1440 ffffffffbb74607f clockevents_program_event+0x8f ([guest.kernel.kallsyms]) test %eax, %eax 1297 :1440 1440 ffffffffbb746081 clockevents_program_event+0x91 ([guest.kernel.kallsyms]) jz 0xffffffffbb74603c IPC: 0.06 (2/30) 1298 :1440 1440 ffffffffbb74603c clockevents_program_event+0x4c ([guest.kernel.kallsyms]) popq %rbx 1299 :1440 1440 ffffffffbb74603d clockevents_program_event+0x4d ([guest.kernel.kallsyms]) popq %r12 1300 1301Example using VM Time Correlation 1302 1303Start VM 1304 1305 $ sudo virsh start kubuntu20.04 1306 Domain kubuntu20.04 started 1307 1308Mount the guest file system. Note sshfs needs -o direct_io to enable reading of proc files. root access is needed to read /proc/kcore. 1309 1310 $ mkdir -p vm0 1311 $ sshfs -o direct_io root@vm0:/ vm0 1312 1313Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore 1314 1315 $ perf buildid-cache -v --kcore vm0/proc/kcore 1316 same kcore found in /home/user/.debug/[kernel.kcore]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777 1317 $ KALLSYMS=/home/user/.debug/\[kernel.kcore\]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777/kallsyms 1318 1319Find the VM process 1320 1321 $ ps -eLl | grep 'KVM\|PID' 1322 F S UID PID PPID LWP C PRI NI ADDR SZ WCHAN TTY TIME CMD 1323 3 S 64055 16998 1 17005 13 80 0 - 1818189 - ? 00:00:16 CPU 0/KVM 1324 3 S 64055 16998 1 17006 4 80 0 - 1818189 - ? 00:00:05 CPU 1/KVM 1325 3 S 64055 16998 1 17007 3 80 0 - 1818189 - ? 00:00:04 CPU 2/KVM 1326 3 S 64055 16998 1 17008 4 80 0 - 1818189 - ? 00:00:05 CPU 3/KVM 1327 1328Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop. 1329IPC can be determined, hence cyc=1 can be added. 1330Only kernel decoding is supported, so 'k' must be specified. 1331Intel PT traces both the host and the guest so --guest and --host need to be specified. 1332 1333 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/cyc=1/k -p 16998 1334 ^C[ perf record: Woken up 1 times to write data ] 1335 [ perf record: Captured and wrote 9.041 MB perf.data.kvm ] 1336 1337Now 'perf inject' can be used to determine the VMX TCS Offset. Note, Intel PT TSC packets are 1338only 7-bytes, so the TSC Offset might differ from the actual value in the 8th byte. That will 1339have no effect i.e. the resulting timestamps will be correct anyway. 1340 1341 $ perf inject -i perf.data.kvm --vm-time-correlation=dry-run 1342 ERROR: Unknown TSC Offset for VMCS 0x1bff6a 1343 VMCS: 0x1bff6a TSC Offset 0xffffe42722c64c41 1344 ERROR: Unknown TSC Offset for VMCS 0x1cbc08 1345 VMCS: 0x1cbc08 TSC Offset 0xffffe42722c64c41 1346 ERROR: Unknown TSC Offset for VMCS 0x1c3ce8 1347 VMCS: 0x1c3ce8 TSC Offset 0xffffe42722c64c41 1348 ERROR: Unknown TSC Offset for VMCS 0x1cbce9 1349 VMCS: 0x1cbce9 TSC Offset 0xffffe42722c64c41 1350 1351Each virtual CPU has a different Virtual Machine Control Structure (VMCS) 1352shown above with the calculated TSC Offset. For an unchanging TSC Offset 1353they should all be the same for the same virtual machine. 1354 1355Now that the TSC Offset is known, it can be provided to 'perf inject' 1356 1357 $ perf inject -i perf.data.kvm --vm-time-correlation="dry-run 0xffffe42722c64c41" 1358 1359Note the options for 'perf inject' --vm-time-correlation are: 1360 1361 [ dry-run ] [ <TSC Offset> [ : <VMCS> [ , <VMCS> ]... ] ]... 1362 1363So it is possible to specify different TSC Offsets for different VMCS. 1364The option "dry-run" will cause the file to be processed but without updating it. 1365Note it is also possible to get a intel_pt.log file by adding option --itrace=d 1366 1367There were no errors so, do it for real 1368 1369 $ perf inject -i perf.data.kvm --vm-time-correlation=0xffffe42722c64c41 --force 1370 1371'perf script' can be used to see if there are any decoder errors 1372 1373 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --itrace=e-o 1374 1375There were none. 1376 1377'perf script' can be used to provide an instruction trace showing timestamps 1378 1379 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21 1380 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms]) movq 0x48(%rax), %r9 1381 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms]) movq 0x50(%rax), %r10 1382 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms]) movq 0x58(%rax), %r11 1383 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms]) movq 0x60(%rax), %r12 1384 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms]) movq 0x68(%rax), %r13 1385 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms]) movq 0x70(%rax), %r14 1386 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms]) movq 0x78(%rax), %r15 1387 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms]) movq (%rax), %rax 1388 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms]) callq 0xffffffff82133c40 1389 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms]) jz 0xffffffff82133c46 1390 CPU 1/KVM 17006 [001] 11500.262866075: ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms]) vmresume IPC: 0.05 (40/769) 1391 :17006 17006 [001] 11500.262869216: ffffffff82200cb0 asm_sysvec_apic_timer_interrupt+0x0 ([guest.kernel.kallsyms]) clac 1392 :17006 17006 [001] 11500.262869216: ffffffff82200cb3 asm_sysvec_apic_timer_interrupt+0x3 ([guest.kernel.kallsyms]) pushq $0xffffffffffffffff 1393 :17006 17006 [001] 11500.262869216: ffffffff82200cb5 asm_sysvec_apic_timer_interrupt+0x5 ([guest.kernel.kallsyms]) callq 0xffffffff82201160 1394 :17006 17006 [001] 11500.262869216: ffffffff82201160 error_entry+0x0 ([guest.kernel.kallsyms]) cld 1395 :17006 17006 [001] 11500.262869216: ffffffff82201161 error_entry+0x1 ([guest.kernel.kallsyms]) pushq %rsi 1396 :17006 17006 [001] 11500.262869216: ffffffff82201162 error_entry+0x2 ([guest.kernel.kallsyms]) movq 0x8(%rsp), %rsi 1397 :17006 17006 [001] 11500.262869216: ffffffff82201167 error_entry+0x7 ([guest.kernel.kallsyms]) movq %rdi, 0x8(%rsp) 1398 :17006 17006 [001] 11500.262869216: ffffffff8220116c error_entry+0xc ([guest.kernel.kallsyms]) pushq %rdx 1399 :17006 17006 [001] 11500.262869216: ffffffff8220116d error_entry+0xd ([guest.kernel.kallsyms]) pushq %rcx 1400 :17006 17006 [001] 11500.262869216: ffffffff8220116e error_entry+0xe ([guest.kernel.kallsyms]) pushq %rax 1401 1402 1403Tracing Virtual Machines - Guest Code 1404------------------------------------- 1405 1406A common case for KVM test programs is that the test program acts as the 1407hypervisor, creating, running and destroying the virtual machine, and 1408providing the guest object code from its own object code. In this case, 1409the VM is not running an OS, but only the functions loaded into it by the 1410hypervisor test program, and conveniently, loaded at the same virtual 1411addresses. To support that, option "--guest-code" has been added to perf script 1412and perf kvm report. 1413 1414Here is an example tracing a test program from the kernel's KVM selftests: 1415 1416 # perf record --kcore -e intel_pt/cyc/ -- tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test 1417 [ perf record: Woken up 1 times to write data ] 1418 [ perf record: Captured and wrote 0.280 MB perf.data ] 1419 # perf script --guest-code --itrace=bep --ns -F-period,+addr,+flags 1420 [SNIP] 1421 tsc_msrs_test 18436 [007] 10897.962087733: branches: call ffffffffc13b2ff5 __vmx_vcpu_run+0x15 (vmlinux) => ffffffffc13b2f50 vmx_update_host_rsp+0x0 (vmlinux) 1422 tsc_msrs_test 18436 [007] 10897.962087733: branches: return ffffffffc13b2f5d vmx_update_host_rsp+0xd (vmlinux) => ffffffffc13b2ffa __vmx_vcpu_run+0x1a (vmlinux) 1423 tsc_msrs_test 18436 [007] 10897.962087733: branches: call ffffffffc13b303b __vmx_vcpu_run+0x5b (vmlinux) => ffffffffc13b2f80 vmx_vmenter+0x0 (vmlinux) 1424 tsc_msrs_test 18436 [007] 10897.962087836: branches: vmentry ffffffffc13b2f82 vmx_vmenter+0x2 (vmlinux) => 0 [unknown] ([unknown]) 1425 [guest/18436] 18436 [007] 10897.962087836: branches: vmentry 0 [unknown] ([unknown]) => 402c81 guest_code+0x131 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1426 [guest/18436] 18436 [007] 10897.962087836: branches: call 402c81 guest_code+0x131 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 40dba0 ucall+0x0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1427 [guest/18436] 18436 [007] 10897.962088248: branches: vmexit 40dba0 ucall+0x0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 0 [unknown] ([unknown]) 1428 tsc_msrs_test 18436 [007] 10897.962088248: branches: vmexit 0 [unknown] ([unknown]) => ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux) 1429 tsc_msrs_test 18436 [007] 10897.962088248: branches: jmp ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux) => ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux) 1430 tsc_msrs_test 18436 [007] 10897.962088256: branches: return ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux) => ffffffffc13b3040 __vmx_vcpu_run+0x60 (vmlinux) 1431 tsc_msrs_test 18436 [007] 10897.962088270: branches: return ffffffffc13b30b6 __vmx_vcpu_run+0xd6 (vmlinux) => ffffffffc13b2f2e vmx_vcpu_enter_exit+0x4e (vmlinux) 1432 [SNIP] 1433 tsc_msrs_test 18436 [007] 10897.962089321: branches: call ffffffffc13b2ff5 __vmx_vcpu_run+0x15 (vmlinux) => ffffffffc13b2f50 vmx_update_host_rsp+0x0 (vmlinux) 1434 tsc_msrs_test 18436 [007] 10897.962089321: branches: return ffffffffc13b2f5d vmx_update_host_rsp+0xd (vmlinux) => ffffffffc13b2ffa __vmx_vcpu_run+0x1a (vmlinux) 1435 tsc_msrs_test 18436 [007] 10897.962089321: branches: call ffffffffc13b303b __vmx_vcpu_run+0x5b (vmlinux) => ffffffffc13b2f80 vmx_vmenter+0x0 (vmlinux) 1436 tsc_msrs_test 18436 [007] 10897.962089424: branches: vmentry ffffffffc13b2f82 vmx_vmenter+0x2 (vmlinux) => 0 [unknown] ([unknown]) 1437 [guest/18436] 18436 [007] 10897.962089424: branches: vmentry 0 [unknown] ([unknown]) => 40dba0 ucall+0x0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1438 [guest/18436] 18436 [007] 10897.962089701: branches: jmp 40dc1b ucall+0x7b (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 40dc39 ucall+0x99 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1439 [guest/18436] 18436 [007] 10897.962089701: branches: jcc 40dc3c ucall+0x9c (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 40dc20 ucall+0x80 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1440 [guest/18436] 18436 [007] 10897.962089701: branches: jcc 40dc3c ucall+0x9c (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 40dc20 ucall+0x80 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1441 [guest/18436] 18436 [007] 10897.962089701: branches: jcc 40dc37 ucall+0x97 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 40dc50 ucall+0xb0 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) 1442 [guest/18436] 18436 [007] 10897.962089878: branches: vmexit 40dc55 ucall+0xb5 (/home/user/git/work/tools/testing/selftests/kselftest_install/kvm/tsc_msrs_test) => 0 [unknown] ([unknown]) 1443 tsc_msrs_test 18436 [007] 10897.962089878: branches: vmexit 0 [unknown] ([unknown]) => ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux) 1444 tsc_msrs_test 18436 [007] 10897.962089878: branches: jmp ffffffffc13b2fa0 vmx_vmexit+0x0 (vmlinux) => ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux) 1445 tsc_msrs_test 18436 [007] 10897.962089887: branches: return ffffffffc13b2fd2 vmx_vmexit+0x32 (vmlinux) => ffffffffc13b3040 __vmx_vcpu_run+0x60 (vmlinux) 1446 tsc_msrs_test 18436 [007] 10897.962089901: branches: return ffffffffc13b30b6 __vmx_vcpu_run+0xd6 (vmlinux) => ffffffffc13b2f2e vmx_vcpu_enter_exit+0x4e (vmlinux) 1447 [SNIP] 1448 1449 # perf kvm --guest-code --guest --host report -i perf.data --stdio | head -20 1450 1451 # To display the perf.data header info, please use --header/--header-only options. 1452 # 1453 # 1454 # Total Lost Samples: 0 1455 # 1456 # Samples: 12 of event 'instructions' 1457 # Event count (approx.): 2274583 1458 # 1459 # Children Self Command Shared Object Symbol 1460 # ........ ........ ............. .................... ........................................... 1461 # 1462 54.70% 0.00% tsc_msrs_test [kernel.vmlinux] [k] entry_SYSCALL_64_after_hwframe 1463 | 1464 ---entry_SYSCALL_64_after_hwframe 1465 do_syscall_64 1466 | 1467 |--29.44%--syscall_exit_to_user_mode 1468 | exit_to_user_mode_prepare 1469 | task_work_run 1470 | __fput 1471 1472 1473Event Trace 1474----------- 1475 1476Event Trace records information about asynchronous events, for example interrupts, 1477faults, VM exits and entries. The information is recorded in CFE and EVD packets, 1478and also the Interrupt Flag is recorded on the MODE.Exec packet. The CFE packet 1479contains a type field to identify one of the following: 1480 1481 1 INTR interrupt, fault, exception, NMI 1482 2 IRET interrupt return 1483 3 SMI system management interrupt 1484 4 RSM resume from system management mode 1485 5 SIPI startup interprocessor interrupt 1486 6 INIT INIT signal 1487 7 VMENTRY VM-Entry 1488 8 VMEXIT VM-Entry 1489 9 VMEXIT_INTR VM-Exit due to interrupt 1490 10 SHUTDOWN Shutdown 1491 1492For more details, refer to the Intel 64 and IA-32 Architectures Software 1493Developer Manuals (version 076 or later). 1494 1495The capability to do Event Trace is indicated by the 1496/sys/bus/event_source/devices/intel_pt/caps/event_trace file. 1497 1498Event trace is selected for recording using the "event" config term. e.g. 1499 1500 perf record -e intel_pt/event/u uname 1501 1502Event trace events are output using the --itrace I option. e.g. 1503 1504 perf script --itrace=Ie 1505 1506perf script displays events containing CFE type, vector and event data, 1507in the form: 1508 1509 evt: hw int (t) cfe: INTR IP: 1 vector: 3 PFA: 0x8877665544332211 1510 1511The IP flag indicates if the event binds to an IP, which includes any case where 1512flow control packet generation is enabled, as well as when CFE packet IP bit is 1513set. 1514 1515perf script displays events containing changes to the Interrupt Flag in the form: 1516 1517 iflag: t IFLAG: 1->0 via branch 1518 1519where "via branch" indicates a branch (interrupt or return from interrupt) and 1520"non branch" indicates an instruction such as CFI, STI or POPF). 1521 1522In addition, the current state of the interrupt flag is indicated by the presence 1523or absence of the "D" (interrupt disabled) perf script flag. If the interrupt 1524flag is changed, then the "t" flag is also included i.e. 1525 1526 no flag, interrupts enabled IF=1 1527 t interrupts become disabled IF=1 -> IF=0 1528 D interrupts are disabled IF=0 1529 Dt interrupts become enabled IF=0 -> IF=1 1530 1531The intel-pt-events.py script illustrates how to access Event Trace information 1532using a Python script. 1533 1534 1535TNT Disable 1536----------- 1537 1538TNT packets are disabled using the "notnt" config term. e.g. 1539 1540 perf record -e intel_pt/notnt/u uname 1541 1542In that case the --itrace q option is forced because walking executable code 1543to reconstruct the control flow is not possible. 1544 1545 1546Emulated PTWRITE 1547---------------- 1548 1549Later perf tools support a method to emulate the ptwrite instruction, which 1550can be useful if hardware does not support the ptwrite instruction. 1551 1552Instead of using the ptwrite instruction, a function is used which produces 1553a trace that encodes the payload data into TNT packets. Here is an example 1554of the function: 1555 1556 #include <stdint.h> 1557 1558 void perf_emulate_ptwrite(uint64_t x) 1559 __attribute__((externally_visible, noipa, no_instrument_function, naked)); 1560 1561 #define PERF_EMULATE_PTWRITE_8_BITS \ 1562 "1: shl %rax\n" \ 1563 " jc 1f\n" \ 1564 "1: shl %rax\n" \ 1565 " jc 1f\n" \ 1566 "1: shl %rax\n" \ 1567 " jc 1f\n" \ 1568 "1: shl %rax\n" \ 1569 " jc 1f\n" \ 1570 "1: shl %rax\n" \ 1571 " jc 1f\n" \ 1572 "1: shl %rax\n" \ 1573 " jc 1f\n" \ 1574 "1: shl %rax\n" \ 1575 " jc 1f\n" \ 1576 "1: shl %rax\n" \ 1577 " jc 1f\n" 1578 1579 /* Undefined instruction */ 1580 #define PERF_EMULATE_PTWRITE_UD2 ".byte 0x0f, 0x0b\n" 1581 1582 #define PERF_EMULATE_PTWRITE_MAGIC PERF_EMULATE_PTWRITE_UD2 ".ascii \"perf,ptwrite \"\n" 1583 1584 void perf_emulate_ptwrite(uint64_t x __attribute__ ((__unused__))) 1585 { 1586 /* Assumes SysV ABI : x passed in rdi */ 1587 __asm__ volatile ( 1588 "jmp 1f\n" 1589 PERF_EMULATE_PTWRITE_MAGIC 1590 "1: mov %rdi, %rax\n" 1591 PERF_EMULATE_PTWRITE_8_BITS 1592 PERF_EMULATE_PTWRITE_8_BITS 1593 PERF_EMULATE_PTWRITE_8_BITS 1594 PERF_EMULATE_PTWRITE_8_BITS 1595 PERF_EMULATE_PTWRITE_8_BITS 1596 PERF_EMULATE_PTWRITE_8_BITS 1597 PERF_EMULATE_PTWRITE_8_BITS 1598 PERF_EMULATE_PTWRITE_8_BITS 1599 "1: ret\n" 1600 ); 1601 } 1602 1603For example, a test program with the function above: 1604 1605 #include <stdio.h> 1606 #include <stdint.h> 1607 #include <stdlib.h> 1608 1609 #include "perf_emulate_ptwrite.h" 1610 1611 int main(int argc, char *argv[]) 1612 { 1613 uint64_t x = 0; 1614 1615 if (argc > 1) 1616 x = strtoull(argv[1], NULL, 0); 1617 perf_emulate_ptwrite(x); 1618 return 0; 1619 } 1620 1621Can be compiled and traced: 1622 1623 $ gcc -Wall -Wextra -O3 -g -o eg_ptw eg_ptw.c 1624 $ perf record -e intel_pt//u ./eg_ptw 0x1234567890abcdef 1625 [ perf record: Woken up 1 times to write data ] 1626 [ perf record: Captured and wrote 0.017 MB perf.data ] 1627 $ perf script --itrace=ew 1628 eg_ptw 19875 [007] 8061.235912: ptwrite: IP: 0 payload: 0x1234567890abcdef 55701249a196 perf_emulate_ptwrite+0x16 (/home/user/eg_ptw) 1629 $ 1630 1631 1632EXAMPLE 1633------- 1634 1635Examples can be found on perf wiki page "Perf tools support for Intel® Processor Trace": 1636 1637https://perf.wiki.kernel.org/index.php/Perf_tools_support_for_Intel%C2%AE_Processor_Trace 1638 1639 1640SEE ALSO 1641-------- 1642 1643linkperf:perf-record[1], linkperf:perf-script[1], linkperf:perf-report[1], 1644linkperf:perf-inject[1] 1645