1[
2    {
3        "ArchStdEvent": "L1I_CACHE_REFILL"
4    },
5    {
6        "ArchStdEvent": "L1I_TLB_REFILL"
7    },
8    {
9        "ArchStdEvent": "L1D_CACHE_REFILL"
10    },
11    {
12        "ArchStdEvent": "L1D_CACHE"
13    },
14    {
15        "ArchStdEvent": "L1D_TLB_REFILL"
16    },
17    {
18        "ArchStdEvent": "L1I_CACHE"
19    },
20    {
21        "ArchStdEvent": "L1D_CACHE_WB"
22    },
23    {
24        "ArchStdEvent": "L2D_CACHE"
25    },
26    {
27        "ArchStdEvent": "L2D_CACHE_REFILL"
28    },
29    {
30        "ArchStdEvent": "L2D_CACHE_WB"
31    }
32]
33