1[
2    {
3        "ArchStdEvent": "CPU_CYCLES"
4    },
5    {
6        "ArchStdEvent": "BUS_ACCESS"
7    },
8    {
9        "ArchStdEvent": "BUS_CYCLES"
10    },
11    {
12        "ArchStdEvent": "BUS_ACCESS_RD"
13    },
14    {
15        "ArchStdEvent": "BUS_ACCESS_WR"
16    },
17    {
18        "ArchStdEvent": "BUS_ACCESS_SHARED"
19    },
20    {
21        "ArchStdEvent": "BUS_ACCESS_NOT_SHARED"
22    },
23    {
24        "ArchStdEvent": "BUS_ACCESS_NORMAL"
25    },
26    {
27        "ArchStdEvent": "BUS_ACCESS_PERIPH"
28    }
29]
30