1 //===-- llvm/InlineAsm.h - Class to represent inline asm strings-*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This class represents the inline asm strings, which are Value*'s that are 11 // used as the callee operand of call instructions. InlineAsm's are uniqued 12 // like constants, and created via InlineAsm::get(...). 13 // 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_IR_INLINEASM_H 17 #define LLVM_IR_INLINEASM_H 18 19 #include "llvm/ADT/StringRef.h" 20 #include "llvm/IR/Value.h" 21 #include <vector> 22 23 namespace llvm { 24 25 class PointerType; 26 class FunctionType; 27 class Module; 28 29 struct InlineAsmKeyType; 30 template <class ConstantClass> class ConstantUniqueMap; 31 32 class InlineAsm : public Value { 33 public: 34 enum AsmDialect { 35 AD_ATT, 36 AD_Intel 37 }; 38 39 private: 40 friend struct InlineAsmKeyType; 41 friend class ConstantUniqueMap<InlineAsm>; 42 43 InlineAsm(const InlineAsm &) LLVM_DELETED_FUNCTION; 44 void operator=(const InlineAsm&) LLVM_DELETED_FUNCTION; 45 46 std::string AsmString, Constraints; 47 bool HasSideEffects; 48 bool IsAlignStack; 49 AsmDialect Dialect; 50 51 InlineAsm(PointerType *Ty, const std::string &AsmString, 52 const std::string &Constraints, bool hasSideEffects, 53 bool isAlignStack, AsmDialect asmDialect); 54 virtual ~InlineAsm(); 55 56 /// When the ConstantUniqueMap merges two types and makes two InlineAsms 57 /// identical, it destroys one of them with this method. 58 void destroyConstant(); 59 public: 60 61 /// InlineAsm::get - Return the specified uniqued inline asm string. 62 /// 63 static InlineAsm *get(FunctionType *Ty, StringRef AsmString, 64 StringRef Constraints, bool hasSideEffects, 65 bool isAlignStack = false, 66 AsmDialect asmDialect = AD_ATT); 67 hasSideEffects()68 bool hasSideEffects() const { return HasSideEffects; } isAlignStack()69 bool isAlignStack() const { return IsAlignStack; } getDialect()70 AsmDialect getDialect() const { return Dialect; } 71 72 /// getType - InlineAsm's are always pointers. 73 /// getType()74 PointerType *getType() const { 75 return reinterpret_cast<PointerType*>(Value::getType()); 76 } 77 78 /// getFunctionType - InlineAsm's are always pointers to functions. 79 /// 80 FunctionType *getFunctionType() const; 81 getAsmString()82 const std::string &getAsmString() const { return AsmString; } getConstraintString()83 const std::string &getConstraintString() const { return Constraints; } 84 85 /// Verify - This static method can be used by the parser to check to see if 86 /// the specified constraint string is legal for the type. This returns true 87 /// if legal, false if not. 88 /// 89 static bool Verify(FunctionType *Ty, StringRef Constraints); 90 91 // Constraint String Parsing 92 enum ConstraintPrefix { 93 isInput, // 'x' 94 isOutput, // '=x' 95 isClobber // '~x' 96 }; 97 98 typedef std::vector<std::string> ConstraintCodeVector; 99 100 struct SubConstraintInfo { 101 /// MatchingInput - If this is not -1, this is an output constraint where an 102 /// input constraint is required to match it (e.g. "0"). The value is the 103 /// constraint number that matches this one (for example, if this is 104 /// constraint #0 and constraint #4 has the value "0", this will be 4). 105 signed char MatchingInput; 106 /// Code - The constraint code, either the register name (in braces) or the 107 /// constraint letter/number. 108 ConstraintCodeVector Codes; 109 /// Default constructor. SubConstraintInfoSubConstraintInfo110 SubConstraintInfo() : MatchingInput(-1) {} 111 }; 112 113 typedef std::vector<SubConstraintInfo> SubConstraintInfoVector; 114 struct ConstraintInfo; 115 typedef std::vector<ConstraintInfo> ConstraintInfoVector; 116 117 struct ConstraintInfo { 118 /// Type - The basic type of the constraint: input/output/clobber 119 /// 120 ConstraintPrefix Type; 121 122 /// isEarlyClobber - "&": output operand writes result before inputs are all 123 /// read. This is only ever set for an output operand. 124 bool isEarlyClobber; 125 126 /// MatchingInput - If this is not -1, this is an output constraint where an 127 /// input constraint is required to match it (e.g. "0"). The value is the 128 /// constraint number that matches this one (for example, if this is 129 /// constraint #0 and constraint #4 has the value "0", this will be 4). 130 signed char MatchingInput; 131 132 /// hasMatchingInput - Return true if this is an output constraint that has 133 /// a matching input constraint. hasMatchingInputConstraintInfo134 bool hasMatchingInput() const { return MatchingInput != -1; } 135 136 /// isCommutative - This is set to true for a constraint that is commutative 137 /// with the next operand. 138 bool isCommutative; 139 140 /// isIndirect - True if this operand is an indirect operand. This means 141 /// that the address of the source or destination is present in the call 142 /// instruction, instead of it being returned or passed in explicitly. This 143 /// is represented with a '*' in the asm string. 144 bool isIndirect; 145 146 /// Code - The constraint code, either the register name (in braces) or the 147 /// constraint letter/number. 148 ConstraintCodeVector Codes; 149 150 /// isMultipleAlternative - '|': has multiple-alternative constraints. 151 bool isMultipleAlternative; 152 153 /// multipleAlternatives - If there are multiple alternative constraints, 154 /// this array will contain them. Otherwise it will be empty. 155 SubConstraintInfoVector multipleAlternatives; 156 157 /// The currently selected alternative constraint index. 158 unsigned currentAlternativeIndex; 159 160 ///Default constructor. 161 ConstraintInfo(); 162 163 /// Parse - Analyze the specified string (e.g. "=*&{eax}") and fill in the 164 /// fields in this structure. If the constraint string is not understood, 165 /// return true, otherwise return false. 166 bool Parse(StringRef Str, ConstraintInfoVector &ConstraintsSoFar); 167 168 /// selectAlternative - Point this constraint to the alternative constraint 169 /// indicated by the index. 170 void selectAlternative(unsigned index); 171 }; 172 173 /// ParseConstraints - Split up the constraint string into the specific 174 /// constraints and their prefixes. If this returns an empty vector, and if 175 /// the constraint string itself isn't empty, there was an error parsing. 176 static ConstraintInfoVector ParseConstraints(StringRef ConstraintString); 177 178 /// ParseConstraints - Parse the constraints of this inlineasm object, 179 /// returning them the same way that ParseConstraints(str) does. ParseConstraints()180 ConstraintInfoVector ParseConstraints() const { 181 return ParseConstraints(Constraints); 182 } 183 184 // Methods for support type inquiry through isa, cast, and dyn_cast: classof(const Value * V)185 static inline bool classof(const Value *V) { 186 return V->getValueID() == Value::InlineAsmVal; 187 } 188 189 190 // These are helper methods for dealing with flags in the INLINEASM SDNode 191 // in the backend. 192 193 enum : uint32_t { 194 // Fixed operands on an INLINEASM SDNode. 195 Op_InputChain = 0, 196 Op_AsmString = 1, 197 Op_MDNode = 2, 198 Op_ExtraInfo = 3, // HasSideEffects, IsAlignStack, AsmDialect. 199 Op_FirstOperand = 4, 200 201 // Fixed operands on an INLINEASM MachineInstr. 202 MIOp_AsmString = 0, 203 MIOp_ExtraInfo = 1, // HasSideEffects, IsAlignStack, AsmDialect. 204 MIOp_FirstOperand = 2, 205 206 // Interpretation of the MIOp_ExtraInfo bit field. 207 Extra_HasSideEffects = 1, 208 Extra_IsAlignStack = 2, 209 Extra_AsmDialect = 4, 210 Extra_MayLoad = 8, 211 Extra_MayStore = 16, 212 213 // Inline asm operands map to multiple SDNode / MachineInstr operands. 214 // The first operand is an immediate describing the asm operand, the low 215 // bits is the kind: 216 Kind_RegUse = 1, // Input register, "r". 217 Kind_RegDef = 2, // Output register, "=r". 218 Kind_RegDefEarlyClobber = 3, // Early-clobber output register, "=&r". 219 Kind_Clobber = 4, // Clobbered register, "~r". 220 Kind_Imm = 5, // Immediate. 221 Kind_Mem = 6, // Memory operand, "m". 222 223 Flag_MatchingOperand = 0x80000000 224 }; 225 getFlagWord(unsigned Kind,unsigned NumOps)226 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) { 227 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!"); 228 assert(Kind >= Kind_RegUse && Kind <= Kind_Mem && "Invalid Kind"); 229 return Kind | (NumOps << 3); 230 } 231 232 /// getFlagWordForMatchingOp - Augment an existing flag word returned by 233 /// getFlagWord with information indicating that this input operand is tied 234 /// to a previous output operand. getFlagWordForMatchingOp(unsigned InputFlag,unsigned MatchedOperandNo)235 static unsigned getFlagWordForMatchingOp(unsigned InputFlag, 236 unsigned MatchedOperandNo) { 237 assert(MatchedOperandNo <= 0x7fff && "Too big matched operand"); 238 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data"); 239 return InputFlag | Flag_MatchingOperand | (MatchedOperandNo << 16); 240 } 241 242 /// getFlagWordForRegClass - Augment an existing flag word returned by 243 /// getFlagWord with the required register class for the following register 244 /// operands. 245 /// A tied use operand cannot have a register class, use the register class 246 /// from the def operand instead. getFlagWordForRegClass(unsigned InputFlag,unsigned RC)247 static unsigned getFlagWordForRegClass(unsigned InputFlag, unsigned RC) { 248 // Store RC + 1, reserve the value 0 to mean 'no register class'. 249 ++RC; 250 assert(RC <= 0x7fff && "Too large register class ID"); 251 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data"); 252 return InputFlag | (RC << 16); 253 } 254 getKind(unsigned Flags)255 static unsigned getKind(unsigned Flags) { 256 return Flags & 7; 257 } 258 isRegDefKind(unsigned Flag)259 static bool isRegDefKind(unsigned Flag){ return getKind(Flag) == Kind_RegDef;} isImmKind(unsigned Flag)260 static bool isImmKind(unsigned Flag) { return getKind(Flag) == Kind_Imm; } isMemKind(unsigned Flag)261 static bool isMemKind(unsigned Flag) { return getKind(Flag) == Kind_Mem; } isRegDefEarlyClobberKind(unsigned Flag)262 static bool isRegDefEarlyClobberKind(unsigned Flag) { 263 return getKind(Flag) == Kind_RegDefEarlyClobber; 264 } isClobberKind(unsigned Flag)265 static bool isClobberKind(unsigned Flag) { 266 return getKind(Flag) == Kind_Clobber; 267 } 268 269 /// getNumOperandRegisters - Extract the number of registers field from the 270 /// inline asm operand flag. getNumOperandRegisters(unsigned Flag)271 static unsigned getNumOperandRegisters(unsigned Flag) { 272 return (Flag & 0xffff) >> 3; 273 } 274 275 /// isUseOperandTiedToDef - Return true if the flag of the inline asm 276 /// operand indicates it is an use operand that's matched to a def operand. isUseOperandTiedToDef(unsigned Flag,unsigned & Idx)277 static bool isUseOperandTiedToDef(unsigned Flag, unsigned &Idx) { 278 if ((Flag & Flag_MatchingOperand) == 0) 279 return false; 280 Idx = (Flag & ~Flag_MatchingOperand) >> 16; 281 return true; 282 } 283 284 /// hasRegClassConstraint - Returns true if the flag contains a register 285 /// class constraint. Sets RC to the register class ID. hasRegClassConstraint(unsigned Flag,unsigned & RC)286 static bool hasRegClassConstraint(unsigned Flag, unsigned &RC) { 287 if (Flag & Flag_MatchingOperand) 288 return false; 289 unsigned High = Flag >> 16; 290 // getFlagWordForRegClass() uses 0 to mean no register class, and otherwise 291 // stores RC + 1. 292 if (!High) 293 return false; 294 RC = High - 1; 295 return true; 296 } 297 298 }; 299 300 } // End llvm namespace 301 302 #endif 303