1 //===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// \brief Provides AMDGPU specific target descriptions.
12 //
13 //===----------------------------------------------------------------------===//
14 //
15 
16 #ifndef LLVM_LIB_TARGET_R600_MCTARGETDESC_AMDGPUMCTARGETDESC_H
17 #define LLVM_LIB_TARGET_R600_MCTARGETDESC_AMDGPUMCTARGETDESC_H
18 
19 #include "llvm/ADT/StringRef.h"
20 
21 namespace llvm {
22 class MCAsmBackend;
23 class MCCodeEmitter;
24 class MCContext;
25 class MCInstrInfo;
26 class MCObjectWriter;
27 class MCRegisterInfo;
28 class MCSubtargetInfo;
29 class Target;
30 class raw_ostream;
31 
32 extern Target TheAMDGPUTarget;
33 extern Target TheGCNTarget;
34 
35 MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
36                                        const MCRegisterInfo &MRI,
37                                        const MCSubtargetInfo &STI);
38 
39 MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
40                                      const MCRegisterInfo &MRI,
41                                      const MCSubtargetInfo &STI,
42                                      MCContext &Ctx);
43 
44 MCAsmBackend *createAMDGPUAsmBackend(const Target &T, const MCRegisterInfo &MRI,
45                                      StringRef TT, StringRef CPU);
46 
47 MCObjectWriter *createAMDGPUELFObjectWriter(raw_ostream &OS);
48 } // End llvm namespace
49 
50 #define GET_REGINFO_ENUM
51 #include "AMDGPUGenRegisterInfo.inc"
52 
53 #define GET_INSTRINFO_ENUM
54 #include "AMDGPUGenInstrInfo.inc"
55 
56 #define GET_SUBTARGETINFO_ENUM
57 #include "AMDGPUGenSubtargetInfo.inc"
58 
59 #endif
60