1; RUN: opt -S -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck %s -check-prefix=CORE2
2; RUN: opt -S -mtriple=x86_64-apple-darwin -mcpu=corei7 -cost-model -analyze < %s | FileCheck %s -check-prefix=COREI7
3
4; If SSE4.1 roundps instruction is available it is cheap to lower, otherwise
5; it'll be scalarized into calls which are expensive.
6define void @test1(float* nocapture %f) nounwind {
7vector.ph:
8  br label %vector.body
9
10vector.body:                                      ; preds = %vector.body, %vector.ph
11  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
12  %0 = getelementptr inbounds float* %f, i64 %index
13  %1 = bitcast float* %0 to <4 x float>*
14  %wide.load = load <4 x float>* %1, align 4
15  %2 = call <4 x float> @llvm.ceil.v4f32(<4 x float> %wide.load)
16  store <4 x float> %2, <4 x float>* %1, align 4
17  %index.next = add i64 %index, 4
18  %3 = icmp eq i64 %index.next, 1024
19  br i1 %3, label %for.end, label %vector.body
20
21for.end:                                          ; preds = %vector.body
22  ret void
23
24; CORE2: Printing analysis 'Cost Model Analysis' for function 'test1':
25; CORE2: Cost Model: Found an estimated cost of 400 for instruction:   %2 = call <4 x float> @llvm.ceil.v4f32(<4 x float> %wide.load)
26
27; COREI7: Printing analysis 'Cost Model Analysis' for function 'test1':
28; COREI7: Cost Model: Found an estimated cost of 1 for instruction:   %2 = call <4 x float> @llvm.ceil.v4f32(<4 x float> %wide.load)
29
30}
31
32declare <4 x float> @llvm.ceil.v4f32(<4 x float>)  nounwind readnone
33
34define void @test2(float* nocapture %f) nounwind {
35vector.ph:
36  br label %vector.body
37
38vector.body:                                      ; preds = %vector.body, %vector.ph
39  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
40  %0 = getelementptr inbounds float* %f, i64 %index
41  %1 = bitcast float* %0 to <4 x float>*
42  %wide.load = load <4 x float>* %1, align 4
43  %2 = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %wide.load)
44  store <4 x float> %2, <4 x float>* %1, align 4
45  %index.next = add i64 %index, 4
46  %3 = icmp eq i64 %index.next, 1024
47  br i1 %3, label %for.end, label %vector.body
48
49for.end:                                          ; preds = %vector.body
50  ret void
51
52; CORE2: Printing analysis 'Cost Model Analysis' for function 'test2':
53; CORE2: Cost Model: Found an estimated cost of 400 for instruction:   %2 = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %wide.load)
54
55; COREI7: Printing analysis 'Cost Model Analysis' for function 'test2':
56; COREI7: Cost Model: Found an estimated cost of 1 for instruction:   %2 = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %wide.load)
57
58}
59
60declare <4 x float> @llvm.nearbyint.v4f32(<4 x float>)  nounwind readnone
61
62define void @test3(float* nocapture %f, <4 x float> %b, <4 x float> %c) nounwind {
63vector.ph:
64  br label %vector.body
65
66vector.body:                                      ; preds = %vector.body, %vector.ph
67  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
68  %0 = getelementptr inbounds float* %f, i64 %index
69  %1 = bitcast float* %0 to <4 x float>*
70  %wide.load = load <4 x float>* %1, align 4
71  %2 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %b, <4 x float> %c)
72  store <4 x float> %2, <4 x float>* %1, align 4
73  %index.next = add i64 %index, 4
74  %3 = icmp eq i64 %index.next, 1024
75  br i1 %3, label %for.end, label %vector.body
76
77for.end:                                          ; preds = %vector.body
78  ret void
79
80; CORE2: Printing analysis 'Cost Model Analysis' for function 'test3':
81; CORE2: Cost Model: Found an estimated cost of 4 for instruction: %2 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %b, <4 x float> %c)
82
83; COREI7: Printing analysis 'Cost Model Analysis' for function 'test3':
84; COREI7: Cost Model: Found an estimated cost of 4 for instruction: %2 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %b, <4 x float> %c)
85
86}
87
88declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
89