1; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
2; RUN: llc < %s -march=aarch64 -mattr -neon -aarch64-neon-syntax=apple | FileCheck -check-prefix=CHECK-NONEON %s
3
4define i32 @cnt32_advsimd(i32 %x) nounwind readnone {
5  %cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
6  ret i32 %cnt
7; CHECK: fmov	s0, w0
8; CHECK: cnt.8b	v0, v0
9; CHECK: uaddlv.8b	h0, v0
10; CHECK: fmov w0, s0
11; CHECK: ret
12; CHECK-NONEON-LABEL: cnt32_advsimd
13; CHECK-NONEON-NOT: 8b
14; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0x55555555
15; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0x33333333
16; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0xf0f0f0f
17; CHECK-NONEON: mul
18
19}
20
21define i64 @cnt64_advsimd(i64 %x) nounwind readnone {
22  %cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
23  ret i64 %cnt
24; CHECK: fmov	d0, x0
25; CHECK: cnt.8b	v0, v0
26; CHECK: uaddlv.8b	h0, v0
27; CHECK: fmov	w0, s0
28; CHECK: ret
29; CHECK-NONEON-LABEL: cnt64_advsimd
30; CHECK-NONEON-NOT: 8b
31; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0x5555555555555555
32; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0x3333333333333333
33; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0xf0f0f0f0f0f0f0f
34; CHECK-NONEON: mul
35}
36
37; Do not use AdvSIMD when -mno-implicit-float is specified.
38; rdar://9473858
39
40define i32 @cnt32(i32 %x) nounwind readnone noimplicitfloat {
41  %cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
42  ret i32 %cnt
43; CHECK-LABEL: cnt32:
44; CHECK-NOT 16b
45; CHECK: ret
46}
47
48define i64 @cnt64(i64 %x) nounwind readnone noimplicitfloat {
49  %cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
50  ret i64 %cnt
51; CHECK-LABEL: cnt64:
52; CHECK-NOT 16b
53; CHECK: ret
54}
55
56declare i32 @llvm.ctpop.i32(i32) nounwind readnone
57declare i64 @llvm.ctpop.i64(i64) nounwind readnone
58