1; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
2; RUN:    -check-prefix=ALL -check-prefix=GP32
3; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
4; RUN:    -check-prefix=ALL -check-prefix=GP32
5; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
6; RUN:    -check-prefix=ALL -check-prefix=GP32
7; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
8; RUN:    -check-prefix=ALL -check-prefix=GP32
9; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
10; RUN:    -check-prefix=ALL -check-prefix=GP64
11; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
12; RUN:    -check-prefix=ALL -check-prefix=GP64
13; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
14; RUN:    -check-prefix=ALL -check-prefix=GP64
15; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
16; RUN:    -check-prefix=ALL -check-prefix=GP64
17; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
18; RUN:    -check-prefix=ALL -check-prefix=GP64
19
20define signext i1 @and_i1(i1 signext %a, i1 signext %b) {
21entry:
22; ALL-LABEL: and_i1:
23
24  ; ALL:          and     $2, $4, $5
25
26  %r = and i1 %a, %b
27  ret i1 %r
28}
29
30define signext i8 @and_i8(i8 signext %a, i8 signext %b) {
31entry:
32; ALL-LABEL: and_i8:
33
34  ; ALL:          and     $2, $4, $5
35
36  %r = and i8 %a, %b
37  ret i8 %r
38}
39
40define signext i16 @and_i16(i16 signext %a, i16 signext %b) {
41entry:
42; ALL-LABEL: and_i16:
43
44  ; ALL:          and     $2, $4, $5
45
46  %r = and i16 %a, %b
47  ret i16 %r
48}
49
50define signext i32 @and_i32(i32 signext %a, i32 signext %b) {
51entry:
52; ALL-LABEL: and_i32:
53
54  ; GP32:         and     $2, $4, $5
55
56  ; GP64:         and     $[[T0:[0-9]+]], $4, $5
57  ; GP64:         sll     $2, $[[T0]], 0
58
59  %r = and i32 %a, %b
60  ret i32 %r
61}
62
63define signext i64 @and_i64(i64 signext %a, i64 signext %b) {
64entry:
65; ALL-LABEL: and_i64:
66
67  ; GP32:         and     $2, $4, $6
68  ; GP32:         and     $3, $5, $7
69
70  ; GP64:         and     $2, $4, $5
71
72  %r = and i64 %a, %b
73  ret i64 %r
74}
75
76define signext i128 @and_i128(i128 signext %a, i128 signext %b) {
77entry:
78; ALL-LABEL: and_i128:
79
80  ; GP32:         lw      $[[T0:[0-9]+]], 24($sp)
81  ; GP32:         lw      $[[T1:[0-9]+]], 20($sp)
82  ; GP32:         lw      $[[T2:[0-9]+]], 16($sp)
83  ; GP32:         and     $2, $4, $[[T2]]
84  ; GP32:         and     $3, $5, $[[T1]]
85  ; GP32:         and     $4, $6, $[[T0]]
86  ; GP32:         lw      $[[T3:[0-9]+]], 28($sp)
87  ; GP32:         and     $5, $7, $[[T3]]
88
89  ; GP64:         and     $2, $4, $6
90  ; GP64:         and     $3, $5, $7
91
92  %r = and i128 %a, %b
93  ret i128 %r
94}
95