1; RUN: llc -mcpu=a2 < %s | FileCheck %s
2target datalayout = "E-m:e-i64:64-n32:64"
3target triple = "powerpc64-unknown-linux-gnu"
4
5; Function Attrs: nounwind
6define double @foo1(i32* %x) #0 {
7entry:
8  %0 = load i32* %x, align 4
9  %conv = sext i32 %0 to i64
10  %conv1 = sitofp i64 %conv to double
11  ret double %conv1
12
13; CHECK-LABEL: @foo1
14; CHECK: lfiwax [[REG1:[0-9]+]], 0, 3
15; CHECK: fcfid 1, [[REG1]]
16; CHECK: blr
17}
18
19define double @foo2(i32* %x) #0 {
20entry:
21  %0 = load i32* %x, align 4
22  %conv = zext i32 %0 to i64
23  %conv1 = sitofp i64 %conv to double
24  ret double %conv1
25
26; CHECK-LABEL: @foo2
27; CHECK: lfiwzx [[REG1:[0-9]+]], 0, 3
28; CHECK: fcfid 1, [[REG1]]
29; CHECK: blr
30}
31
32define double @foo3(i32* %x) #0 {
33entry:
34  %0 = load i32* %x, align 4
35  %1 = add i32 %0, 8
36  %conv = zext i32 %1 to i64
37  %conv1 = sitofp i64 %conv to double
38  ret double %conv1
39
40; CHECK-LABEL: @foo3
41; CHECK-DAG: lwz [[REG1:[0-9]+]], 0(3)
42; CHECK-DAG: addi [[REG3:[0-9]+]], 1,
43; CHECK-DAG: addi [[REG2:[0-9]+]], [[REG1]], 8
44; CHECK-DAG: stw [[REG2]],
45; CHECK: lfiwzx [[REG4:[0-9]+]], 0, [[REG3]]
46; CHECK: fcfid 1, [[REG4]]
47; CHECK: blr
48}
49
50define double @foo4(i32* %x) #0 {
51entry:
52  %0 = load i32* %x, align 4
53  %1 = add i32 %0, 8
54  %conv = sext i32 %1 to i64
55  %conv1 = sitofp i64 %conv to double
56  ret double %conv1
57
58; CHECK-LABEL: @foo4
59; CHECK-DAG: lwz [[REG1:[0-9]+]], 0(3)
60; CHECK-DAG: addi [[REG3:[0-9]+]], 1,
61; CHECK-DAG: addi [[REG2:[0-9]+]], [[REG1]], 8
62; CHECK-DAG: stw [[REG2]],
63; CHECK: lfiwax [[REG4:[0-9]+]], 0, [[REG3]]
64; CHECK: fcfid 1, [[REG4]]
65; CHECK: blr
66}
67
68attributes #0 = { nounwind }
69
70