1*f4a2713aSLionel Sambuc; RUN: llc -mcpu=yonah < %s 2*f4a2713aSLionel Sambuc; PR9438 3*f4a2713aSLionel Sambuctarget datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" 4*f4a2713aSLionel Sambuctarget triple = "i386-unknown-freebsd9.0" 5*f4a2713aSLionel Sambuc 6*f4a2713aSLionel Sambuc; The 'call fastcc' ties down %ebx, %ecx, and %edx. 7*f4a2713aSLionel Sambuc; A MUL8r ties down %al, leaving no GR32_ABCD registers available. 8*f4a2713aSLionel Sambuc; The coalescer can easily overallocate physical registers, 9*f4a2713aSLionel Sambuc; and register allocation fails. 10*f4a2713aSLionel Sambuc 11*f4a2713aSLionel Sambucdeclare fastcc i8* @save_string(i8* %d, i8* nocapture %s) nounwind 12*f4a2713aSLionel Sambuc 13*f4a2713aSLionel Sambucdefine i32 @cvtchar(i8* nocapture %sp) nounwind { 14*f4a2713aSLionel Sambuc %temp.i = alloca [2 x i8], align 1 15*f4a2713aSLionel Sambuc %tmp1 = load i8* %sp, align 1 16*f4a2713aSLionel Sambuc %div = udiv i8 %tmp1, 10 17*f4a2713aSLionel Sambuc %rem = urem i8 %div, 10 18*f4a2713aSLionel Sambuc %arrayidx.i = getelementptr inbounds [2 x i8]* %temp.i, i32 0, i32 0 19*f4a2713aSLionel Sambuc store i8 %rem, i8* %arrayidx.i, align 1 20*f4a2713aSLionel Sambuc %call.i = call fastcc i8* @save_string(i8* %sp, i8* %arrayidx.i) nounwind 21*f4a2713aSLionel Sambuc ret i32 undef 22*f4a2713aSLionel Sambuc} 23