1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl | FileCheck %s
2
3; 256-bit
4
5; CHECK-LABEL: vpandd256
6; CHECK: vpandd %ymm
7; CHECK: ret
8define <8 x i32> @vpandd256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp {
9entry:
10  ; Force the execution domain with an add.
11  %a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
12  %x = and <8 x i32> %a2, %b
13  ret <8 x i32> %x
14}
15
16; CHECK-LABEL: vpord256
17; CHECK: vpord %ymm
18; CHECK: ret
19define <8 x i32> @vpord256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp {
20entry:
21  ; Force the execution domain with an add.
22  %a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
23  %x = or <8 x i32> %a2, %b
24  ret <8 x i32> %x
25}
26
27; CHECK-LABEL: vpxord256
28; CHECK: vpxord %ymm
29; CHECK: ret
30define <8 x i32> @vpxord256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp {
31entry:
32  ; Force the execution domain with an add.
33  %a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
34  %x = xor <8 x i32> %a2, %b
35  ret <8 x i32> %x
36}
37
38; CHECK-LABEL: vpandq256
39; CHECK: vpandq %ymm
40; CHECK: ret
41define <4 x i64> @vpandq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
42entry:
43  ; Force the execution domain with an add.
44  %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1>
45  %x = and <4 x i64> %a2, %b
46  ret <4 x i64> %x
47}
48
49; CHECK-LABEL: vporq256
50; CHECK: vporq %ymm
51; CHECK: ret
52define <4 x i64> @vporq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
53entry:
54  ; Force the execution domain with an add.
55  %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1>
56  %x = or <4 x i64> %a2, %b
57  ret <4 x i64> %x
58}
59
60; CHECK-LABEL: vpxorq256
61; CHECK: vpxorq %ymm
62; CHECK: ret
63define <4 x i64> @vpxorq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
64entry:
65  ; Force the execution domain with an add.
66  %a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1>
67  %x = xor <4 x i64> %a2, %b
68  ret <4 x i64> %x
69}
70
71; 128-bit
72
73; CHECK-LABEL: vpandd128
74; CHECK: vpandd %xmm
75; CHECK: ret
76define <4 x i32> @vpandd128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp {
77entry:
78  ; Force the execution domain with an add.
79  %a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1>
80  %x = and <4 x i32> %a2, %b
81  ret <4 x i32> %x
82}
83
84; CHECK-LABEL: vpord128
85; CHECK: vpord %xmm
86; CHECK: ret
87define <4 x i32> @vpord128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp {
88entry:
89  ; Force the execution domain with an add.
90  %a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1>
91  %x = or <4 x i32> %a2, %b
92  ret <4 x i32> %x
93}
94
95; CHECK-LABEL: vpxord128
96; CHECK: vpxord %xmm
97; CHECK: ret
98define <4 x i32> @vpxord128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp {
99entry:
100  ; Force the execution domain with an add.
101  %a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1>
102  %x = xor <4 x i32> %a2, %b
103  ret <4 x i32> %x
104}
105
106; CHECK-LABEL: vpandq128
107; CHECK: vpandq %xmm
108; CHECK: ret
109define <2 x i64> @vpandq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
110entry:
111  ; Force the execution domain with an add.
112  %a2 = add <2 x i64> %a, <i64 1, i64 1>
113  %x = and <2 x i64> %a2, %b
114  ret <2 x i64> %x
115}
116
117; CHECK-LABEL: vporq128
118; CHECK: vporq %xmm
119; CHECK: ret
120define <2 x i64> @vporq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
121entry:
122  ; Force the execution domain with an add.
123  %a2 = add <2 x i64> %a, <i64 1, i64 1>
124  %x = or <2 x i64> %a2, %b
125  ret <2 x i64> %x
126}
127
128; CHECK-LABEL: vpxorq128
129; CHECK: vpxorq %xmm
130; CHECK: ret
131define <2 x i64> @vpxorq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
132entry:
133  ; Force the execution domain with an add.
134  %a2 = add <2 x i64> %a, <i64 1, i64 1>
135  %x = xor <2 x i64> %a2, %b
136  ret <2 x i64> %x
137}
138