1; RUN: opt -S -o - -mtriple=armv8-linux-gnueabihf -atomic-expand %s | FileCheck %s 2 3define i8 @test_atomic_xchg_i8(i8* %ptr, i8 %xchgend) { 4; CHECK-LABEL: @test_atomic_xchg_i8 5; CHECK-NOT: fence 6; CHECK: br label %[[LOOP:.*]] 7; CHECK: [[LOOP]]: 8; CHECK: [[OLDVAL32:%.*]] = call i32 @llvm.arm.ldrex.p0i8(i8* %ptr) 9; CHECK: [[OLDVAL:%.*]] = trunc i32 [[OLDVAL32]] to i8 10; CHECK: [[NEWVAL32:%.*]] = zext i8 %xchgend to i32 11; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.strex.p0i8(i32 [[NEWVAL32]], i8* %ptr) 12; CHECK: [[TST:%.*]] = icmp ne i32 [[TRYAGAIN]], 0 13; CHECK: br i1 [[TST]], label %[[LOOP]], label %[[END:.*]] 14; CHECK: [[END]]: 15; CHECK-NOT: fence 16; CHECK: ret i8 [[OLDVAL]] 17 %res = atomicrmw xchg i8* %ptr, i8 %xchgend monotonic 18 ret i8 %res 19} 20 21define i16 @test_atomic_add_i16(i16* %ptr, i16 %addend) { 22; CHECK-LABEL: @test_atomic_add_i16 23; CHECK-NOT: fence 24; CHECK: br label %[[LOOP:.*]] 25; CHECK: [[LOOP]]: 26; CHECK: [[OLDVAL32:%.*]] = call i32 @llvm.arm.ldaex.p0i16(i16* %ptr) 27; CHECK: [[OLDVAL:%.*]] = trunc i32 [[OLDVAL32]] to i16 28; CHECK: [[NEWVAL:%.*]] = add i16 [[OLDVAL]], %addend 29; CHECK: [[NEWVAL32:%.*]] = zext i16 [[NEWVAL]] to i32 30; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* %ptr) 31; CHECK: [[TST:%.*]] = icmp ne i32 [[TRYAGAIN]], 0 32; CHECK: br i1 [[TST]], label %[[LOOP]], label %[[END:.*]] 33; CHECK: [[END]]: 34; CHECK-NOT: fence 35; CHECK: ret i16 [[OLDVAL]] 36 %res = atomicrmw add i16* %ptr, i16 %addend seq_cst 37 ret i16 %res 38} 39 40define i32 @test_atomic_sub_i32(i32* %ptr, i32 %subend) { 41; CHECK-LABEL: @test_atomic_sub_i32 42; CHECK-NOT: fence 43; CHECK: br label %[[LOOP:.*]] 44; CHECK: [[LOOP]]: 45; CHECK: [[OLDVAL:%.*]] = call i32 @llvm.arm.ldaex.p0i32(i32* %ptr) 46; CHECK: [[NEWVAL:%.*]] = sub i32 [[OLDVAL]], %subend 47; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.strex.p0i32(i32 [[NEWVAL]], i32* %ptr) 48; CHECK: [[TST:%.*]] = icmp ne i32 [[TRYAGAIN]], 0 49; CHECK: br i1 [[TST]], label %[[LOOP]], label %[[END:.*]] 50; CHECK: [[END]]: 51; CHECK-NOT: fence 52; CHECK: ret i32 [[OLDVAL]] 53 %res = atomicrmw sub i32* %ptr, i32 %subend acquire 54 ret i32 %res 55} 56 57define i64 @test_atomic_or_i64(i64* %ptr, i64 %orend) { 58; CHECK-LABEL: @test_atomic_or_i64 59; CHECK-NOT: fence 60; CHECK: br label %[[LOOP:.*]] 61; CHECK: [[LOOP]]: 62; CHECK: [[PTR8:%.*]] = bitcast i64* %ptr to i8* 63; CHECK: [[LOHI:%.*]] = call { i32, i32 } @llvm.arm.ldaexd(i8* [[PTR8]]) 64; CHECK: [[LO:%.*]] = extractvalue { i32, i32 } [[LOHI]], 0 65; CHECK: [[HI:%.*]] = extractvalue { i32, i32 } [[LOHI]], 1 66; CHECK: [[LO64:%.*]] = zext i32 [[LO]] to i64 67; CHECK: [[HI64_TMP:%.*]] = zext i32 [[HI]] to i64 68; CHECK: [[HI64:%.*]] = shl i64 [[HI64_TMP]], 32 69; CHECK: [[OLDVAL:%.*]] = or i64 [[LO64]], [[HI64]] 70; CHECK: [[NEWVAL:%.*]] = or i64 [[OLDVAL]], %orend 71; CHECK: [[NEWLO:%.*]] = trunc i64 [[NEWVAL]] to i32 72; CHECK: [[NEWHI_TMP:%.*]] = lshr i64 [[NEWVAL]], 32 73; CHECK: [[NEWHI:%.*]] = trunc i64 [[NEWHI_TMP]] to i32 74; CHECK: [[PTR8:%.*]] = bitcast i64* %ptr to i8* 75; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlexd(i32 [[NEWLO]], i32 [[NEWHI]], i8* [[PTR8]]) 76; CHECK: [[TST:%.*]] = icmp ne i32 [[TRYAGAIN]], 0 77; CHECK: br i1 [[TST]], label %[[LOOP]], label %[[END:.*]] 78; CHECK: [[END]]: 79; CHECK-NOT: fence 80; CHECK: ret i64 [[OLDVAL]] 81 %res = atomicrmw or i64* %ptr, i64 %orend seq_cst 82 ret i64 %res 83} 84 85define i8 @test_cmpxchg_i8_seqcst_seqcst(i8* %ptr, i8 %desired, i8 %newval) { 86; CHECK-LABEL: @test_cmpxchg_i8_seqcst_seqcst 87; CHECK-NOT: fence 88; CHECK: br label %[[LOOP:.*]] 89 90; CHECK: [[LOOP]]: 91; CHECK: [[OLDVAL32:%.*]] = call i32 @llvm.arm.ldaex.p0i8(i8* %ptr) 92; CHECK: [[OLDVAL:%.*]] = trunc i32 %1 to i8 93; CHECK: [[SHOULD_STORE:%.*]] = icmp eq i8 [[OLDVAL]], %desired 94; CHECK: br i1 [[SHOULD_STORE]], label %[[TRY_STORE:.*]], label %[[FAILURE_BB:.*]] 95 96; CHECK: [[TRY_STORE]]: 97; CHECK: [[NEWVAL32:%.*]] = zext i8 %newval to i32 98; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i8(i32 [[NEWVAL32]], i8* %ptr) 99; CHECK: [[TST:%.*]] = icmp eq i32 [[TRYAGAIN]], 0 100; CHECK: br i1 [[TST]], label %[[SUCCESS_BB:.*]], label %[[LOOP]] 101 102; CHECK: [[SUCCESS_BB]]: 103; CHECK-NOT: fence_cst 104; CHECK: br label %[[DONE:.*]] 105 106; CHECK: [[FAILURE_BB]]: 107; CHECK-NOT: fence_cst 108; CHECK: br label %[[DONE]] 109 110; CHECK: [[DONE]]: 111; CHECK: [[SUCCESS:%.*]] = phi i1 [ true, %[[SUCCESS_BB]] ], [ false, %[[FAILURE_BB]] ] 112; CHECK: ret i8 [[OLDVAL]] 113 114 %pairold = cmpxchg i8* %ptr, i8 %desired, i8 %newval seq_cst seq_cst 115 %old = extractvalue { i8, i1 } %pairold, 0 116 ret i8 %old 117} 118 119define i16 @test_cmpxchg_i16_seqcst_monotonic(i16* %ptr, i16 %desired, i16 %newval) { 120; CHECK-LABEL: @test_cmpxchg_i16_seqcst_monotonic 121; CHECK-NOT: fence 122; CHECK: br label %[[LOOP:.*]] 123 124; CHECK: [[LOOP]]: 125; CHECK: [[OLDVAL32:%.*]] = call i32 @llvm.arm.ldaex.p0i16(i16* %ptr) 126; CHECK: [[OLDVAL:%.*]] = trunc i32 %1 to i16 127; CHECK: [[SHOULD_STORE:%.*]] = icmp eq i16 [[OLDVAL]], %desired 128; CHECK: br i1 [[SHOULD_STORE]], label %[[TRY_STORE:.*]], label %[[FAILURE_BB:.*]] 129 130; CHECK: [[TRY_STORE]]: 131; CHECK: [[NEWVAL32:%.*]] = zext i16 %newval to i32 132; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* %ptr) 133; CHECK: [[TST:%.*]] = icmp eq i32 [[TRYAGAIN]], 0 134; CHECK: br i1 [[TST]], label %[[SUCCESS_BB:.*]], label %[[LOOP]] 135 136; CHECK: [[SUCCESS_BB]]: 137; CHECK-NOT: fence 138; CHECK: br label %[[DONE:.*]] 139 140; CHECK: [[FAILURE_BB]]: 141; CHECK-NOT: fence 142; CHECK: br label %[[DONE]] 143 144; CHECK: [[DONE]]: 145; CHECK: [[SUCCESS:%.*]] = phi i1 [ true, %[[SUCCESS_BB]] ], [ false, %[[FAILURE_BB]] ] 146; CHECK: ret i16 [[OLDVAL]] 147 148 %pairold = cmpxchg i16* %ptr, i16 %desired, i16 %newval seq_cst monotonic 149 %old = extractvalue { i16, i1 } %pairold, 0 150 ret i16 %old 151} 152 153define i32 @test_cmpxchg_i32_acquire_acquire(i32* %ptr, i32 %desired, i32 %newval) { 154; CHECK-LABEL: @test_cmpxchg_i32_acquire_acquire 155; CHECK-NOT: fence 156; CHECK: br label %[[LOOP:.*]] 157 158; CHECK: [[LOOP]]: 159; CHECK: [[OLDVAL:%.*]] = call i32 @llvm.arm.ldaex.p0i32(i32* %ptr) 160; CHECK: [[SHOULD_STORE:%.*]] = icmp eq i32 [[OLDVAL]], %desired 161; CHECK: br i1 [[SHOULD_STORE]], label %[[TRY_STORE:.*]], label %[[FAILURE_BB:.*]] 162 163; CHECK: [[TRY_STORE]]: 164; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.strex.p0i32(i32 %newval, i32* %ptr) 165; CHECK: [[TST:%.*]] = icmp eq i32 [[TRYAGAIN]], 0 166; CHECK: br i1 [[TST]], label %[[SUCCESS_BB:.*]], label %[[LOOP]] 167 168; CHECK: [[SUCCESS_BB]]: 169; CHECK-NOT: fence_cst 170; CHECK: br label %[[DONE:.*]] 171 172; CHECK: [[FAILURE_BB]]: 173; CHECK-NOT: fence_cst 174; CHECK: br label %[[DONE]] 175 176; CHECK: [[DONE]]: 177; CHECK: [[SUCCESS:%.*]] = phi i1 [ true, %[[SUCCESS_BB]] ], [ false, %[[FAILURE_BB]] ] 178; CHECK: ret i32 [[OLDVAL]] 179 180 %pairold = cmpxchg i32* %ptr, i32 %desired, i32 %newval acquire acquire 181 %old = extractvalue { i32, i1 } %pairold, 0 182 ret i32 %old 183} 184 185define i64 @test_cmpxchg_i64_monotonic_monotonic(i64* %ptr, i64 %desired, i64 %newval) { 186; CHECK-LABEL: @test_cmpxchg_i64_monotonic_monotonic 187; CHECK-NOT: fence 188; CHECK: br label %[[LOOP:.*]] 189 190; CHECK: [[LOOP]]: 191; CHECK: [[PTR8:%.*]] = bitcast i64* %ptr to i8* 192; CHECK: [[LOHI:%.*]] = call { i32, i32 } @llvm.arm.ldrexd(i8* [[PTR8]]) 193; CHECK: [[LO:%.*]] = extractvalue { i32, i32 } [[LOHI]], 0 194; CHECK: [[HI:%.*]] = extractvalue { i32, i32 } [[LOHI]], 1 195; CHECK: [[LO64:%.*]] = zext i32 [[LO]] to i64 196; CHECK: [[HI64_TMP:%.*]] = zext i32 [[HI]] to i64 197; CHECK: [[HI64:%.*]] = shl i64 [[HI64_TMP]], 32 198; CHECK: [[OLDVAL:%.*]] = or i64 [[LO64]], [[HI64]] 199; CHECK: [[SHOULD_STORE:%.*]] = icmp eq i64 [[OLDVAL]], %desired 200; CHECK: br i1 [[SHOULD_STORE]], label %[[TRY_STORE:.*]], label %[[FAILURE_BB:.*]] 201 202; CHECK: [[TRY_STORE]]: 203; CHECK: [[NEWLO:%.*]] = trunc i64 %newval to i32 204; CHECK: [[NEWHI_TMP:%.*]] = lshr i64 %newval, 32 205; CHECK: [[NEWHI:%.*]] = trunc i64 [[NEWHI_TMP]] to i32 206; CHECK: [[PTR8:%.*]] = bitcast i64* %ptr to i8* 207; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.strexd(i32 [[NEWLO]], i32 [[NEWHI]], i8* [[PTR8]]) 208; CHECK: [[TST:%.*]] = icmp eq i32 [[TRYAGAIN]], 0 209; CHECK: br i1 [[TST]], label %[[SUCCESS_BB:.*]], label %[[LOOP]] 210 211; CHECK: [[SUCCESS_BB]]: 212; CHECK-NOT: fence_cst 213; CHECK: br label %[[DONE:.*]] 214 215; CHECK: [[FAILURE_BB]]: 216; CHECK-NOT: fence_cst 217; CHECK: br label %[[DONE]] 218 219; CHECK: [[DONE]]: 220; CHECK: [[SUCCESS:%.*]] = phi i1 [ true, %[[SUCCESS_BB]] ], [ false, %[[FAILURE_BB]] ] 221; CHECK: ret i64 [[OLDVAL]] 222 223 %pairold = cmpxchg i64* %ptr, i64 %desired, i64 %newval monotonic monotonic 224 %old = extractvalue { i64, i1 } %pairold, 0 225 ret i64 %old 226} 227