1; RUN: opt -simplifycfg -S -o - < %s | FileCheck %s
2
3declare void @func2(i32)
4declare void @func4(i32)
5declare void @func6(i32)
6declare void @func8(i32)
7
8;; test1 - create a switch with case 2 and case 4 from two branches: N == 2
9;; and N == 4.
10define void @test1(i32 %N) nounwind uwtable {
11entry:
12  %cmp = icmp eq i32 %N, 2
13  br i1 %cmp, label %if.then, label %if.else, !prof !0
14; CHECK: test1
15; CHECK: switch i32 %N
16; CHECK: ], !prof !0
17
18if.then:
19  call void @func2(i32 %N) nounwind
20  br label %if.end9
21
22if.else:
23  %cmp2 = icmp eq i32 %N, 4
24  br i1 %cmp2, label %if.then7, label %if.else8, !prof !1
25
26if.then7:
27  call void @func4(i32 %N) nounwind
28  br label %if.end
29
30if.else8:
31  call void @func8(i32 %N) nounwind
32  br label %if.end
33
34if.end:
35  br label %if.end9
36
37if.end9:
38  ret void
39}
40
41;; test2 - Merge two switches where PredDefault == BB.
42define void @test2(i32 %M, i32 %N) nounwind uwtable {
43entry:
44  %cmp = icmp sgt i32 %M, 2
45  br i1 %cmp, label %sw1, label %sw2
46
47sw1:
48  switch i32 %N, label %sw2 [
49    i32 2, label %sw.bb
50    i32 3, label %sw.bb1
51  ], !prof !2
52; CHECK: test2
53; CHECK: switch i32 %N, label %sw.epilog
54; CHECK: i32 2, label %sw.bb
55; CHECK: i32 3, label %sw.bb1
56; CHECK: i32 4, label %sw.bb5
57; CHECK: ], !prof !1
58
59sw.bb:
60  call void @func2(i32 %N) nounwind
61  br label %sw.epilog
62
63sw.bb1:
64  call void @func4(i32 %N) nounwind
65  br label %sw.epilog
66
67sw2:
68;; Here "case 2" is invalidated if control is transferred through default case
69;; of the first switch.
70  switch i32 %N, label %sw.epilog [
71    i32 2, label %sw.bb4
72    i32 4, label %sw.bb5
73  ], !prof !3
74
75sw.bb4:
76  call void @func6(i32 %N) nounwind
77  br label %sw.epilog
78
79sw.bb5:
80  call void @func8(i32 %N) nounwind
81  br label %sw.epilog
82
83sw.epilog:
84  ret void
85}
86
87;; test3 - Merge two switches where PredDefault != BB.
88define void @test3(i32 %M, i32 %N) nounwind uwtable {
89entry:
90  %cmp = icmp sgt i32 %M, 2
91  br i1 %cmp, label %sw1, label %sw2
92
93sw1:
94  switch i32 %N, label %sw.bb [
95    i32 2, label %sw2
96    i32 3, label %sw2
97    i32 1, label %sw.bb1
98  ], !prof !4
99; CHECK: test3
100; CHECK: switch i32 %N, label %sw.bb
101; CHECK: i32 1, label %sw.bb1
102; CHECK: i32 3, label %sw.bb4
103; CHECK: i32 2, label %sw.epilog
104; CHECK: ], !prof !3
105
106sw.bb:
107  call void @func2(i32 %N) nounwind
108  br label %sw.epilog
109
110sw.bb1:
111  call void @func4(i32 %N) nounwind
112  br label %sw.epilog
113
114sw2:
115  switch i32 %N, label %sw.epilog [
116    i32 3, label %sw.bb4
117    i32 4, label %sw.bb5
118  ], !prof !5
119
120sw.bb4:
121  call void @func6(i32 %N) nounwind
122  br label %sw.epilog
123
124sw.bb5:
125  call void @func8(i32 %N) nounwind
126  br label %sw.epilog
127
128sw.epilog:
129  ret void
130}
131
132!0 = !{!"branch_weights", i32 64, i32 4}
133!1 = !{!"branch_weights", i32 4, i32 64}
134; CHECK: !0 = !{!"branch_weights", i32 256, i32 4352, i32 16}
135!2 = !{!"branch_weights", i32 4, i32 4, i32 8}
136!3 = !{!"branch_weights", i32 8, i32 8, i32 4}
137; CHECK: !1 = !{!"branch_weights", i32 32, i32 48, i32 96, i32 16}
138!4 = !{!"branch_weights", i32 7, i32 6, i32 4, i32 3}
139!5 = !{!"branch_weights", i32 17, i32 13, i32 9}
140; CHECK: !3 = !{!"branch_weights", i32 7, i32 3, i32 4, i32 6}
141