1# $NetBSD: Makefile.inc,v 1.27 2014/09/03 19:29:14 matt Exp $ 2 3COMPILER_RT_SRCDIR= ${NETBSDSRCDIR}/sys/external/bsd/compiler_rt/dist 4 5.if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 6COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 7COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 8.else 9COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_CPU} 10COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_ARCH} 11.endif 12 13.if defined(__MINIX) 14LIBC_MACHINE_CPU?= ${MACHINE_CPU} 15.endif # defined(__MINIX) 16 17.PATH: ${COMPILER_RT_CPU_DIR} 18.PATH: ${COMPILER_RT_ARCH_DIR} 19.PATH: ${COMPILER_RT_SRCDIR}/lib/builtins 20.PATH: ${COMPILER_RT_SRCDIR}/lib/profile 21 22# Complex support needs parts of libm 23#GENERIC_SRCS+= 24# mulxc3.c \ 25# mulsc3.c \ 26# divxc3.c \ 27# divdc3.c \ 28# divsc3.c 29 30# Implemented on top of our atomic interface. 31#GENERIC_SRCS+= atomic.c 32 33.if ${HAVE_LIBGCC_EH} == "no" 34GENERIC_SRCS+= \ 35 gcc_personality_v0.c 36.endif 37 38.if 0 39# Conflicts with soft-float 40GENERIC_SRCS+= \ 41 comparedf2.c \ 42 comparesf2.c \ 43 adddf3.c \ 44 addsf3.c \ 45 addtf3.c \ 46 divdf3.c \ 47 divsf3.c \ 48 divtf3.c \ 49 extendsfdf2.c \ 50 extendsftf2.c \ 51 extenddftf2.c \ 52 fixdfsi.c \ 53 fixdfti.c \ 54 fixsfsi.c \ 55 fixsfti.c \ 56 floatsidf.c \ 57 floatsisf.c \ 58 floatunsidf.c \ 59 floatunsisf.c \ 60 muldf3.c \ 61 mulsf3.c \ 62 multf3.c \ 63 subdf3.c \ 64 subsf3.c \ 65 subtf3.c \ 66 truncdfsf2.c \ 67 trunctfdf2.c \ 68 trunctfsf2.c 69.endif 70 71GENERIC_SRCS+= \ 72 absvsi2.c \ 73 absvti2.c \ 74 addvsi3.c \ 75 addvti3.c \ 76 ashlti3.c \ 77 ashrti3.c \ 78 clzti2.c \ 79 cmpti2.c \ 80 ctzti2.c \ 81 divti3.c \ 82 ffsti2.c \ 83 fixsfdi.c \ 84 fixdfdi.c \ 85 fixunsdfdi.c \ 86 fixunsdfsi.c \ 87 fixunssfdi.c \ 88 fixunssfsi.c \ 89 fixunsxfdi.c \ 90 fixunsxfsi.c \ 91 fixxfdi.c \ 92 floatdidf.c \ 93 floatdisf.c \ 94 floatdixf.c \ 95 floatundidf.c \ 96 floatundisf.c \ 97 floatundixf.c \ 98 int_util.c \ 99 lshrti3.c \ 100 modti3.c \ 101 muldc3.c \ 102 mulosi4.c \ 103 muloti4.c \ 104 multi3.c \ 105 mulvsi3.c \ 106 mulvti3.c \ 107 negdf2.c \ 108 negsf2.c \ 109 negti2.c \ 110 negvsi2.c \ 111 negvti2.c \ 112 paritysi2.c \ 113 parityti2.c \ 114 popcountsi2.c \ 115 popcountti2.c \ 116 powidf2.c \ 117 powisf2.c \ 118 powitf2.c \ 119 powixf2.c \ 120 subvsi3.c \ 121 subvti3.c \ 122 ucmpti2.c \ 123 udivmodti4.c \ 124 udivti3.c \ 125 umodti3.c 126 127.if ${MACHINE_ARCH} != "aarch64" 128GENERIC_SRCS+= \ 129 fixunsdfti.c \ 130 fixunssfti.c \ 131 fixunsxfti.c \ 132 fixxfti.c \ 133 floattidf.c \ 134 floattisf.c \ 135 floattixf.c \ 136 floatuntidf.c \ 137 floatuntisf.c \ 138 floatuntixf.c 139.endif 140 141# These have h/w instructions which are always used. 142.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "aarch64" \ 143 && ${LIBC_MACHINE_CPU} != "powerpc" && ${LIBC_MACHINE_CPU} != "or1k" 144GENERIC_SRCS+= \ 145 clzsi2.c 146.endif 147 148# These have h/w instructions which are always used. 149.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_ARCH} != "vax" \ 150 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_CPU} != "powerpc" \ 151 && ${LIBC_MACHINE_CPU} != "or1k" 152GENERIC_SRCS+= \ 153 ctzsi2.c 154.endif 155 156# These have h/w instructions which are always used. 157.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc" \ 158 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_ARCH} != "vax" 159GENERIC_SRCS+= \ 160 divmodsi4.c \ 161 divsi3.c \ 162 modsi3.c \ 163 udivmodsi4.c \ 164 umodsi3.c 165 166. if ${LIBC_MACHINE_CPU} != "sh3" 167# On sh3 __udivsi3 is gcc "millicode" with special calling convention 168# (less registers clobbered than usual). Each DSO that needs it gets 169# its own hidden copy from libgcc.a. 170GENERIC_SRCS+= \ 171 udivsi3.c 172. endif 173.endif 174 175 176GENERIC_SRCS+= \ 177 absvdi2.c \ 178 addvdi3.c \ 179 mulodi4.c \ 180 mulvdi3.c \ 181 negvdi2.c \ 182 paritydi2.c \ 183 popcountdi2.c \ 184 subvdi3.c 185 186# These have h/w instructions which are always used. 187.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc64" \ 188 && ${LIBC_MACHINE_ARCH} != "aarch64" && ${LIBC_MACHINE_CPU} != "or1k" 189GENERIC_SRCS+= \ 190 clzdi2.c \ 191 ctzdi2.c \ 192 ffsdi2.c 193.endif 194 195# Don't need these on 64-bit machines. 196.if empty(LIBC_MACHINE_ARCH:M*64*) && ${LIBC_MACHINE_ARCH} != "alpha" 197GENERIC_SRCS+= \ 198 cmpdi2.c \ 199 ashldi3.c \ 200 ashrdi3.c \ 201 divdi3.c \ 202 divmoddi4.c \ 203 lshrdi3.c \ 204 moddi3.c \ 205 muldi3.c \ 206 negdi2.c \ 207 ucmpdi2.c \ 208 udivdi3.c \ 209 udivmoddi4.c \ 210 umoddi3.c 211.endif 212 213GENERIC_SRCS+= \ 214 GCDAProfiling.c \ 215 InstrProfiling.c \ 216 InstrProfilingBuffer.c \ 217 InstrProfilingFile.c \ 218 InstrProfilingPlatformOther.c 219 220.if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 221GENERIC_SRCS+= \ 222 fixtfdi.c \ 223 fixunstfdi.c \ 224 floatditf.c \ 225 floatunditf.c \ 226 gcc_qadd.c \ 227 gcc_qdiv.c \ 228 gcc_qmul.c \ 229 gcc_qsub.c 230.endif 231 232.if ${LIBC_MACHINE_CPU} == "aarch64" 233GENERIC_SRCS+= \ 234 clear_cache.c 235.endif 236 237.if ${LIBC_MACHINE_CPU} == "arm" 238.if !empty(LIBC_MACHINE_ARCH:Mearm*) 239GENERIC_SRCS+= \ 240 aeabi_idivmod.S \ 241 aeabi_ldivmod.S \ 242 aeabi_uidivmod.S \ 243 aeabi_uldivmod.S 244.endif 245GENERIC_SRCS+= \ 246 clear_cache.c 247# Not yet, overlaps with softfloat 248# aeabi_dcmp.S \ 249# aeabi_fcmp.S 250# Not yet, requires ARMv6 251#GENERIC_SRCS+= \ 252# bswapdi2.S \ 253# bswapsi2.S 254.endif 255 256.for src in ${GENERIC_SRCS} 257. if exists(${COMPILER_RT_CPU_DIR}/${src:R}.S) || \ 258 exists(${COMPILER_RT_ARCH_DIR}/${src:R}.S) 259SRCS+= ${src:R}.S 260. else 261SRCS+= ${src} 262. if ${src:E} != "cc" 263COPTS.${src}+= -Wno-missing-prototypes \ 264 -Wno-old-style-definition \ 265 -Wno-strict-prototypes \ 266 -Wno-uninitialized \ 267 -Wno-cast-qual 268. endif 269. endif 270.endfor 271