1 /* 2 ** File: 3c503.c Dec. 20, 1996 3 ** 4 ** Author: Giovanni Falzoni <gfalzoni@inwind.it> 5 ** 6 ** Driver for the Etherlink II boards. Works in shared memory mode. 7 ** Programmed I/O could be used as well but would result in poor 8 ** performances. This file contains only the board specific code, 9 ** the rest is in 8390.c Code specific for ISA bus only 10 */ 11 12 #include <minix/drivers.h> 13 #include <minix/netdriver.h> 14 #include <net/gen/ether.h> 15 #include <net/gen/eth_io.h> 16 #include "dp.h" 17 18 #if (ENABLE_3C503 == 1) 19 20 #include "8390.h" 21 #include "3c503.h" 22 23 /* 24 ** Name: el2_init 25 ** Function: Initalize hardware and data structures. 26 */ 27 static void el2_init(dpeth_t * dep) 28 { 29 int ix, irq; 30 int sendq_nr; 31 int cntr; 32 33 /* Map the address PROM to lower I/O address range */ 34 cntr = inb_el2(dep, EL2_CNTR); 35 outb_el2(dep, EL2_CNTR, cntr | ECNTR_SAPROM); 36 37 /* Read station address from PROM */ 38 for (ix = EL2_EA0; ix <= EL2_EA5; ix += 1) 39 dep->de_address.ea_addr[ix] = inb_el2(dep, ix); 40 41 /* Map the 8390 back to lower I/O address range */ 42 outb_el2(dep, EL2_CNTR, cntr); 43 44 /* Enable memory, but turn off interrupts until we are ready */ 45 outb_el2(dep, EL2_CFGR, ECFGR_IRQOFF); 46 47 dep->de_data_port = dep->de_dp8390_port = dep->de_base_port; 48 dep->de_prog_IO = FALSE; /* Programmed I/O not yet available */ 49 50 /* Check width of data bus */ 51 outb_el2(dep, DP_CR, CR_PS_P0 | CR_NO_DMA | CR_STP); 52 outb_el2(dep, DP_DCR, 0); 53 outb_el2(dep, DP_CR, CR_PS_P2 | CR_NO_DMA | CR_STP); 54 dep->de_16bit = (inb_el2(dep, DP_DCR) & DCR_WTS) != 0; 55 outb_el2(dep, DP_CR, CR_PS_P0 | CR_NO_DMA | CR_STP); 56 57 /* Allocate one send buffer (1.5kb) per 8kb of on board memory. */ 58 /* Only 8kb of 3c503/16 boards are used to avoid specific routines */ 59 sendq_nr = dep->de_ramsize / 0x2000; 60 if (sendq_nr < 1) 61 sendq_nr = 1; 62 else if (sendq_nr > SENDQ_NR) 63 sendq_nr = SENDQ_NR; 64 65 dep->de_sendq_nr = sendq_nr; 66 for (ix = 0; ix < sendq_nr; ix++) 67 dep->de_sendq[ix].sq_sendpage = (ix * SENDQ_PAGES) + EL2_SM_START_PG; 68 69 dep->de_startpage = (ix * SENDQ_PAGES) + EL2_SM_START_PG; 70 dep->de_stoppage = EL2_SM_STOP_PG; 71 72 outb_el2(dep, EL2_STARTPG, dep->de_startpage); 73 outb_el2(dep, EL2_STOPPG, dep->de_stoppage); 74 75 /* Point the vector pointer registers somewhere ?harmless?. */ 76 outb_el2(dep, EL2_VP2, 0xFF); /* Point at the ROM restart location */ 77 outb_el2(dep, EL2_VP1, 0xFF); /* 0xFFFF:0000 (from original sources) */ 78 outb_el2(dep, EL2_VP0, 0x00); /* - What for protected mode? */ 79 80 /* Set interrupt level for 3c503 */ 81 irq = (dep->de_irq &= ~DEI_DEFAULT); /* Strip the default flag. */ 82 if (irq == 9) irq = 2; 83 if (irq < 2 || irq > 5) panic("bad 3c503 irq configuration: %d", irq); 84 outb_el2(dep, EL2_IDCFG, (0x04 << irq)); 85 86 outb_el2(dep, EL2_DRQCNT, 0x08); /* Set burst size to 8 */ 87 outb_el2(dep, EL2_DMAAH, EL2_SM_START_PG); /* Put start of TX */ 88 outb_el2(dep, EL2_DMAAL, 0x00); /* buffer in the GA DMA reg */ 89 90 outb_el2(dep, EL2_CFGR, ECFGR_NORM); /* Enable shared memory */ 91 92 ns_init(dep); /* Initialize DP controller */ 93 94 printf("%s: Etherlink II%s (%s) at %X:%d:%05lX - ", 95 dep->de_name, dep->de_16bit ? "/16" : "", "3c503", 96 dep->de_base_port, dep->de_irq, 97 dep->de_linmem + dep->de_offset_page); 98 for (ix = 0; ix < SA_ADDR_LEN; ix += 1) 99 printf("%02X%c", dep->de_address.ea_addr[ix], 100 ix < SA_ADDR_LEN - 1 ? ':' : '\n'); 101 } 102 103 /* 104 ** Name: el2_stop 105 ** Function: Stops board by disabling interrupts. 106 */ 107 static void el2_stop(dpeth_t * dep) 108 { 109 110 outb_el2(dep, EL2_CFGR, ECFGR_IRQOFF); 111 sys_irqdisable(&dep->de_hook); /* disable interrupts */ 112 } 113 114 /* 115 ** Name: el2_probe 116 ** Function: Probe for the presence of an EtherLink II card. 117 ** Initialize memory addressing if card detected. 118 */ 119 int el2_probe(dpeth_t * dep) 120 { 121 int iobase, membase; 122 int thin; 123 124 /* Thin ethernet or AUI? */ 125 thin = (dep->de_linmem & 1) ? ECNTR_AUI : ECNTR_THIN; 126 127 /* Location registers should have 1 bit set */ 128 if (!(iobase = inb_el2(dep, EL2_IOBASE))) return FALSE; 129 if (!((membase = inb_el2(dep, EL2_MEMBASE)) & 0xF0)) return FALSE; 130 if ((iobase & (iobase - 1)) || (membase & (membase - 1))) return FALSE; 131 132 /* Resets board */ 133 outb_el2(dep, EL2_CNTR, ECNTR_RESET | thin); 134 micro_delay(1000); 135 outb_el2(dep, EL2_CNTR, thin); 136 micro_delay(5000); 137 138 /* Map the address PROM to lower I/O address range */ 139 outb_el2(dep, EL2_CNTR, ECNTR_SAPROM | thin); 140 if (inb_el2(dep, EL2_EA0) != 0x02 || /* Etherlink II Station address */ 141 inb_el2(dep, EL2_EA1) != 0x60 || /* MUST be 02:60:8c:xx:xx:xx */ 142 inb_el2(dep, EL2_EA2) != 0x8C) 143 return FALSE; /* No Etherlink board at this address */ 144 145 /* Map the 8390 back to lower I/O address range */ 146 outb_el2(dep, EL2_CNTR, thin); 147 148 /* Setup shared memory addressing for 3c503 */ 149 dep->de_linmem = ((membase & 0xC0) ? EL2_BASE_0D8000 : EL2_BASE_0C8000) + 150 ((membase & 0xA0) ? (EL2_BASE_0CC000 - EL2_BASE_0C8000) : 0x0000); 151 152 /* Shared memory starts at 0x2000 (8kb window) */ 153 dep->de_offset_page = (EL2_SM_START_PG * DP_PAGESIZE); 154 dep->de_linmem -= dep->de_offset_page; 155 dep->de_ramsize = (EL2_SM_STOP_PG - EL2_SM_START_PG) * DP_PAGESIZE; 156 157 /* Board initialization and stop functions */ 158 dep->de_initf = el2_init; 159 dep->de_stopf = el2_stop; 160 return TRUE; 161 } 162 #endif /* ENABLE_3C503 */ 163 164 /** 3c503.c **/ 165