1@section Architectures 2BFD keeps one atom in a BFD describing the 3architecture of the data attached to the BFD: a pointer to a 4@code{bfd_arch_info_type}. 5 6Pointers to structures can be requested independently of a BFD 7so that an architecture's information can be interrogated 8without access to an open BFD. 9 10The architecture information is provided by each architecture package. 11The set of default architectures is selected by the macro 12@code{SELECT_ARCHITECTURES}. This is normally set up in the 13@file{config/@var{target}.mt} file of your choice. If the name is not 14defined, then all the architectures supported are included. 15 16When BFD starts up, all the architectures are called with an 17initialize method. It is up to the architecture back end to 18insert as many items into the list of architectures as it wants to; 19generally this would be one for each machine and one for the 20default case (an item with a machine field of 0). 21 22BFD's idea of an architecture is implemented in @file{archures.c}. 23 24@subsection bfd_architecture 25 26 27@strong{Description}@* 28This enum gives the object file's CPU architecture, in a 29global sense---i.e., what processor family does it belong to? 30Another field indicates which processor within 31the family is in use. The machine gives a number which 32distinguishes different versions of the architecture, 33containing, for example, 2 and 3 for Intel i960 KA and i960 KB, 34and 68020 and 68030 for Motorola 68020 and 68030. 35@example 36enum bfd_architecture 37@{ 38 bfd_arch_unknown, /* File arch not known. */ 39 bfd_arch_obscure, /* Arch known, not one of these. */ 40 bfd_arch_m68k, /* Motorola 68xxx */ 41#define bfd_mach_m68000 1 42#define bfd_mach_m68008 2 43#define bfd_mach_m68010 3 44#define bfd_mach_m68020 4 45#define bfd_mach_m68030 5 46#define bfd_mach_m68040 6 47#define bfd_mach_m68060 7 48#define bfd_mach_cpu32 8 49#define bfd_mach_fido 9 50#define bfd_mach_mcf_isa_a_nodiv 10 51#define bfd_mach_mcf_isa_a 11 52#define bfd_mach_mcf_isa_a_mac 12 53#define bfd_mach_mcf_isa_a_emac 13 54#define bfd_mach_mcf_isa_aplus 14 55#define bfd_mach_mcf_isa_aplus_mac 15 56#define bfd_mach_mcf_isa_aplus_emac 16 57#define bfd_mach_mcf_isa_b_nousp 17 58#define bfd_mach_mcf_isa_b_nousp_mac 18 59#define bfd_mach_mcf_isa_b_nousp_emac 19 60#define bfd_mach_mcf_isa_b 20 61#define bfd_mach_mcf_isa_b_mac 21 62#define bfd_mach_mcf_isa_b_emac 22 63#define bfd_mach_mcf_isa_b_float 23 64#define bfd_mach_mcf_isa_b_float_mac 24 65#define bfd_mach_mcf_isa_b_float_emac 25 66#define bfd_mach_mcf_isa_c 26 67#define bfd_mach_mcf_isa_c_mac 27 68#define bfd_mach_mcf_isa_c_emac 28 69#define bfd_mach_mcf_isa_c_nodiv 29 70#define bfd_mach_mcf_isa_c_nodiv_mac 30 71#define bfd_mach_mcf_isa_c_nodiv_emac 31 72 bfd_arch_vax, /* DEC Vax */ 73 bfd_arch_i960, /* Intel 960 */ 74 /* The order of the following is important. 75 lower number indicates a machine type that 76 only accepts a subset of the instructions 77 available to machines with higher numbers. 78 The exception is the "ca", which is 79 incompatible with all other machines except 80 "core". */ 81 82#define bfd_mach_i960_core 1 83#define bfd_mach_i960_ka_sa 2 84#define bfd_mach_i960_kb_sb 3 85#define bfd_mach_i960_mc 4 86#define bfd_mach_i960_xa 5 87#define bfd_mach_i960_ca 6 88#define bfd_mach_i960_jx 7 89#define bfd_mach_i960_hx 8 90 91 bfd_arch_or32, /* OpenRISC 32 */ 92 93 bfd_arch_sparc, /* SPARC */ 94#define bfd_mach_sparc 1 95/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */ 96#define bfd_mach_sparc_sparclet 2 97#define bfd_mach_sparc_sparclite 3 98#define bfd_mach_sparc_v8plus 4 99#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ 100#define bfd_mach_sparc_sparclite_le 6 101#define bfd_mach_sparc_v9 7 102#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ 103#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ 104#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ 105/* Nonzero if MACH has the v9 instruction set. */ 106#define bfd_mach_sparc_v9_p(mach) \ 107 ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \ 108 && (mach) != bfd_mach_sparc_sparclite_le) 109/* Nonzero if MACH is a 64 bit sparc architecture. */ 110#define bfd_mach_sparc_64bit_p(mach) \ 111 ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb) 112 bfd_arch_spu, /* PowerPC SPU */ 113#define bfd_mach_spu 256 114 bfd_arch_mips, /* MIPS Rxxxx */ 115#define bfd_mach_mips3000 3000 116#define bfd_mach_mips3900 3900 117#define bfd_mach_mips4000 4000 118#define bfd_mach_mips4010 4010 119#define bfd_mach_mips4100 4100 120#define bfd_mach_mips4111 4111 121#define bfd_mach_mips4120 4120 122#define bfd_mach_mips4300 4300 123#define bfd_mach_mips4400 4400 124#define bfd_mach_mips4600 4600 125#define bfd_mach_mips4650 4650 126#define bfd_mach_mips5000 5000 127#define bfd_mach_mips5400 5400 128#define bfd_mach_mips5500 5500 129#define bfd_mach_mips6000 6000 130#define bfd_mach_mips7000 7000 131#define bfd_mach_mips8000 8000 132#define bfd_mach_mips9000 9000 133#define bfd_mach_mips10000 10000 134#define bfd_mach_mips12000 12000 135#define bfd_mach_mips16 16 136#define bfd_mach_mips5 5 137#define bfd_mach_mips_loongson_2e 3001 138#define bfd_mach_mips_loongson_2f 3002 139#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */ 140#define bfd_mach_mips_octeon 6501 141#define bfd_mach_mipsisa32 32 142#define bfd_mach_mipsisa32r2 33 143#define bfd_mach_mipsisa64 64 144#define bfd_mach_mipsisa64r2 65 145 bfd_arch_i386, /* Intel 386 */ 146#define bfd_mach_i386_i386 1 147#define bfd_mach_i386_i8086 2 148#define bfd_mach_i386_i386_intel_syntax 3 149#define bfd_mach_x86_64 64 150#define bfd_mach_x86_64_intel_syntax 65 151 bfd_arch_we32k, /* AT&T WE32xxx */ 152 bfd_arch_tahoe, /* CCI/Harris Tahoe */ 153 bfd_arch_i860, /* Intel 860 */ 154 bfd_arch_i370, /* IBM 360/370 Mainframes */ 155 bfd_arch_romp, /* IBM ROMP PC/RT */ 156 bfd_arch_convex, /* Convex */ 157 bfd_arch_m88k, /* Motorola 88xxx */ 158 bfd_arch_m98k, /* Motorola 98xxx */ 159 bfd_arch_pyramid, /* Pyramid Technology */ 160 bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300) */ 161#define bfd_mach_h8300 1 162#define bfd_mach_h8300h 2 163#define bfd_mach_h8300s 3 164#define bfd_mach_h8300hn 4 165#define bfd_mach_h8300sn 5 166#define bfd_mach_h8300sx 6 167#define bfd_mach_h8300sxn 7 168 bfd_arch_pdp11, /* DEC PDP-11 */ 169 bfd_arch_powerpc, /* PowerPC */ 170#define bfd_mach_ppc 32 171#define bfd_mach_ppc64 64 172#define bfd_mach_ppc_403 403 173#define bfd_mach_ppc_403gc 4030 174#define bfd_mach_ppc_505 505 175#define bfd_mach_ppc_601 601 176#define bfd_mach_ppc_602 602 177#define bfd_mach_ppc_603 603 178#define bfd_mach_ppc_ec603e 6031 179#define bfd_mach_ppc_604 604 180#define bfd_mach_ppc_620 620 181#define bfd_mach_ppc_630 630 182#define bfd_mach_ppc_750 750 183#define bfd_mach_ppc_860 860 184#define bfd_mach_ppc_a35 35 185#define bfd_mach_ppc_rs64ii 642 186#define bfd_mach_ppc_rs64iii 643 187#define bfd_mach_ppc_7400 7400 188#define bfd_mach_ppc_e500 500 189#define bfd_mach_ppc_e500mc 5001 190 bfd_arch_rs6000, /* IBM RS/6000 */ 191#define bfd_mach_rs6k 6000 192#define bfd_mach_rs6k_rs1 6001 193#define bfd_mach_rs6k_rsc 6003 194#define bfd_mach_rs6k_rs2 6002 195 bfd_arch_hppa, /* HP PA RISC */ 196#define bfd_mach_hppa10 10 197#define bfd_mach_hppa11 11 198#define bfd_mach_hppa20 20 199#define bfd_mach_hppa20w 25 200 bfd_arch_d10v, /* Mitsubishi D10V */ 201#define bfd_mach_d10v 1 202#define bfd_mach_d10v_ts2 2 203#define bfd_mach_d10v_ts3 3 204 bfd_arch_d30v, /* Mitsubishi D30V */ 205 bfd_arch_dlx, /* DLX */ 206 bfd_arch_m68hc11, /* Motorola 68HC11 */ 207 bfd_arch_m68hc12, /* Motorola 68HC12 */ 208#define bfd_mach_m6812_default 0 209#define bfd_mach_m6812 1 210#define bfd_mach_m6812s 2 211 bfd_arch_z8k, /* Zilog Z8000 */ 212#define bfd_mach_z8001 1 213#define bfd_mach_z8002 2 214 bfd_arch_h8500, /* Renesas H8/500 (formerly Hitachi H8/500) */ 215 bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH) */ 216#define bfd_mach_sh 1 217#define bfd_mach_sh2 0x20 218#define bfd_mach_sh_dsp 0x2d 219#define bfd_mach_sh2a 0x2a 220#define bfd_mach_sh2a_nofpu 0x2b 221#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1 222#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2 223#define bfd_mach_sh2a_or_sh4 0x2a3 224#define bfd_mach_sh2a_or_sh3e 0x2a4 225#define bfd_mach_sh2e 0x2e 226#define bfd_mach_sh3 0x30 227#define bfd_mach_sh3_nommu 0x31 228#define bfd_mach_sh3_dsp 0x3d 229#define bfd_mach_sh3e 0x3e 230#define bfd_mach_sh4 0x40 231#define bfd_mach_sh4_nofpu 0x41 232#define bfd_mach_sh4_nommu_nofpu 0x42 233#define bfd_mach_sh4a 0x4a 234#define bfd_mach_sh4a_nofpu 0x4b 235#define bfd_mach_sh4al_dsp 0x4d 236#define bfd_mach_sh5 0x50 237 bfd_arch_alpha, /* Dec Alpha */ 238#define bfd_mach_alpha_ev4 0x10 239#define bfd_mach_alpha_ev5 0x20 240#define bfd_mach_alpha_ev6 0x30 241 bfd_arch_arm, /* Advanced Risc Machines ARM. */ 242#define bfd_mach_arm_unknown 0 243#define bfd_mach_arm_2 1 244#define bfd_mach_arm_2a 2 245#define bfd_mach_arm_3 3 246#define bfd_mach_arm_3M 4 247#define bfd_mach_arm_4 5 248#define bfd_mach_arm_4T 6 249#define bfd_mach_arm_5 7 250#define bfd_mach_arm_5T 8 251#define bfd_mach_arm_5TE 9 252#define bfd_mach_arm_XScale 10 253#define bfd_mach_arm_ep9312 11 254#define bfd_mach_arm_iWMMXt 12 255#define bfd_mach_arm_iWMMXt2 13 256 bfd_arch_ns32k, /* National Semiconductors ns32000 */ 257 bfd_arch_w65, /* WDC 65816 */ 258 bfd_arch_tic30, /* Texas Instruments TMS320C30 */ 259 bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */ 260#define bfd_mach_tic3x 30 261#define bfd_mach_tic4x 40 262 bfd_arch_tic54x, /* Texas Instruments TMS320C54X */ 263 bfd_arch_tic80, /* TI TMS320c80 (MVP) */ 264 bfd_arch_v850, /* NEC V850 */ 265#define bfd_mach_v850 1 266#define bfd_mach_v850e 'E' 267#define bfd_mach_v850e1 '1' 268 bfd_arch_arc, /* ARC Cores */ 269#define bfd_mach_arc_5 5 270#define bfd_mach_arc_6 6 271#define bfd_mach_arc_7 7 272#define bfd_mach_arc_8 8 273 bfd_arch_m32c, /* Renesas M16C/M32C. */ 274#define bfd_mach_m16c 0x75 275#define bfd_mach_m32c 0x78 276 bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D) */ 277#define bfd_mach_m32r 1 /* For backwards compatibility. */ 278#define bfd_mach_m32rx 'x' 279#define bfd_mach_m32r2 '2' 280 bfd_arch_mn10200, /* Matsushita MN10200 */ 281 bfd_arch_mn10300, /* Matsushita MN10300 */ 282#define bfd_mach_mn10300 300 283#define bfd_mach_am33 330 284#define bfd_mach_am33_2 332 285 bfd_arch_fr30, 286#define bfd_mach_fr30 0x46523330 287 bfd_arch_frv, 288#define bfd_mach_frv 1 289#define bfd_mach_frvsimple 2 290#define bfd_mach_fr300 300 291#define bfd_mach_fr400 400 292#define bfd_mach_fr450 450 293#define bfd_mach_frvtomcat 499 /* fr500 prototype */ 294#define bfd_mach_fr500 500 295#define bfd_mach_fr550 550 296 bfd_arch_mcore, 297 bfd_arch_mep, 298#define bfd_mach_mep 1 299#define bfd_mach_mep_h1 0x6831 300 bfd_arch_ia64, /* HP/Intel ia64 */ 301#define bfd_mach_ia64_elf64 64 302#define bfd_mach_ia64_elf32 32 303 bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ 304#define bfd_mach_ip2022 1 305#define bfd_mach_ip2022ext 2 306 bfd_arch_iq2000, /* Vitesse IQ2000. */ 307#define bfd_mach_iq2000 1 308#define bfd_mach_iq10 2 309 bfd_arch_mt, 310#define bfd_mach_ms1 1 311#define bfd_mach_mrisc2 2 312#define bfd_mach_ms2 3 313 bfd_arch_pj, 314 bfd_arch_avr, /* Atmel AVR microcontrollers. */ 315#define bfd_mach_avr1 1 316#define bfd_mach_avr2 2 317#define bfd_mach_avr25 25 318#define bfd_mach_avr3 3 319#define bfd_mach_avr31 31 320#define bfd_mach_avr35 35 321#define bfd_mach_avr4 4 322#define bfd_mach_avr5 5 323#define bfd_mach_avr51 51 324#define bfd_mach_avr6 6 325 bfd_arch_bfin, /* ADI Blackfin */ 326#define bfd_mach_bfin 1 327 bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */ 328#define bfd_mach_cr16 1 329 bfd_arch_cr16c, /* National Semiconductor CompactRISC. */ 330#define bfd_mach_cr16c 1 331 bfd_arch_crx, /* National Semiconductor CRX. */ 332#define bfd_mach_crx 1 333 bfd_arch_cris, /* Axis CRIS */ 334#define bfd_mach_cris_v0_v10 255 335#define bfd_mach_cris_v32 32 336#define bfd_mach_cris_v10_v32 1032 337 bfd_arch_s390, /* IBM s390 */ 338#define bfd_mach_s390_31 31 339#define bfd_mach_s390_64 64 340 bfd_arch_score, /* Sunplus score */ 341 bfd_arch_openrisc, /* OpenRISC */ 342 bfd_arch_mmix, /* Donald Knuth's educational processor. */ 343 bfd_arch_xstormy16, 344#define bfd_mach_xstormy16 1 345 bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */ 346#define bfd_mach_msp11 11 347#define bfd_mach_msp110 110 348#define bfd_mach_msp12 12 349#define bfd_mach_msp13 13 350#define bfd_mach_msp14 14 351#define bfd_mach_msp15 15 352#define bfd_mach_msp16 16 353#define bfd_mach_msp21 21 354#define bfd_mach_msp31 31 355#define bfd_mach_msp32 32 356#define bfd_mach_msp33 33 357#define bfd_mach_msp41 41 358#define bfd_mach_msp42 42 359#define bfd_mach_msp43 43 360#define bfd_mach_msp44 44 361 bfd_arch_xc16x, /* Infineon's XC16X Series. */ 362#define bfd_mach_xc16x 1 363#define bfd_mach_xc16xl 2 364#define bfd_mach_xc16xs 3 365 bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ 366#define bfd_mach_xtensa 1 367 bfd_arch_maxq, /* Dallas MAXQ 10/20 */ 368#define bfd_mach_maxq10 10 369#define bfd_mach_maxq20 20 370 bfd_arch_z80, 371#define bfd_mach_z80strict 1 /* No undocumented opcodes. */ 372#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */ 373#define bfd_mach_z80full 7 /* All undocumented instructions. */ 374#define bfd_mach_r800 11 /* R800: successor with multiplication. */ 375 bfd_arch_last 376 @}; 377@end example 378 379@subsection bfd_arch_info 380 381 382@strong{Description}@* 383This structure contains information on architectures for use 384within BFD. 385@example 386 387typedef struct bfd_arch_info 388@{ 389 int bits_per_word; 390 int bits_per_address; 391 int bits_per_byte; 392 enum bfd_architecture arch; 393 unsigned long mach; 394 const char *arch_name; 395 const char *printable_name; 396 unsigned int section_align_power; 397 /* TRUE if this is the default machine for the architecture. 398 The default arch should be the first entry for an arch so that 399 all the entries for that arch can be accessed via @code{next}. */ 400 bfd_boolean the_default; 401 const struct bfd_arch_info * (*compatible) 402 (const struct bfd_arch_info *a, const struct bfd_arch_info *b); 403 404 bfd_boolean (*scan) (const struct bfd_arch_info *, const char *); 405 406 const struct bfd_arch_info *next; 407@} 408bfd_arch_info_type; 409 410@end example 411 412@findex bfd_printable_name 413@subsubsection @code{bfd_printable_name} 414@strong{Synopsis} 415@example 416const char *bfd_printable_name (bfd *abfd); 417@end example 418@strong{Description}@* 419Return a printable string representing the architecture and machine 420from the pointer to the architecture info structure. 421 422@findex bfd_scan_arch 423@subsubsection @code{bfd_scan_arch} 424@strong{Synopsis} 425@example 426const bfd_arch_info_type *bfd_scan_arch (const char *string); 427@end example 428@strong{Description}@* 429Figure out if BFD supports any cpu which could be described with 430the name @var{string}. Return a pointer to an @code{arch_info} 431structure if a machine is found, otherwise NULL. 432 433@findex bfd_arch_list 434@subsubsection @code{bfd_arch_list} 435@strong{Synopsis} 436@example 437const char **bfd_arch_list (void); 438@end example 439@strong{Description}@* 440Return a freshly malloced NULL-terminated vector of the names 441of all the valid BFD architectures. Do not modify the names. 442 443@findex bfd_arch_get_compatible 444@subsubsection @code{bfd_arch_get_compatible} 445@strong{Synopsis} 446@example 447const bfd_arch_info_type *bfd_arch_get_compatible 448 (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns); 449@end example 450@strong{Description}@* 451Determine whether two BFDs' architectures and machine types 452are compatible. Calculates the lowest common denominator 453between the two architectures and machine types implied by 454the BFDs and returns a pointer to an @code{arch_info} structure 455describing the compatible machine. 456 457@findex bfd_default_arch_struct 458@subsubsection @code{bfd_default_arch_struct} 459@strong{Description}@* 460The @code{bfd_default_arch_struct} is an item of 461@code{bfd_arch_info_type} which has been initialized to a fairly 462generic state. A BFD starts life by pointing to this 463structure, until the correct back end has determined the real 464architecture of the file. 465@example 466extern const bfd_arch_info_type bfd_default_arch_struct; 467@end example 468 469@findex bfd_set_arch_info 470@subsubsection @code{bfd_set_arch_info} 471@strong{Synopsis} 472@example 473void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg); 474@end example 475@strong{Description}@* 476Set the architecture info of @var{abfd} to @var{arg}. 477 478@findex bfd_default_set_arch_mach 479@subsubsection @code{bfd_default_set_arch_mach} 480@strong{Synopsis} 481@example 482bfd_boolean bfd_default_set_arch_mach 483 (bfd *abfd, enum bfd_architecture arch, unsigned long mach); 484@end example 485@strong{Description}@* 486Set the architecture and machine type in BFD @var{abfd} 487to @var{arch} and @var{mach}. Find the correct 488pointer to a structure and insert it into the @code{arch_info} 489pointer. 490 491@findex bfd_get_arch 492@subsubsection @code{bfd_get_arch} 493@strong{Synopsis} 494@example 495enum bfd_architecture bfd_get_arch (bfd *abfd); 496@end example 497@strong{Description}@* 498Return the enumerated type which describes the BFD @var{abfd}'s 499architecture. 500 501@findex bfd_get_mach 502@subsubsection @code{bfd_get_mach} 503@strong{Synopsis} 504@example 505unsigned long bfd_get_mach (bfd *abfd); 506@end example 507@strong{Description}@* 508Return the long type which describes the BFD @var{abfd}'s 509machine. 510 511@findex bfd_arch_bits_per_byte 512@subsubsection @code{bfd_arch_bits_per_byte} 513@strong{Synopsis} 514@example 515unsigned int bfd_arch_bits_per_byte (bfd *abfd); 516@end example 517@strong{Description}@* 518Return the number of bits in one of the BFD @var{abfd}'s 519architecture's bytes. 520 521@findex bfd_arch_bits_per_address 522@subsubsection @code{bfd_arch_bits_per_address} 523@strong{Synopsis} 524@example 525unsigned int bfd_arch_bits_per_address (bfd *abfd); 526@end example 527@strong{Description}@* 528Return the number of bits in one of the BFD @var{abfd}'s 529architecture's addresses. 530 531@findex bfd_default_compatible 532@subsubsection @code{bfd_default_compatible} 533@strong{Synopsis} 534@example 535const bfd_arch_info_type *bfd_default_compatible 536 (const bfd_arch_info_type *a, const bfd_arch_info_type *b); 537@end example 538@strong{Description}@* 539The default function for testing for compatibility. 540 541@findex bfd_default_scan 542@subsubsection @code{bfd_default_scan} 543@strong{Synopsis} 544@example 545bfd_boolean bfd_default_scan 546 (const struct bfd_arch_info *info, const char *string); 547@end example 548@strong{Description}@* 549The default function for working out whether this is an 550architecture hit and a machine hit. 551 552@findex bfd_get_arch_info 553@subsubsection @code{bfd_get_arch_info} 554@strong{Synopsis} 555@example 556const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd); 557@end example 558@strong{Description}@* 559Return the architecture info struct in @var{abfd}. 560 561@findex bfd_lookup_arch 562@subsubsection @code{bfd_lookup_arch} 563@strong{Synopsis} 564@example 565const bfd_arch_info_type *bfd_lookup_arch 566 (enum bfd_architecture arch, unsigned long machine); 567@end example 568@strong{Description}@* 569Look for the architecture info structure which matches the 570arguments @var{arch} and @var{machine}. A machine of 0 matches the 571machine/architecture structure which marks itself as the 572default. 573 574@findex bfd_printable_arch_mach 575@subsubsection @code{bfd_printable_arch_mach} 576@strong{Synopsis} 577@example 578const char *bfd_printable_arch_mach 579 (enum bfd_architecture arch, unsigned long machine); 580@end example 581@strong{Description}@* 582Return a printable string representing the architecture and 583machine type. 584 585This routine is depreciated. 586 587@findex bfd_octets_per_byte 588@subsubsection @code{bfd_octets_per_byte} 589@strong{Synopsis} 590@example 591unsigned int bfd_octets_per_byte (bfd *abfd); 592@end example 593@strong{Description}@* 594Return the number of octets (8-bit quantities) per target byte 595(minimum addressable unit). In most cases, this will be one, but some 596DSP targets have 16, 32, or even 48 bits per byte. 597 598@findex bfd_arch_mach_octets_per_byte 599@subsubsection @code{bfd_arch_mach_octets_per_byte} 600@strong{Synopsis} 601@example 602unsigned int bfd_arch_mach_octets_per_byte 603 (enum bfd_architecture arch, unsigned long machine); 604@end example 605@strong{Description}@* 606See bfd_octets_per_byte. 607 608This routine is provided for those cases where a bfd * is not 609available 610 611