1 /* tc-avr.c -- Assembler code for the ATMEL AVR 2 3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008 4 Free Software Foundation, Inc. 5 Contributed by Denis Chertykov <denisc@overta.ru> 6 7 This file is part of GAS, the GNU Assembler. 8 9 GAS is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 GAS is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with GAS; see the file COPYING. If not, write to 21 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 22 Boston, MA 02110-1301, USA. */ 23 24 #include "as.h" 25 #include "safe-ctype.h" 26 #include "subsegs.h" 27 28 struct avr_opcodes_s 29 { 30 char * name; 31 char * constraints; 32 int insn_size; /* In words. */ 33 int isa; 34 unsigned int bin_opcode; 35 }; 36 37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ 38 {#NAME, CONSTR, SIZE, ISA, BIN}, 39 40 struct avr_opcodes_s avr_opcodes[] = 41 { 42 #include "opcode/avr.h" 43 {NULL, NULL, 0, 0, 0} 44 }; 45 46 const char comment_chars[] = ";"; 47 const char line_comment_chars[] = "#"; 48 const char line_separator_chars[] = "$"; 49 50 const char *md_shortopts = "m:"; 51 struct mcu_type_s 52 { 53 char *name; 54 int isa; 55 int mach; 56 }; 57 58 /* XXX - devices that don't seem to exist (renamed, replaced with larger 59 ones, or planned but never produced), left here for compatibility. */ 60 61 static struct mcu_type_s mcu_types[] = 62 { 63 {"avr1", AVR_ISA_AVR1, bfd_mach_avr1}, 64 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2, 65 but set to AVR_ISA_AVR25 for some following version 66 of GCC (from 4.3) for backward compatibility. */ 67 {"avr2", AVR_ISA_AVR25, bfd_mach_avr2}, 68 {"avr25", AVR_ISA_AVR25, bfd_mach_avr25}, 69 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3, 70 but set to AVR_ISA_AVR3_ALL for some following version 71 of GCC (from 4.3) for backward compatibility. */ 72 {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3}, 73 {"avr31", AVR_ISA_AVR31, bfd_mach_avr31}, 74 {"avr35", AVR_ISA_AVR35, bfd_mach_avr35}, 75 {"avr4", AVR_ISA_AVR4, bfd_mach_avr4}, 76 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5, 77 but set to AVR_ISA_AVR51 for some following version 78 of GCC (from 4.3) for backward compatibility. */ 79 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5}, 80 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51}, 81 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6}, 82 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, 83 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1}, 84 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1}, 85 {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1}, 86 {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1}, 87 {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2}, 88 {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2}, 89 {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */ 90 {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2}, 91 {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */ 92 {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2}, 93 {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */ 94 {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2}, 95 {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */ 96 {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2}, 97 {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2}, 98 {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2}, 99 {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25}, 100 {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25}, 101 {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25}, 102 {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25}, 103 {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25}, 104 {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25}, 105 {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25}, 106 {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25}, 107 {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25}, 108 {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25}, 109 {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25}, 110 {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25}, 111 {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25}, 112 {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25}, 113 {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25}, 114 {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25}, 115 {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3}, 116 {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3}, 117 {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31}, 118 {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31}, 119 {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35}, 120 {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35}, 121 {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35}, 122 {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, 123 {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4}, 124 {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4}, 125 {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4}, 126 {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4}, 127 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4}, 128 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4}, 129 {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4}, 130 {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4}, 131 {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4}, 132 {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4}, 133 {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4}, 134 {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4}, 135 {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5}, 136 {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, 137 {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5}, 138 {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, 139 {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5}, 140 {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5}, 141 {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5}, 142 {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5}, 143 {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5}, 144 {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5}, 145 {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5}, 146 {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5}, 147 {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5}, 148 {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5}, 149 {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5}, 150 {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5}, 151 {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5}, 152 {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5}, 153 {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5}, 154 {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5}, 155 {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5}, 156 {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5}, 157 {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5}, 158 {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5}, 159 {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5}, 160 {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5}, 161 {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5}, 162 {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5}, 163 {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5}, 164 {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5}, 165 {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5}, 166 {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5}, 167 {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5}, 168 {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5}, 169 {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5}, 170 {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5}, 171 {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5}, 172 {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5}, 173 {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5}, 174 {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5}, 175 {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5}, 176 {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5}, 177 {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5}, 178 {"at94k", AVR_ISA_94K, bfd_mach_avr5}, 179 {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51}, 180 {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51}, 181 {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51}, 182 {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51}, 183 {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51}, 184 {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51}, 185 {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51}, 186 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6}, 187 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6}, 188 {NULL, 0, 0} 189 }; 190 191 /* Current MCU type. */ 192 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2}; 193 static struct mcu_type_s * avr_mcu = & default_mcu; 194 195 /* AVR target-specific switches. */ 196 struct avr_opt_s 197 { 198 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */ 199 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */ 200 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */ 201 }; 202 203 static struct avr_opt_s avr_opt = { 0, 0, 0 }; 204 205 const char EXP_CHARS[] = "eE"; 206 const char FLT_CHARS[] = "dD"; 207 208 static void avr_set_arch (int); 209 210 /* The target specific pseudo-ops which we support. */ 211 const pseudo_typeS md_pseudo_table[] = 212 { 213 {"arch", avr_set_arch, 0}, 214 { NULL, NULL, 0} 215 }; 216 217 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) 218 219 #define EXP_MOD_NAME(i) exp_mod[i].name 220 #define EXP_MOD_RELOC(i) exp_mod[i].reloc 221 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc 222 #define HAVE_PM_P(i) exp_mod[i].have_pm 223 224 struct exp_mod_s 225 { 226 char * name; 227 bfd_reloc_code_real_type reloc; 228 bfd_reloc_code_real_type neg_reloc; 229 int have_pm; 230 }; 231 232 static struct exp_mod_s exp_mod[] = 233 { 234 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, 235 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, 236 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, 237 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, 238 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, 239 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, 240 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0}, 241 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0}, 242 }; 243 244 /* A union used to store indicies into the exp_mod[] array 245 in a hash table which expects void * data types. */ 246 typedef union 247 { 248 void * ptr; 249 int index; 250 } mod_index; 251 252 /* Opcode hash table. */ 253 static struct hash_control *avr_hash; 254 255 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ 256 static struct hash_control *avr_mod_hash; 257 258 #define OPTION_MMCU 'm' 259 enum options 260 { 261 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1, 262 OPTION_NO_SKIP_BUG, 263 OPTION_NO_WRAP 264 }; 265 266 struct option md_longopts[] = 267 { 268 { "mmcu", required_argument, NULL, OPTION_MMCU }, 269 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, 270 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, 271 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, 272 { NULL, no_argument, NULL, 0 } 273 }; 274 275 size_t md_longopts_size = sizeof (md_longopts); 276 277 /* Display nicely formatted list of known MCU names. */ 278 279 static void 280 show_mcu_list (FILE *stream) 281 { 282 int i, x; 283 284 fprintf (stream, _("Known MCU names:")); 285 x = 1000; 286 287 for (i = 0; mcu_types[i].name; i++) 288 { 289 int len = strlen (mcu_types[i].name); 290 291 x += len + 1; 292 293 if (x < 75) 294 fprintf (stream, " %s", mcu_types[i].name); 295 else 296 { 297 fprintf (stream, "\n %s", mcu_types[i].name); 298 x = len + 2; 299 } 300 } 301 302 fprintf (stream, "\n"); 303 } 304 305 static inline char * 306 skip_space (char *s) 307 { 308 while (*s == ' ' || *s == '\t') 309 ++s; 310 return s; 311 } 312 313 /* Extract one word from FROM and copy it to TO. */ 314 315 static char * 316 extract_word (char *from, char *to, int limit) 317 { 318 char *op_start; 319 char *op_end; 320 int size = 0; 321 322 /* Drop leading whitespace. */ 323 from = skip_space (from); 324 *to = 0; 325 326 /* Find the op code end. */ 327 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);) 328 { 329 to[size++] = *op_end++; 330 if (size + 1 >= limit) 331 break; 332 } 333 334 to[size] = 0; 335 return op_end; 336 } 337 338 int 339 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 340 asection *seg ATTRIBUTE_UNUSED) 341 { 342 abort (); 343 return 0; 344 } 345 346 void 347 md_show_usage (FILE *stream) 348 { 349 fprintf (stream, 350 _("AVR options:\n" 351 " -mmcu=[avr-name] select microcontroller variant\n" 352 " [avr-name] can be:\n" 353 " avr1 - classic AVR core without data RAM\n" 354 " avr2 - classic AVR core with up to 8K program memory\n" 355 " avr25 - classic AVR core with up to 8K program memory\n" 356 " plus the MOVW instruction\n" 357 " avr3 - classic AVR core with up to 64K program memory\n" 358 " avr31 - classic AVR core with up to 128K program memory\n" 359 " avr35 - classic AVR core with up to 64K program memory\n" 360 " plus the MOVW instruction\n" 361 " avr4 - enhanced AVR core with up to 8K program memory\n" 362 " avr5 - enhanced AVR core with up to 64K program memory\n" 363 " avr51 - enhanced AVR core with up to 128K program memory\n" 364 " avr6 - enhanced AVR core with up to 256K program memory\n" 365 " or immediate microcontroller name.\n")); 366 fprintf (stream, 367 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" 368 " -mno-skip-bug disable warnings for skipping two-word instructions\n" 369 " (default for avr4, avr5)\n" 370 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" 371 " (default for avr3, avr5)\n")); 372 show_mcu_list (stream); 373 } 374 375 static void 376 avr_set_arch (int dummy ATTRIBUTE_UNUSED) 377 { 378 char str[20]; 379 380 input_line_pointer = extract_word (input_line_pointer, str, 20); 381 md_parse_option (OPTION_MMCU, str); 382 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); 383 } 384 385 int 386 md_parse_option (int c, char *arg) 387 { 388 switch (c) 389 { 390 case OPTION_MMCU: 391 { 392 int i; 393 char *s = alloca (strlen (arg) + 1); 394 395 { 396 char *t = s; 397 char *arg1 = arg; 398 399 do 400 *t = TOLOWER (*arg1++); 401 while (*t++); 402 } 403 404 for (i = 0; mcu_types[i].name; ++i) 405 if (strcmp (mcu_types[i].name, s) == 0) 406 break; 407 408 if (!mcu_types[i].name) 409 { 410 show_mcu_list (stderr); 411 as_fatal (_("unknown MCU: %s\n"), arg); 412 } 413 414 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine 415 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well 416 as .arch ... in the asm output at the same time. */ 417 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) 418 avr_mcu = &mcu_types[i]; 419 else 420 as_fatal (_("redefinition of mcu type `%s' to `%s'"), 421 avr_mcu->name, mcu_types[i].name); 422 return 1; 423 } 424 case OPTION_ALL_OPCODES: 425 avr_opt.all_opcodes = 1; 426 return 1; 427 case OPTION_NO_SKIP_BUG: 428 avr_opt.no_skip_bug = 1; 429 return 1; 430 case OPTION_NO_WRAP: 431 avr_opt.no_wrap = 1; 432 return 1; 433 } 434 435 return 0; 436 } 437 438 symbolS * 439 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 440 { 441 return NULL; 442 } 443 444 char * 445 md_atof (int type, char *litP, int *sizeP) 446 { 447 return ieee_md_atof (type, litP, sizeP, FALSE); 448 } 449 450 void 451 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 452 asection *sec ATTRIBUTE_UNUSED, 453 fragS *fragP ATTRIBUTE_UNUSED) 454 { 455 abort (); 456 } 457 458 void 459 md_begin (void) 460 { 461 unsigned int i; 462 struct avr_opcodes_s *opcode; 463 464 avr_hash = hash_new (); 465 466 /* Insert unique names into hash table. This hash table then provides a 467 quick index to the first opcode with a particular name in the opcode 468 table. */ 469 for (opcode = avr_opcodes; opcode->name; opcode++) 470 hash_insert (avr_hash, opcode->name, (char *) opcode); 471 472 avr_mod_hash = hash_new (); 473 474 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i) 475 { 476 mod_index m; 477 478 m.index = i + 10; 479 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr); 480 } 481 482 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); 483 } 484 485 /* Resolve STR as a constant expression and return the result. 486 If result greater than MAX then error. */ 487 488 static unsigned int 489 avr_get_constant (char *str, int max) 490 { 491 expressionS ex; 492 493 str = skip_space (str); 494 input_line_pointer = str; 495 expression (& ex); 496 497 if (ex.X_op != O_constant) 498 as_bad (_("constant value required")); 499 500 if (ex.X_add_number > max || ex.X_add_number < 0) 501 as_bad (_("number must be positive and less than %d"), max + 1); 502 503 return ex.X_add_number; 504 } 505 506 /* Parse for ldd/std offset. */ 507 508 static void 509 avr_offset_expression (expressionS *exp) 510 { 511 char *str = input_line_pointer; 512 char *tmp; 513 char op[8]; 514 515 tmp = str; 516 str = extract_word (str, op, sizeof (op)); 517 518 input_line_pointer = tmp; 519 expression (exp); 520 521 /* Warn about expressions that fail to use lo8 (). */ 522 if (exp->X_op == O_constant) 523 { 524 int x = exp->X_add_number; 525 526 if (x < -255 || x > 255) 527 as_warn (_("constant out of 8-bit range: %d"), x); 528 } 529 } 530 531 /* Parse ordinary expression. */ 532 533 static char * 534 parse_exp (char *s, expressionS *op) 535 { 536 input_line_pointer = s; 537 expression (op); 538 if (op->X_op == O_absent) 539 as_bad (_("missing operand")); 540 return input_line_pointer; 541 } 542 543 /* Parse special expressions (needed for LDI command): 544 xx8 (address) 545 xx8 (-address) 546 pm_xx8 (address) 547 pm_xx8 (-address) 548 where xx is: hh, hi, lo. */ 549 550 static bfd_reloc_code_real_type 551 avr_ldi_expression (expressionS *exp) 552 { 553 char *str = input_line_pointer; 554 char *tmp; 555 char op[8]; 556 int mod; 557 int linker_stubs_should_be_generated = 0; 558 559 tmp = str; 560 561 str = extract_word (str, op, sizeof (op)); 562 563 if (op[0]) 564 { 565 mod_index m; 566 567 m.ptr = hash_find (avr_mod_hash, op); 568 mod = m.index; 569 570 if (mod) 571 { 572 int closes = 0; 573 574 mod -= 10; 575 str = skip_space (str); 576 577 if (*str == '(') 578 { 579 bfd_reloc_code_real_type reloc_to_return; 580 int neg_p = 0; 581 582 ++str; 583 584 if (strncmp ("pm(", str, 3) == 0 585 || strncmp ("gs(",str,3) == 0 586 || strncmp ("-(gs(",str,5) == 0 587 || strncmp ("-(pm(", str, 5) == 0) 588 { 589 if (HAVE_PM_P (mod)) 590 { 591 ++mod; 592 ++closes; 593 } 594 else 595 as_bad (_("illegal expression")); 596 597 if (str[0] == 'g' || str[2] == 'g') 598 linker_stubs_should_be_generated = 1; 599 600 if (*str == '-') 601 { 602 neg_p = 1; 603 ++closes; 604 str += 5; 605 } 606 else 607 str += 3; 608 } 609 610 if (*str == '-' && *(str + 1) == '(') 611 { 612 neg_p ^= 1; 613 ++closes; 614 str += 2; 615 } 616 617 input_line_pointer = str; 618 expression (exp); 619 620 do 621 { 622 if (*input_line_pointer != ')') 623 { 624 as_bad (_("`)' required")); 625 break; 626 } 627 input_line_pointer++; 628 } 629 while (closes--); 630 631 reloc_to_return = 632 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); 633 if (linker_stubs_should_be_generated) 634 { 635 switch (reloc_to_return) 636 { 637 case BFD_RELOC_AVR_LO8_LDI_PM: 638 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS; 639 break; 640 case BFD_RELOC_AVR_HI8_LDI_PM: 641 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS; 642 break; 643 644 default: 645 /* PR 5523: Do not generate a warning here, 646 legitimate code can trigger this case. */ 647 break; 648 } 649 } 650 return reloc_to_return; 651 } 652 } 653 } 654 655 input_line_pointer = tmp; 656 expression (exp); 657 658 /* Warn about expressions that fail to use lo8 (). */ 659 if (exp->X_op == O_constant) 660 { 661 int x = exp->X_add_number; 662 663 if (x < -255 || x > 255) 664 as_warn (_("constant out of 8-bit range: %d"), x); 665 } 666 667 return BFD_RELOC_AVR_LDI; 668 } 669 670 /* Parse one instruction operand. 671 Return operand bitmask. Also fixups can be generated. */ 672 673 static unsigned int 674 avr_operand (struct avr_opcodes_s *opcode, 675 int where, 676 char *op, 677 char **line) 678 { 679 expressionS op_expr; 680 unsigned int op_mask = 0; 681 char *str = skip_space (*line); 682 683 switch (*op) 684 { 685 /* Any register operand. */ 686 case 'w': 687 case 'd': 688 case 'r': 689 case 'a': 690 case 'v': 691 if (*str == 'r' || *str == 'R') 692 { 693 char r_name[20]; 694 695 str = extract_word (str, r_name, sizeof (r_name)); 696 op_mask = 0xff; 697 if (ISDIGIT (r_name[1])) 698 { 699 if (r_name[2] == '\0') 700 op_mask = r_name[1] - '0'; 701 else if (r_name[1] != '0' 702 && ISDIGIT (r_name[2]) 703 && r_name[3] == '\0') 704 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; 705 } 706 } 707 else 708 { 709 op_mask = avr_get_constant (str, 31); 710 str = input_line_pointer; 711 } 712 713 if (op_mask <= 31) 714 { 715 switch (*op) 716 { 717 case 'a': 718 if (op_mask < 16 || op_mask > 23) 719 as_bad (_("register r16-r23 required")); 720 op_mask -= 16; 721 break; 722 723 case 'd': 724 if (op_mask < 16) 725 as_bad (_("register number above 15 required")); 726 op_mask -= 16; 727 break; 728 729 case 'v': 730 if (op_mask & 1) 731 as_bad (_("even register number required")); 732 op_mask >>= 1; 733 break; 734 735 case 'w': 736 if ((op_mask & 1) || op_mask < 24) 737 as_bad (_("register r24, r26, r28 or r30 required")); 738 op_mask = (op_mask - 24) >> 1; 739 break; 740 } 741 break; 742 } 743 as_bad (_("register name or number from 0 to 31 required")); 744 break; 745 746 case 'e': 747 { 748 char c; 749 750 if (*str == '-') 751 { 752 str = skip_space (str + 1); 753 op_mask = 0x1002; 754 } 755 c = TOLOWER (*str); 756 if (c == 'x') 757 op_mask |= 0x100c; 758 else if (c == 'y') 759 op_mask |= 0x8; 760 else if (c != 'z') 761 as_bad (_("pointer register (X, Y or Z) required")); 762 763 str = skip_space (str + 1); 764 if (*str == '+') 765 { 766 ++str; 767 if (op_mask & 2) 768 as_bad (_("cannot both predecrement and postincrement")); 769 op_mask |= 0x1001; 770 } 771 772 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer 773 registers, no predecrement, no postincrement. */ 774 if (!avr_opt.all_opcodes && (op_mask & 0x100F) 775 && !(avr_mcu->isa & AVR_ISA_SRAM)) 776 as_bad (_("addressing mode not supported")); 777 } 778 break; 779 780 case 'z': 781 if (*str == '-') 782 as_bad (_("can't predecrement")); 783 784 if (! (*str == 'z' || *str == 'Z')) 785 as_bad (_("pointer register Z required")); 786 787 str = skip_space (str + 1); 788 789 if (*str == '+') 790 { 791 ++str; 792 op_mask |= 1; 793 } 794 795 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */ 796 if (!avr_opt.all_opcodes 797 && (op_mask & 0x0001) 798 && !(avr_mcu->isa & AVR_ISA_MOVW)) 799 as_bad (_("postincrement not supported")); 800 break; 801 802 case 'b': 803 { 804 char c = TOLOWER (*str++); 805 806 if (c == 'y') 807 op_mask |= 0x8; 808 else if (c != 'z') 809 as_bad (_("pointer register (Y or Z) required")); 810 str = skip_space (str); 811 if (*str++ == '+') 812 { 813 input_line_pointer = str; 814 avr_offset_expression (& op_expr); 815 str = input_line_pointer; 816 fix_new_exp (frag_now, where, 3, 817 &op_expr, FALSE, BFD_RELOC_AVR_6); 818 } 819 } 820 break; 821 822 case 'h': 823 str = parse_exp (str, &op_expr); 824 fix_new_exp (frag_now, where, opcode->insn_size * 2, 825 &op_expr, FALSE, BFD_RELOC_AVR_CALL); 826 break; 827 828 case 'L': 829 str = parse_exp (str, &op_expr); 830 fix_new_exp (frag_now, where, opcode->insn_size * 2, 831 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); 832 break; 833 834 case 'l': 835 str = parse_exp (str, &op_expr); 836 fix_new_exp (frag_now, where, opcode->insn_size * 2, 837 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); 838 break; 839 840 case 'i': 841 str = parse_exp (str, &op_expr); 842 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, 843 &op_expr, FALSE, BFD_RELOC_16); 844 break; 845 846 case 'M': 847 { 848 bfd_reloc_code_real_type r_type; 849 850 input_line_pointer = str; 851 r_type = avr_ldi_expression (&op_expr); 852 str = input_line_pointer; 853 fix_new_exp (frag_now, where, 3, 854 &op_expr, FALSE, r_type); 855 } 856 break; 857 858 case 'n': 859 { 860 unsigned int x; 861 862 x = ~avr_get_constant (str, 255); 863 str = input_line_pointer; 864 op_mask |= (x & 0xf) | ((x << 4) & 0xf00); 865 } 866 break; 867 868 case 'K': 869 input_line_pointer = str; 870 avr_offset_expression (& op_expr); 871 str = input_line_pointer; 872 fix_new_exp (frag_now, where, 3, 873 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); 874 break; 875 876 case 'S': 877 case 's': 878 { 879 unsigned int x; 880 881 x = avr_get_constant (str, 7); 882 str = input_line_pointer; 883 if (*op == 'S') 884 x <<= 4; 885 op_mask |= x; 886 } 887 break; 888 889 case 'P': 890 { 891 unsigned int x; 892 893 x = avr_get_constant (str, 63); 894 str = input_line_pointer; 895 op_mask |= (x & 0xf) | ((x & 0x30) << 5); 896 } 897 break; 898 899 case 'p': 900 { 901 unsigned int x; 902 903 x = avr_get_constant (str, 31); 904 str = input_line_pointer; 905 op_mask |= x << 3; 906 } 907 break; 908 909 case '?': 910 break; 911 912 default: 913 as_bad (_("unknown constraint `%c'"), *op); 914 } 915 916 *line = str; 917 return op_mask; 918 } 919 920 /* Parse instruction operands. 921 Return binary opcode. */ 922 923 static unsigned int 924 avr_operands (struct avr_opcodes_s *opcode, char **line) 925 { 926 char *op = opcode->constraints; 927 unsigned int bin = opcode->bin_opcode; 928 char *frag = frag_more (opcode->insn_size * 2); 929 char *str = *line; 930 int where = frag - frag_now->fr_literal; 931 static unsigned int prev = 0; /* Previous opcode. */ 932 933 /* Opcode have operands. */ 934 if (*op) 935 { 936 unsigned int reg1 = 0; 937 unsigned int reg2 = 0; 938 int reg1_present = 0; 939 int reg2_present = 0; 940 941 /* Parse first operand. */ 942 if (REGISTER_P (*op)) 943 reg1_present = 1; 944 reg1 = avr_operand (opcode, where, op, &str); 945 ++op; 946 947 /* Parse second operand. */ 948 if (*op) 949 { 950 if (*op == ',') 951 ++op; 952 953 if (*op == '=') 954 { 955 reg2 = reg1; 956 reg2_present = 1; 957 } 958 else 959 { 960 if (REGISTER_P (*op)) 961 reg2_present = 1; 962 963 str = skip_space (str); 964 if (*str++ != ',') 965 as_bad (_("`,' required")); 966 str = skip_space (str); 967 968 reg2 = avr_operand (opcode, where, op, &str); 969 } 970 971 if (reg1_present && reg2_present) 972 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); 973 else if (reg2_present) 974 reg2 <<= 4; 975 } 976 if (reg1_present) 977 reg1 <<= 4; 978 bin |= reg1 | reg2; 979 } 980 981 /* Detect undefined combinations (like ld r31,Z+). */ 982 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) 983 as_warn (_("undefined combination of operands")); 984 985 if (opcode->insn_size == 2) 986 { 987 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs 988 (AVR core bug, fixed in the newer devices). */ 989 if (!(avr_opt.no_skip_bug || 990 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) 991 && AVR_SKIP_P (prev)) 992 as_warn (_("skipping two-word instruction")); 993 994 bfd_putl32 ((bfd_vma) bin, frag); 995 } 996 else 997 bfd_putl16 ((bfd_vma) bin, frag); 998 999 prev = bin; 1000 *line = str; 1001 return bin; 1002 } 1003 1004 /* GAS will call this function for each section at the end of the assembly, 1005 to permit the CPU backend to adjust the alignment of a section. */ 1006 1007 valueT 1008 md_section_align (asection *seg, valueT addr) 1009 { 1010 int align = bfd_get_section_alignment (stdoutput, seg); 1011 return ((addr + (1 << align) - 1) & (-1 << align)); 1012 } 1013 1014 /* If you define this macro, it should return the offset between the 1015 address of a PC relative fixup and the position from which the PC 1016 relative adjustment should be made. On many processors, the base 1017 of a PC relative instruction is the next instruction, so this 1018 macro would return the length of an instruction. */ 1019 1020 long 1021 md_pcrel_from_section (fixS *fixp, segT sec) 1022 { 1023 if (fixp->fx_addsy != (symbolS *) NULL 1024 && (!S_IS_DEFINED (fixp->fx_addsy) 1025 || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) 1026 return 0; 1027 1028 return fixp->fx_frag->fr_address + fixp->fx_where; 1029 } 1030 1031 /* GAS will call this for each fixup. It should store the correct 1032 value in the object file. */ 1033 1034 void 1035 md_apply_fix (fixS *fixP, valueT * valP, segT seg) 1036 { 1037 unsigned char *where; 1038 unsigned long insn; 1039 long value = *valP; 1040 1041 if (fixP->fx_addsy == (symbolS *) NULL) 1042 fixP->fx_done = 1; 1043 1044 else if (fixP->fx_pcrel) 1045 { 1046 segT s = S_GET_SEGMENT (fixP->fx_addsy); 1047 1048 if (s == seg || s == absolute_section) 1049 { 1050 value += S_GET_VALUE (fixP->fx_addsy); 1051 fixP->fx_done = 1; 1052 } 1053 } 1054 1055 /* We don't actually support subtracting a symbol. */ 1056 if (fixP->fx_subsy != (symbolS *) NULL) 1057 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); 1058 1059 switch (fixP->fx_r_type) 1060 { 1061 default: 1062 fixP->fx_no_overflow = 1; 1063 break; 1064 case BFD_RELOC_AVR_7_PCREL: 1065 case BFD_RELOC_AVR_13_PCREL: 1066 case BFD_RELOC_32: 1067 case BFD_RELOC_16: 1068 case BFD_RELOC_AVR_CALL: 1069 break; 1070 } 1071 1072 if (fixP->fx_done) 1073 { 1074 /* Fetch the instruction, insert the fully resolved operand 1075 value, and stuff the instruction back again. */ 1076 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; 1077 insn = bfd_getl16 (where); 1078 1079 switch (fixP->fx_r_type) 1080 { 1081 case BFD_RELOC_AVR_7_PCREL: 1082 if (value & 1) 1083 as_bad_where (fixP->fx_file, fixP->fx_line, 1084 _("odd address operand: %ld"), value); 1085 1086 /* Instruction addresses are always right-shifted by 1. */ 1087 value >>= 1; 1088 --value; /* Correct PC. */ 1089 1090 if (value < -64 || value > 63) 1091 as_bad_where (fixP->fx_file, fixP->fx_line, 1092 _("operand out of range: %ld"), value); 1093 value = (value << 3) & 0x3f8; 1094 bfd_putl16 ((bfd_vma) (value | insn), where); 1095 break; 1096 1097 case BFD_RELOC_AVR_13_PCREL: 1098 if (value & 1) 1099 as_bad_where (fixP->fx_file, fixP->fx_line, 1100 _("odd address operand: %ld"), value); 1101 1102 /* Instruction addresses are always right-shifted by 1. */ 1103 value >>= 1; 1104 --value; /* Correct PC. */ 1105 1106 if (value < -2048 || value > 2047) 1107 { 1108 /* No wrap for devices with >8K of program memory. */ 1109 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) 1110 as_bad_where (fixP->fx_file, fixP->fx_line, 1111 _("operand out of range: %ld"), value); 1112 } 1113 1114 value &= 0xfff; 1115 bfd_putl16 ((bfd_vma) (value | insn), where); 1116 break; 1117 1118 case BFD_RELOC_32: 1119 bfd_putl16 ((bfd_vma) value, where); 1120 break; 1121 1122 case BFD_RELOC_16: 1123 bfd_putl16 ((bfd_vma) value, where); 1124 break; 1125 1126 case BFD_RELOC_AVR_16_PM: 1127 bfd_putl16 ((bfd_vma) (value >> 1), where); 1128 break; 1129 1130 case BFD_RELOC_AVR_LDI: 1131 if (value > 255) 1132 as_bad_where (fixP->fx_file, fixP->fx_line, 1133 _("operand out of range: %ld"), value); 1134 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); 1135 break; 1136 1137 case BFD_RELOC_AVR_6: 1138 if ((value > 63) || (value < 0)) 1139 as_bad_where (fixP->fx_file, fixP->fx_line, 1140 _("operand out of range: %ld"), value); 1141 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where); 1142 break; 1143 1144 case BFD_RELOC_AVR_6_ADIW: 1145 if ((value > 63) || (value < 0)) 1146 as_bad_where (fixP->fx_file, fixP->fx_line, 1147 _("operand out of range: %ld"), value); 1148 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); 1149 break; 1150 1151 case BFD_RELOC_AVR_LO8_LDI: 1152 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); 1153 break; 1154 1155 case BFD_RELOC_AVR_HI8_LDI: 1156 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); 1157 break; 1158 1159 case BFD_RELOC_AVR_MS8_LDI: 1160 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); 1161 break; 1162 1163 case BFD_RELOC_AVR_HH8_LDI: 1164 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); 1165 break; 1166 1167 case BFD_RELOC_AVR_LO8_LDI_NEG: 1168 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); 1169 break; 1170 1171 case BFD_RELOC_AVR_HI8_LDI_NEG: 1172 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); 1173 break; 1174 1175 case BFD_RELOC_AVR_MS8_LDI_NEG: 1176 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); 1177 break; 1178 1179 case BFD_RELOC_AVR_HH8_LDI_NEG: 1180 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); 1181 break; 1182 1183 case BFD_RELOC_AVR_LO8_LDI_PM: 1184 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); 1185 break; 1186 1187 case BFD_RELOC_AVR_HI8_LDI_PM: 1188 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); 1189 break; 1190 1191 case BFD_RELOC_AVR_HH8_LDI_PM: 1192 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); 1193 break; 1194 1195 case BFD_RELOC_AVR_LO8_LDI_PM_NEG: 1196 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); 1197 break; 1198 1199 case BFD_RELOC_AVR_HI8_LDI_PM_NEG: 1200 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); 1201 break; 1202 1203 case BFD_RELOC_AVR_HH8_LDI_PM_NEG: 1204 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); 1205 break; 1206 1207 case BFD_RELOC_AVR_CALL: 1208 { 1209 unsigned long x; 1210 1211 x = bfd_getl16 (where); 1212 if (value & 1) 1213 as_bad_where (fixP->fx_file, fixP->fx_line, 1214 _("odd address operand: %ld"), value); 1215 value >>= 1; 1216 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; 1217 bfd_putl16 ((bfd_vma) x, where); 1218 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); 1219 } 1220 break; 1221 1222 default: 1223 as_fatal (_("line %d: unknown relocation type: 0x%x"), 1224 fixP->fx_line, fixP->fx_r_type); 1225 break; 1226 } 1227 } 1228 else 1229 { 1230 switch (fixP->fx_r_type) 1231 { 1232 case -BFD_RELOC_AVR_HI8_LDI_NEG: 1233 case -BFD_RELOC_AVR_HI8_LDI: 1234 case -BFD_RELOC_AVR_LO8_LDI_NEG: 1235 case -BFD_RELOC_AVR_LO8_LDI: 1236 as_bad_where (fixP->fx_file, fixP->fx_line, 1237 _("only constant expression allowed")); 1238 fixP->fx_done = 1; 1239 break; 1240 default: 1241 break; 1242 } 1243 } 1244 } 1245 1246 /* GAS will call this to generate a reloc, passing the resulting reloc 1247 to `bfd_install_relocation'. This currently works poorly, as 1248 `bfd_install_relocation' often does the wrong thing, and instances of 1249 `tc_gen_reloc' have been written to work around the problems, which 1250 in turns makes it difficult to fix `bfd_install_relocation'. */ 1251 1252 /* If while processing a fixup, a reloc really needs to be created 1253 then it is done here. */ 1254 1255 arelent * 1256 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, 1257 fixS *fixp) 1258 { 1259 arelent *reloc; 1260 1261 if (fixp->fx_addsy && fixp->fx_subsy) 1262 { 1263 long value = 0; 1264 1265 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy)) 1266 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section) 1267 { 1268 as_bad_where (fixp->fx_file, fixp->fx_line, 1269 "Difference of symbols in different sections is not supported"); 1270 return NULL; 1271 } 1272 1273 /* We are dealing with two symbols defined in the same section. 1274 Let us fix-up them here. */ 1275 value += S_GET_VALUE (fixp->fx_addsy); 1276 value -= S_GET_VALUE (fixp->fx_subsy); 1277 1278 /* When fx_addsy and fx_subsy both are zero, md_apply_fix 1279 only takes it's second operands for the fixup value. */ 1280 fixp->fx_addsy = NULL; 1281 fixp->fx_subsy = NULL; 1282 md_apply_fix (fixp, (valueT *) &value, NULL); 1283 1284 return NULL; 1285 } 1286 1287 reloc = xmalloc (sizeof (arelent)); 1288 1289 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); 1290 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 1291 1292 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 1293 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 1294 if (reloc->howto == (reloc_howto_type *) NULL) 1295 { 1296 as_bad_where (fixp->fx_file, fixp->fx_line, 1297 _("reloc %d not supported by object file format"), 1298 (int) fixp->fx_r_type); 1299 return NULL; 1300 } 1301 1302 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT 1303 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 1304 reloc->address = fixp->fx_offset; 1305 1306 reloc->addend = fixp->fx_offset; 1307 1308 return reloc; 1309 } 1310 1311 void 1312 md_assemble (char *str) 1313 { 1314 struct avr_opcodes_s *opcode; 1315 char op[11]; 1316 1317 str = skip_space (extract_word (str, op, sizeof (op))); 1318 1319 if (!op[0]) 1320 as_bad (_("can't find opcode ")); 1321 1322 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); 1323 1324 if (opcode == NULL) 1325 { 1326 as_bad (_("unknown opcode `%s'"), op); 1327 return; 1328 } 1329 1330 /* Special case for opcodes with optional operands (lpm, elpm) - 1331 version with operands exists in avr_opcodes[] in the next entry. */ 1332 1333 if (*str && *opcode->constraints == '?') 1334 ++opcode; 1335 1336 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) 1337 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); 1338 1339 /* We used to set input_line_pointer to the result of get_operands, 1340 but that is wrong. Our caller assumes we don't change it. */ 1341 { 1342 char *t = input_line_pointer; 1343 1344 avr_operands (opcode, &str); 1345 if (*skip_space (str)) 1346 as_bad (_("garbage at end of line")); 1347 input_line_pointer = t; 1348 } 1349 } 1350 1351 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and 1352 `avr_cons_fix_new'. */ 1353 static int exp_mod_pm = 0; 1354 1355 /* Parse special CONS expression: pm (expression) 1356 or alternatively: gs (expression). 1357 These are used for addressing program memory. 1358 Relocation: BFD_RELOC_AVR_16_PM. */ 1359 1360 void 1361 avr_parse_cons_expression (expressionS *exp, int nbytes) 1362 { 1363 char *tmp; 1364 1365 exp_mod_pm = 0; 1366 1367 tmp = input_line_pointer = skip_space (input_line_pointer); 1368 1369 if (nbytes == 2) 1370 { 1371 char *pm_name1 = "pm"; 1372 char *pm_name2 = "gs"; 1373 int len = strlen (pm_name1); 1374 /* len must be the same for both pm identifiers. */ 1375 1376 if (strncasecmp (input_line_pointer, pm_name1, len) == 0 1377 || strncasecmp (input_line_pointer, pm_name2, len) == 0) 1378 { 1379 input_line_pointer = skip_space (input_line_pointer + len); 1380 1381 if (*input_line_pointer == '(') 1382 { 1383 input_line_pointer = skip_space (input_line_pointer + 1); 1384 exp_mod_pm = 1; 1385 expression (exp); 1386 1387 if (*input_line_pointer == ')') 1388 ++input_line_pointer; 1389 else 1390 { 1391 as_bad (_("`)' required")); 1392 exp_mod_pm = 0; 1393 } 1394 1395 return; 1396 } 1397 1398 input_line_pointer = tmp; 1399 } 1400 } 1401 1402 expression (exp); 1403 } 1404 1405 void 1406 avr_cons_fix_new (fragS *frag, 1407 int where, 1408 int nbytes, 1409 expressionS *exp) 1410 { 1411 if (exp_mod_pm == 0) 1412 { 1413 if (nbytes == 2) 1414 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); 1415 else if (nbytes == 4) 1416 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); 1417 else 1418 as_bad (_("illegal %srelocation size: %d"), "", nbytes); 1419 } 1420 else 1421 { 1422 if (nbytes == 2) 1423 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM); 1424 else 1425 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes); 1426 exp_mod_pm = 0; 1427 } 1428 } 1429