1@c Copyright 2001, 2002, 2003, 2005, 2006
2@c Free Software Foundation, Inc.
3@c This is part of the GAS manual.
4@c For copying conditions, see the file as.texinfo.
5@ifset GENERIC
6@page
7@node PPC-Dependent
8@chapter PowerPC Dependent Features
9@end ifset
10@ifclear GENERIC
11@node Machine Dependencies
12@chapter PowerPC Dependent Features
13@end ifclear
14
15@cindex PowerPC support
16@menu
17* PowerPC-Opts::                Options
18* PowerPC-Pseudo::              PowerPC Assembler Directives
19@end menu
20
21@node PowerPC-Opts
22@section Options
23
24@cindex options for PowerPC
25@cindex PowerPC options
26@cindex architectures, PowerPC
27@cindex PowerPC architectures
28The PowerPC chip family includes several successive levels, using the same
29core instruction set, but including a few additional instructions at
30each level.  There are exceptions to this however.  For details on what
31instructions each variant supports, please see the chip's architecture
32reference manual.
33
34The following table lists all available PowerPC options.
35
36@table @code
37@item -mpwrx | -mpwr2
38Generate code for POWER/2 (RIOS2).
39
40@item -mpwr
41Generate code for POWER (RIOS1)
42
43@item -m601
44Generate code for PowerPC 601.
45
46@item -mppc, -mppc32, -m603, -m604
47Generate code for PowerPC 603/604.
48
49@item -m403, -m405
50Generate code for PowerPC 403/405.
51
52@item -m440
53Generate code for PowerPC 440.  BookE and some 405 instructions.
54
55@item -m7400, -m7410, -m7450, -m7455
56Generate code for PowerPC 7400/7410/7450/7455.
57
58@item -m750cl
59Generate code for PowerPC 750CL.
60
61@item -mppc64, -m620
62Generate code for PowerPC 620/625/630.
63
64@item -me500, -me500x2
65Generate code for Motorola e500 core complex.
66
67@item -mspe
68Generate code for Motorola SPE instructions.
69
70@item -mppc64bridge
71Generate code for PowerPC 64, including bridge insns.
72
73@item -mbooke
74Generate code for 32-bit BookE.
75
76@item -me300
77Generate code for PowerPC e300 family.
78
79@item -maltivec
80Generate code for processors with AltiVec instructions.
81
82@item -mvsx
83Generate code for processors with Vector-Scalar (VSX) instructions.
84
85@item -mpower4
86Generate code for Power4 architecture.
87
88@item -mpower5
89Generate code for Power5 architecture.
90
91@item -mpower6
92Generate code for Power6 architecture.
93
94@item -mpower7
95Generate code for Power7 architecture.
96
97@item -mcell
98Generate code for Cell Broadband Engine architecture.
99
100@item -mcom
101Generate code Power/PowerPC common instructions.
102
103@item -many
104Generate code for any architecture (PWR/PWRX/PPC).
105
106@item -mregnames
107Allow symbolic names for registers.
108
109@item -mno-regnames
110Do not allow symbolic names for registers.
111
112@item -mrelocatable
113Support for GCC's -mrelocatable option.
114
115@item -mrelocatable-lib
116Support for GCC's -mrelocatable-lib option.
117
118@item -memb
119Set PPC_EMB bit in ELF flags.
120
121@item -mlittle, -mlittle-endian
122Generate code for a little endian machine.
123
124@item -mbig, -mbig-endian
125Generate code for a big endian machine.
126
127@item -msolaris
128Generate code for Solaris.
129
130@item -mno-solaris
131Do not generate code for Solaris.
132@end table
133
134
135@node PowerPC-Pseudo
136@section PowerPC Assembler Directives
137
138@cindex directives for PowerPC
139@cindex PowerPC directives
140A number of assembler directives are available for PowerPC.  The
141following table is far from complete.
142
143@table @code
144@item .machine "string"
145This directive allows you to change the machine for which code is
146generated.  @code{"string"} may be any of the -m cpu selection options
147(without the -m) enclosed in double quotes, @code{"push"}, or
148@code{"pop"}.  @code{.machine "push"} saves the currently selected
149cpu, which may be restored with @code{.machine "pop"}.
150@end table
151